公开(公告)号：US07633097B2

公开(公告)日：2009-12-15

申请号：US10950000

申请日：2004-09-23

申请人： Andrew Y. Kim ,  Steven A. Maranowski

发明人： Andrew Y. Kim ,  Steven A. Maranowski

IPC分类号： H01L31/109

CPC分类号： H01L33/007 ,  H01L21/02378 ,  H01L21/0242 ,  H01L21/0243 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/0262 ,  H01L33/08 ,  H01L33/20 ,  H01L33/22

摘要： A III-nitride light emitting device is grown on a textured substrate, in order to reduce the amount of total internal reflection at the interface between the substrate and the III-nitride layers. In some embodiments, the device includes a first growth region substantially free of voids, and a second growth region that improves the material quality such that high quality layers can be grown over the first and second regions.

摘要翻译： 在纹理化衬底上生长III族氮化物发光器件，以便减少衬底和III族氮化物层之间的界面处的全内反射量。 在一些实施例中，该装置包括基本上不含空隙的第一生长区域和改善材料质量的第二生长区域，使得高质量层可以在第一区域和第二区域上生长。

公开(公告)号：US20120264248A1

公开(公告)日：2012-10-18

申请号：US13537107

申请日：2012-06-29

申请人： Linda T. ROMANO ,  Parijat Pramil DEB ,  Andrew Y. Kim ,  John F. KAEDING

发明人： Linda T. ROMANO ,  Parijat Pramil DEB ,  Andrew Y. Kim ,  John F. KAEDING

IPC分类号： H01L33/32

CPC分类号： H01L33/12 ,  H01L21/02378 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/02505 ,  H01L21/0254 ,  H01L33/16 ,  H01L33/32

摘要： A semiconductor structure comprises a III-nitride light emitting layer disposed between an n-type region and a p-type region. The semiconductor structure further comprises a curvature control layer grown on a first layer. The curvature control layer is disposed between the n-type region and the first layer. The curvature control layer has a theoretical a-lattice constant less than the theoretical a-lattice constant of GaN. The first layer is a substantially single crystal layer.

摘要翻译： 半导体结构包括设置在n型区域和p型区域之间的III族氮化物发光层。 半导体结构还包括在第一层上生长的曲率控制层。 曲率控制层设置在n型区域和第一层之间。 曲率控制层具有小于GaN的理论a晶格常数的理论晶格常数。 第一层是基本单晶层。

公开(公告)号：US06635904B2

公开(公告)日：2003-10-21

申请号：US09823823

申请日：2001-03-29

申请人： Werner K. Goetz ,  Michael D. Camras ,  Nathan F. Gardner ,  R. Scott Kern ,  Andrew Y. Kim ,  Stephen A. Stockman

发明人： Werner K. Goetz ,  Michael D. Camras ,  Nathan F. Gardner ,  R. Scott Kern ,  Andrew Y. Kim ,  Stephen A. Stockman

IPC分类号： H01L3300

CPC分类号： H01L33/32 ,  B82Y20/00 ,  H01L33/007 ,  H01L33/0075 ,  H01L33/02 ,  H01L33/06 ,  H01S5/0212 ,  H01S5/32341 ,  H01S5/3409

摘要： A smoothing structure containing indium is formed between the substrate and the active region of a III-nitride light emitting device to improve the surface characteristics of the device layers. In some embodiments, the smoothing structure is a single layer, separated from the active region by a spacer layer which typically does not contain indium. The smoothing layer contains a composition of indium lower than the active region, and is typically deposited at a higher temperature than the active region. The spacer layer is typically deposited while reducing the temperature in the reactor from the smoothing layer deposition temperature to the active region deposition temperature. In other embodiments, a graded smoothing region is used to improve the surface characteristics. The smoothing region may have a graded composition, graded dopant concentration, or both.

公开(公告)号：US06489636B1

公开(公告)日：2002-12-03

申请号：US09823732

申请日：2001-03-29

申请人： Werner K. Goetz ,  Michael D. Camras ,  Nathan F. Gardner ,  R. Scott Kern ,  Andrew Y. Kim ,  Stephen A. Stockman

发明人： Werner K. Goetz ,  Michael D. Camras ,  Nathan F. Gardner ,  R. Scott Kern ,  Andrew Y. Kim ,  Stephen A. Stockman

IPC分类号： H01L3300

CPC分类号： H01L33/32 ,  B82Y20/00 ,  H01L33/007 ,  H01L33/0075 ,  H01L33/02 ,  H01L33/06 ,  H01S5/0212 ,  H01S5/32341 ,  H01S5/3409

摘要： A smoothing structure containing indium is formed between the substrate and the active region of a III-nitride light emitting device to improve the surface characteristics of the device layers. In some embodiments, the smoothing structure is a single layer, separated from the active region by a spacer layer which typically does not contain indium. The smoothing layer contains a composition of indium lower than the active region, and is typically deposited at a higher temperature than the active region. The spacer layer is typically deposited while reducing the temperature in the reactor from the smoothing layer deposition temperature to the active region deposition temperature. In other embodiments, a graded smoothing region is used to improve the surface characteristics. The smoothing region may have a graded composition, graded dopant concentration, or both.

公开(公告)号：US08692261B2

公开(公告)日：2014-04-08

申请号：US12783197

申请日：2010-05-19

申请人： Andrew Y. Kim ,  Patrick N. Grillot

发明人： Andrew Y. Kim ,  Patrick N. Grillot

IPC分类号： H01L27/15

CPC分类号： H01L33/0075 ,  H01L21/02458 ,  H01L21/02505 ,  H01L33/0079 ,  H01L33/12 ,  H01L33/32 ,  H01L2924/0002 ,  H01L2924/00

摘要： In some embodiments of the invention, a device includes a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, and a semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region. The second semiconductor layer is disposed between the first semiconductor layer and the third semiconductor layer. The third semiconductor layer is disposed between the second semiconductor layer and the light emitting layer. A difference between the in-plane lattice constant of the first semiconductor layer and the bulk lattice constant of the third semiconductor layer is no more than 1%. A difference between the in-plane lattice constant of the first semiconductor layer and the bulk lattice constant of the second semiconductor layer is at least 1%. The third semiconductor layer is at least partially relaxed.

摘要翻译： 在本发明的一些实施例中，器件包括第一半导体层，第二半导体层，第三半导体层以及包括设置在n型区域和p型区域之间的III族氮化物发光层的半导体结构 。 第二半导体层设置在第一半导体层和第三半导体层之间。 第三半导体层设置在第二半导体层和发光层之间。 第一半导体层的面内晶格常数与第三半导体层的体晶格常数之差不大于1％。 第一半导体层的面内晶格常数与第二半导体层的体晶格常数之差为1％以上。 第三半导体层至少部分松弛。

公开(公告)号：US08536022B2

公开(公告)日：2013-09-17

申请号：US12783354

申请日：2010-05-19

申请人： Andrew Y. Kim

发明人： Andrew Y. Kim

IPC分类号： H01L21/30 ,  H01L21/46

CPC分类号： H01L21/02505 ,  H01L21/0237 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/0254 ,  H01L33/007 ,  H01L33/12 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method according to embodiments of the invention includes providing an epitaxial structure comprising a donor layer and a strained layer. The epitaxial structure is treated to cause the strained layer to relax. Relaxation of the strained layer causes an in-plane lattice constant of the donor layer to change.

摘要翻译： 根据本发明的实施例的方法包括提供包括施主层和应变层的外延结构。 处理外延结构以使应变层松弛。 应变层的松弛导致施主层的面内晶格常数发生变化。

公开(公告)号：US06805744B2

公开(公告)日：2004-10-19

申请号：US10023047

申请日：2001-12-13

申请人： Andrew Y. Kim ,  Eugene A. Fitzgerald

发明人： Andrew Y. Kim ,  Eugene A. Fitzgerald

IPC分类号： C30B2506

CPC分类号： H01L21/02392 ,  C30B25/02 ,  C30B29/40 ,  H01L21/02395 ,  H01L21/02461 ,  H01L21/02505 ,  H01L21/0251 ,  H01L21/02543 ,  H01L21/02576 ,  H01L21/0262 ,  H01L31/1844 ,  H01L33/0062 ,  H01L33/0066 ,  H01L33/30 ,  Y02E10/544

摘要： A method of forming a semiconductor structure including providing a single crystal semiconductor substrate of GaP, and fabricating a graded composition buffer including a plurality of epitaxial semiconductor Inx(AlyGa1−y)1−xP alloy layers. The buffer includes a first alloy layer immediately contacting the substrate having a lattice constant that is nearly identical to that of the substrate, subsequent alloy layers having lattice constants that differ from adjacent layers by less than 1%, and a final alloy layer having a lattice constant that is substantially different from the substrate. The growth temperature of the final alloy layer is at least 20° C. less than the growth temperature of the first alloy layer.

摘要翻译： 一种形成半导体结构的方法，包括提供GaP的单晶半导体衬底，以及制造包括多个外延半导体In x（Al y Ga 1-y）1-xP合金层的渐变组合物缓冲层。 缓冲器包括立即接触基板的第一合金层，其具有与基板的晶格常数几乎相同的晶格常数，随后的合金层具有不同于相邻层的晶格常数小于1％，以及具有晶格的最终合金层 基本上不同于基底的常数。 最终合金层的生长温度比第一合金层的生长温度低至少20℃。