公开(公告)号：US20240387174A1

公开(公告)日：2024-11-21

申请号：US18197528

申请日：2023-05-15

Applicant: Applied Materials, Inc.

Inventor： Guangyan Zhong ,  Eswaranand Venkatasubramanian ,  Rui Cheng ,  Santhosh Kiran Rajarajan ,  Ganesh Balasubramanian ,  Abhijit Basu Mallick ,  Karthik Janakiraman ,  Guoqing Li

IPC: H01L21/033

Abstract: Exemplary methods of semiconductor processing may include providing deposition precursors to a processing region of a semiconductor processing chamber. The deposition precursors may include a silicon-and-halogen-containing precursor and a metal-containing precursor. A substrate may be housed within the processing region. The methods may include generating plasma effluents of the deposition precursors. The methods may include forming a layer of silicon-and-metal-containing material on the substrate.

公开(公告)号：US12142480B2

公开(公告)日：2024-11-12

申请号：US17401574

申请日：2021-08-13

Applicant: Applied Materials, Inc.

Inventor： Qinghua Zhao ,  Rui Cheng ,  Ruiyun Huang ,  Dong Hyung Lee ,  Aykut Aydin ,  Karthik Janakiraman

IPC: H01L21/02 ,  H01L21/3205

Abstract: Exemplary methods of semiconductor processing may include providing a silicon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. The methods may include depositing a silicon-containing material on the substrate. The silicon-containing material may extend within the one or more recessed features along the substrate and a seam or void may be defined by the silicon-containing material within at least one of the one or more recessed features along the substrate. The methods may also include treating the silicon-containing material with a hydrogen-containing gas, such as plasma effluents of the hydrogen-containing gas, which may cause a size of the seam or void to be reduced.

公开(公告)号：US11848232B2

公开(公告)日：2023-12-19

申请号：US17839170

申请日：2022-06-13

Applicant: Applied Materials, Inc.

Inventor： Xin Liu ,  Fei Wang ,  Rui Cheng ,  Abhijit Basu Mallick ,  Robert Jan Visser

IPC: H01L21/768 ,  C23C16/01 ,  C23C16/24 ,  C23C16/455 ,  C23C16/46 ,  C23C16/56 ,  H01L21/02 ,  H01L21/3205 ,  H01L29/06

CPC classification number: H01L21/76837 ,  C23C16/01 ,  C23C16/24 ,  C23C16/45536 ,  C23C16/46 ,  C23C16/56 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/02532 ,  H01L21/32055 ,  H01L29/0649

Abstract: Embodiments of the present disclosure relate to processes for filling trenches. The process includes depositing a first amorphous silicon layer on a surface of a layer and a second amorphous silicon layer in a portion of a trench formed in the layer, and portions of side walls of the trench are exposed. The first amorphous silicon layer is removed. The process further includes depositing a third amorphous silicon layer on the surface of the layer and a fourth amorphous silicon layer on the second amorphous silicon layer. The third amorphous silicon layer is removed. The deposition/removal cyclic processes may be repeated until the trench is filled with amorphous silicon layers. The amorphous silicon layers form a seamless amorphous silicon gap fill in the trench since the amorphous silicon layers are formed from bottom up.

公开(公告)号：US20220246432A1

公开(公告)日：2022-08-04

申请号：US17724994

申请日：2022-04-20

Applicant: Applied Materials, Inc.

Inventor： Srinivas Gandikota ,  Abhijit Basu Mallick ,  Swaminathan Srinivasan ,  Rui Cheng ,  Susmit Singha Roy ,  Gaurav Thareja ,  Mukund Srinivasan ,  Sanjay Natarajan

IPC: H01L21/225 ,  H01L21/30 ,  H01L21/67 ,  H01L21/02

Abstract: Methods of doping a semiconductor material are disclosed. Some embodiments provide for conformal doping of three dimensional structures. Some embodiments provide for doping with high concentrations of boron for p-type doping.

公开(公告)号：US11315787B2

公开(公告)日：2022-04-26

申请号：US16821759

申请日：2020-03-17

Applicant: Applied Materials, Inc.

Inventor： Tzu-shun Yang ,  Rui Cheng ,  Karthik Janakiraman ,  Zubin Huang ,  Diwakar Kedlaya ,  Meenakshi Gupta ,  Srinivas Guggilla ,  Yung-chen Lin ,  Hidetaka Oshio ,  Chao Li ,  Gene Lee

IPC: H01L21/033 ,  H01L21/311 ,  H01L21/3213

Abstract: The present disclosure provides forming nanostructures utilizing multiple patterning process with good profile control and feature transfer integrity. In one embodiment, a method for forming features on a substrate includes forming a mandrel layer on a substrate, conformally forming a spacer layer on the mandrel layer, wherein the spacer layer is a doped silicon material, and patterning the spacer layer. In another embodiment, a method for forming features on a substrate includes conformally forming a spacer layer on a mandrel layer on a substrate, wherein the spacer layer is a doped silicon material, selectively removing a portion of the spacer layer using a first gas mixture, and selectively removing the mandrel layer using a second gas mixture different from the first gas mixture.

公开(公告)号：US20220108872A1

公开(公告)日：2022-04-07

申请号：US17063366

申请日：2020-10-05

Applicant: Applied Materials, Inc.

Inventor： Zubin Huang ,  Diwakar Kedlaya ,  Rui Cheng ,  Truong Van Nguyen ,  Manjunath Patil ,  Pavan Kumar Murali Kumar ,  Subrahmanyam Veerisetty ,  Karthik Janakiraman

IPC: H01J37/32 ,  C23C16/44 ,  C23C16/50 ,  C23C16/56

Abstract: Exemplary semiconductor processing systems may include a chamber body comprising sidewalls and a base. The systems may include a substrate support extending through the base of the chamber body. The substrate support may include a support plate defining a plurality of channels through an interior of the support plate. Each channel of the plurality of channels may include a radial portion extending outward from a central channel through the support plate. Each channel may also include a vertical portion formed at an exterior region of the support plate fluidly coupling the radial portion with a support surface of the support plate. The substrate support may include a shaft coupled with the support plate. The central channel may extend through the shaft. The systems may include a fluid source coupled with the central channel of the substrate support.

公开(公告)号：US20220093371A1

公开(公告)日：2022-03-24

申请号：US17026885

申请日：2020-09-21

Applicant: Applied Materials, Inc.

Inventor： Zubin Huang ,  Truong Van Nguyen ,  Rui Cheng ,  Diwakar Kedlaya ,  Manjunath Veerappa Chobari Patil ,  Prashant A. Desai ,  Paul L. Brillhart ,  Karthik Janakiraman ,  Pavan Kumar Murali Kumar

IPC: H01J37/32 ,  C23C16/455 ,  C23C16/458 ,  C23C16/44

Abstract: Exemplary semiconductor processing systems include a chamber body having sidewalls and a base. The systems may include a substrate support extending through the base. The substrate support may include a support plate defining lift pin locations and a shaft coupled with the support plate. The systems may include a shield coupled with the shaft and extending below the support plate. The shield may define a central aperture that extends beyond an outer periphery of the shaft. The systems may include a purge baffle coupled with the shield at a position that is beyond the central aperture such that a space between the purge baffle and the shaft is in fluid communication with a space between the shield and the support plate. The purge baffle may extend along at least a portion of the shaft. The systems may include a purge gas source coupled with the purge baffle.

公开(公告)号：US20220020583A1

公开(公告)日：2022-01-20

申请号：US16932793

申请日：2020-07-19

Applicant: Applied Materials, Inc.

Inventor： Rui Cheng ,  Diwakar Kedlaya ,  Karthik Janakiraman ,  Gautam K. Hemani ,  Krishna Nittala ,  Alicia J. Lustgraaf ,  Zubin Huang ,  Brett Spaulding ,  Shashank Sharma ,  Kelvin Chan

IPC: H01L21/02 ,  C23C16/50 ,  C23C16/24

Abstract: Exemplary methods of semiconductor processing may include flowing a silicon-containing precursor into a processing region of a semiconductor processing chamber. A substrate may be housed within the processing region, and the substrate may be maintained at a temperature below or about 450° C. The methods may include striking a plasma of the silicon-containing precursor. The methods may include forming a layer of amorphous silicon on a semiconductor substrate. The layer of amorphous silicon may be characterized by less than or about 3% hydrogen incorporation.

公开(公告)号：US20210320027A1

公开(公告)日：2021-10-14

申请号：US16844764

申请日：2020-04-09

Applicant: Applied Materials, Inc.

Inventor： Zubin Huang ,  Rui Cheng ,  Diwakar Kedlaya ,  Satish Radhakrishnan ,  Anton V. Baryshnikov ,  Venkatanarayana Shankaramurthy ,  Karthik Janakiraman ,  Paul L. Brillhart ,  Badri N. Ramamurthi

IPC: H01L21/683 ,  H01L21/67 ,  H01J37/32

Abstract: Exemplary methods of semiconductor processing may include coupling a fluid conduit within a substrate support in a semiconductor processing chamber to a system foreline. The coupling may vacuum chuck a substrate with the substrate support. The methods may include flowing a gas into the fluid conduit. The methods may include maintaining a pressure between the substrate and the substrate support at a pressure higher than the pressure at the system foreline.

公开(公告)号：US20210118691A1

公开(公告)日：2021-04-22

申请号：US17137637

申请日：2020-12-30

Applicant: Applied Materials, Inc.

Inventor： Shishi Jiang ,  Pramit Manna ,  Bo Qi ,  Abhijit Basu Mallick ,  Rui Cheng ,  Tomohiko Kitajima ,  Harry S. Whitesell ,  Huiyuan Wang

IPC: H01L21/311 ,  H01L21/02

Abstract: Methods of etching film stacks to form gaps of uniform width are described. A film stack is etched through a hardmask. A conformal liner is deposited in the gap. The bottom of the liner is removed. The film stack is selectively etched relative to the liner. The liner is removed. The method may be repeated to a predetermined depth.