-
公开(公告)号:USD1023987S1
公开(公告)日:2024-04-23
申请号:US29787536
申请日:2021-06-07
Applicant: Applied Materials, Inc.
Designer: Eric Kihara Shono , Vishwas Kumar Pandey , Christopher S. Olsen , Hansel Lo , Agus Sofian Tjandra , Taewan Kim , Tobin Kaufman-Osborn
Abstract: FIG. 1 is a top plan view of a chamber inlet; and,
FIG. 2 is a top, right side perspective view of the chamber inlet of FIG. 1.
The broken lines shown in FIGS. 1 and 2 depict features of the chamber inlet that form no part of the claimed design.-
2.
公开(公告)号:US11732355B2
公开(公告)日:2023-08-22
申请号:US16662134
申请日:2019-10-24
Applicant: Applied Materials, Inc.
Inventor: Vishwas Kumar Pandey , Eric Kihara Shono , Kartik Shah , Christopher S. Olsen , Agus Sofian Tjandra , Tobin Kaufman-Osborn , Taewan Kim , Hansel Lo
IPC: C23C16/452 , C23C16/455 , B01F23/10 , B01F25/421 , H01J37/32 , B01F25/10 , B01F25/314 , B01F35/511 , H01L21/67
CPC classification number: C23C16/452 , B01F23/10 , B01F23/19 , B01F25/102 , B01F25/3141 , B01F25/31423 , B01F25/421 , B01F35/511 , C23C16/45536 , C23C16/45548 , C23C16/45561 , H01J37/3244 , H01J37/32357 , H01L21/67017
Abstract: The present disclosure generally provides methods of providing at least metastable radical molecular species and/or radical atomic species to a processing volume of a process chamber during an electronic device fabrication process, and apparatus related thereto. In one embodiment, the apparatus is a gas injection assembly disposed between a remote plasma source and a process chamber. The gas injection assembly includes a body, a dielectric liner disposed in the body that defines a gas mixing volume, a first flange to couple the gas injection assembly to a process chamber, and a second flange to couple the gas injection assembly to the remote plasma source. The gas injection assembly further includes one or more gas injection ports formed through the body and the liner.
-
公开(公告)号:US11189485B2
公开(公告)日:2021-11-30
申请号:US16836351
申请日:2020-03-31
Applicant: Applied Materials, Inc.
Inventor: Christopher S. Olsen , Taewan Kim
Abstract: A substrate oxidation assembly includes: a chamber body defining a processing volume; a substrate support disposed in the processing volume; a plasma source coupled to the processing volume; a steam source fluidly coupled to the processing volume; and a substrate heater. A method of processing a semiconductor substrate includes: initiating conformal radical oxidation of high aspect ratio structures of the substrate comprising: heating the substrate; and exposing the substrate to steam; and conformally oxidizing the substrate. A semiconductor device includes a silicon and nitrogen containing layer; a feature formed in the silicon and nitrogen containing layer having an aspect ratio of at least 40:1; and an oxide layer on the face of the feature having a thickness in a bottom region of the silicon and nitrogen containing layer that is at least 95% of a thickness of the oxide layer in a top region.
-
公开(公告)号:US11081340B2
公开(公告)日:2021-08-03
申请号:US16849713
申请日:2020-04-15
Applicant: Applied Materials, Inc.
Inventor: Hansel Lo , Christopher S. Olsen , Eric Kihara Shono , Johanes S. Swenberg , Erika Hansen , Taewan Kim , Lara Hawrylchak
IPC: H01L27/11582 , H01L21/02 , H01J37/32 , H01L21/311
Abstract: Methods for conformal radical oxidation of structures are provided. The method comprises positioning a substrate in a processing region of a processing chamber. The method further comprises flowing hydrogen gas into a precursor activator at a first flow rate, wherein the precursor activator is fluidly coupled with the processing region. The method further comprises flowing oxygen gas into the precursor activator at a second flow rate. The method further comprises flowing argon gas into the precursor activator at a third flow rate. The method further comprises generating a plasma in the precursor activator from the hydrogen gas, oxygen gas, and argon gas. The method further comprises flowing the plasma into the processing region. The method further comprises exposing the substrate to the plasma to form an oxide film on the substrate, wherein a growth rate of the oxide film is controlled by adjusting the third flow rate.
-
5.
公开(公告)号:US11697875B2
公开(公告)日:2023-07-11
申请号:US16662134
申请日:2019-10-24
Applicant: Applied Materials, Inc.
Inventor: Vishwas Kumar Pandey , Eric Kihara Shono , Kartik Shah , Christopher S. Olsen , Agus Sofian Tjandra , Tobin Kaufman-Osborn , Taewan Kim , Hansel Lo
IPC: C23C16/452 , C23C16/455 , B01F23/10 , B01F25/421 , H01J37/32 , B01F25/10 , B01F25/314 , B01F35/511 , H01L21/67
CPC classification number: C23C16/452 , B01F23/10 , B01F23/19 , B01F25/102 , B01F25/3141 , B01F25/31423 , B01F25/421 , B01F35/511 , C23C16/45536 , C23C16/45548 , C23C16/45561 , H01J37/3244 , H01J37/32357 , H01L21/67017
Abstract: The present disclosure generally provides methods of providing at least metastable radical molecular species and/or radical atomic species to a processing volume of a process chamber during an electronic device fabrication process, and apparatus related thereto. In one embodiment, the apparatus is a gas injection assembly disposed between a remote plasma source and a process chamber. The gas injection assembly includes a body, a dielectric liner disposed in the body that defines a gas mixing volume, a first flange to couple the gas injection assembly to a process chamber, and a second flange to couple the gas injection assembly to the remote plasma source. The gas injection assembly further includes one or more gas injection ports formed through the body and the liner.
-
公开(公告)号:US11501945B2
公开(公告)日:2022-11-15
申请号:US17102051
申请日:2020-11-23
Applicant: Applied Materials, Inc.
Inventor: Eric Kihara Shono , Vishwas Kumar Pandey , Christopher S. Olsen , Hansel Lo , Agus Sofian Tjandra , Taewan Kim , Tobin Kaufman-Osborn
Abstract: In one example, a chamber inlet assembly includes a chamber inlet, an outer coupling for a delivery line, and an inner coupling for a processing region of a processing chamber. The inner coupling and the outer coupling are on inner and outer ends, respectively, of the chamber inlet, wherein a cross-sectional area of the inner coupling is larger than a cross-sectional area of the outer coupling. The chamber inlet assembly also includes a longitudinal profile including the inner and outer ends and a first side and a second side, the first and second sides being on opposite sides of the chamber inlet, wherein a shape of the longitudinal profile comprises at least one of triangular, modified triangular, trapezoidal, modified trapezoidal, rectangular, modified rectangular, rhomboidal, and modified rhomboidal. The chamber inlet assembly also includes cassette including the chamber inlet and configured to set into a side wall of the processing chamber.
-
7.
公开(公告)号:US09391024B2
公开(公告)日:2016-07-12
申请号:US14850069
申请日:2015-09-10
Applicant: Applied Materials, Inc.
Inventor: Bo Xie , Kang Sub Yim , Cheng Pan , Sure Ngo , Taewan Kim , Alexandros T. Demos
IPC: H01L23/58 , H01L21/31 , H01L23/532 , H01L21/02 , H01L21/768
CPC classification number: H01L23/53295 , H01L21/02126 , H01L21/022 , H01L21/02203 , H01L21/02274 , H01L21/02348 , H01L21/7682 , H01L21/76825 , H01L21/76829 , H01L21/76832 , H01L21/76834 , H01L21/76835 , H01L21/76838 , H01L21/76849 , H01L21/76883 , H01L2221/1047 , H01L2924/0002 , H01L2924/00
Abstract: Embodiments of the disclosure generally provide multi-layer dielectric stack configurations that are resistant to plasma damage. Methods are disclosed for the deposition of thin protective low dielectric constant layers upon bulk low dielectric constant layers to create the layer stack. As a result, the dielectric constant of the multi-layer stack is unchanged during and after plasma processing.
Abstract translation: 本公开的实施例通常提供耐等离子体损伤的多层电介质堆叠配置。 公开了用于在本体低介电常数层上沉积薄保护性低介电常数层以产生层堆叠的方法。 结果,等离子体处理期间和之后多层堆叠的介电常数不变。
-
公开(公告)号:US11322347B2
公开(公告)日:2022-05-03
申请号:US16660646
申请日:2019-10-22
Applicant: Applied Materials, Inc.
Inventor: Johanes F. Swenberg , Taewan Kim , Christopher S. Olsen , Erika Hansen
IPC: H01L21/02 , H01L27/11521 , H01L21/28 , H01L27/11568
Abstract: Embodiments described herein generally relate to conformal oxidation processes for flash memory devices. In conventional oxidation processes for gate structures, growth rates have become too fast, ultimately creating non-conformal films. To create a preferred growth rate for SiO2 on SiNx films, embodiments in this disclosure use a thermal combustion of a ternary mixture of H2+O2+N2O to gain SiO2 out of Si containing compounds. Using this mixture provides a lower growth in comparison with using only H2 and O2, resulting in a lower sticking coefficient. The lower sticking coefficient allows an optimal amount of atoms to reach the bottom of the gate, improving the conformality in 3D NAND SiO2 oxidation layers, specifically for ONO replacement tunneling gate formation.
-
公开(公告)号:USD924825S1
公开(公告)日:2021-07-13
申请号:US29634785
申请日:2018-01-24
Applicant: Applied Materials, Inc.
-
10.
公开(公告)号:US09850574B2
公开(公告)日:2017-12-26
申请号:US14623357
申请日:2015-02-16
Applicant: Applied Materials, Inc.
Inventor: Taewan Kim , Kang Sub Yim , Alexandros T. Demos
CPC classification number: C23C16/401 , C23C16/505 , C23C16/56 , H01L21/02126 , H01L21/02203 , H01L21/02274 , H01L21/0234 , H01L21/02348
Abstract: A low-k dielectric porous silicon oxycarbon layer is formed within an integrated circuit. In one embodiment, a porogen and bulk layer containing silicon oxycarbon layer is deposited, the porogens are selectively removed from the formed layer without simultaneously cross-linking the bulk layer, and then the bulk layer material is cross-linked. In other embodiments, multiple silicon oxycarbon sublayers are deposited, porogens from each sub-layer are selectively removed without simultaneously cross-linking the bulk material of the sub-layer, and the sub-layers are cross-linked separately.
-
-
-
-
-
-
-
-
-