利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

45 条记录 (耗时 0.018 秒)

    Optimized contact design for flip-chip LED
    1.
    发明授权
    Optimized contact design for flip-chip LED 失效
    优化的倒装芯片LED接点设计

    公开(公告)号：US06958498B2

    公开(公告)日：2005-10-25

    申请号：US10256402

    申请日：2002-09-27

    申请人： Bryan Shelton ,  Ivan Eliashevich ,  Hari Venugopalan

    发明人： Bryan Shelton ,  Ivan Eliashevich ,  Hari Venugopalan

    IPC分类号： H01L33/20 ,  H01L33/38 ,  H01L29/22

    CPC分类号： H01L33/38 ,  H01L33/20 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Light emitting diodes are provided with electrode and pad structures that facilitate current spreading and heat sinking. A light emitting diode may be formed as a die with a stacked structure having a first region and a mesa projecting from a surface of the first region. A first electrode may substantially cover the mesa and have a plurality of pads disposed thereon maximizing a contact area in relation to the first electrode. A second electrode may be disposed as a trace on the surface of the first region, the trace having a spiral, segmented/interdigitated, loop or pattern. Optionally, the trace includes corner spikes projecting outwardly toward edges of the first electrode.

    摘要翻译： 发光二极管设有电极和焊盘结构，便于电流扩散和散热。 发光二极管可以形成为具有从第一区域的表面突出的第一区域和台面的层叠结构的管芯。 第一电极可以基本上覆盖台面并且具有设置在其上的多个焊盘使相对于第一电极的接触面积最大化。 第二电极可以作为迹线设置在第一区域的表面上，迹线具有螺旋，分段/叉指，环形或图案。 可选地，迹线包括朝向第一电极的边缘向外突出的角尖。

    Lateral current GaN flip chip LED with shaped transparent substrate
    2.
    发明申请
    Lateral current GaN flip chip LED with shaped transparent substrate 审中-公开
    横向电流GaN倒装芯片LED带形状透明基板

    公开(公告)号：US20070096120A1

    公开(公告)日：2007-05-03

    申请号：US11260784

    申请日：2005-10-27

    申请人： Ivan Eliashevich ,  Hari Venugopalan ,  Emil Stefanov ,  Xian-An Cao ,  Bryan Shelton

    发明人： Ivan Eliashevich ,  Hari Venugopalan ,  Emil Stefanov ,  Xian-An Cao ,  Bryan Shelton

    IPC分类号： H01L31/12

    CPC分类号： H01L33/20

    摘要： An LED device (90) includes: an epitaxial structure (100) having a plurality of layers of semiconductor material and forming an active light-generating region (120) which generates light in response to electrical power being supplied to the LED device (90); and, a substrate (200) that is substantially transparent in a wavelength range corresponding to the light generated by the active light-generating region (120). The substrate has first and second opposing end faces (202, 206) and a plurality of side walls (210) extending therebetween, including a first side wall having a first portion thereof that defines a first surface (212, 214, 216, 218) which is not substantially normal to the first face (202) of the substrate (200). The epitaxial structure (100) is disposed on the first face (202) of the substrate (200).

    摘要翻译： LED器件（90）包括：具有多层半导体材料的外延结构（100），并形成响应供给LED器件（90）的电力产生光的有源发光区域（120） ; 以及在与由所述有源发光区域（120）产生的光对应的波长范围内基本透明的基板（200）。 衬底具有第一和第二相对的端面（202,206）和在其之间延伸的多个侧壁（210），包括第一侧壁，其具有限定第一表面（212,214,216,218）的第一部分， 其基本上不垂直于衬底（200）的第一面（202）。 外延结构（100）设置在基板（200）的第一面（202）上。

    Thick laser-scribed GaN-on-sapphire optoelectronic devices
    3.
    发明申请
    Thick laser-scribed GaN-on-sapphire optoelectronic devices 审中-公开
    厚激光刻划蓝宝石蓝宝石光电器件

    公开(公告)号：US20050263854A1

    公开(公告)日：2005-12-01

    申请号：US11123796

    申请日：2005-05-06

    申请人： Bryan Shelton ,  Hari Venugopalan ,  Sebastien Libon ,  Ivan Eliashevich

    发明人： Bryan Shelton ,  Hari Venugopalan ,  Sebastien Libon ,  Ivan Eliashevich

    IPC分类号： B23K26/40 ,  H01L21/461 ,  H01L21/78 ,  H01L29/20 ,  H01L33/00

    CPC分类号： H01L33/0095 ,  B23K26/40 ,  B23K2103/50 ,  H01L21/78

    摘要： A sapphire wafer having a thickness greater than 125 microns and having devices disposed thereon is laser scribed to form a grid array pattern of laser scribe lines laser scribed into the sapphire wafer. The sapphire wafer is separated along the laser scribe lines to separate a plurality of device dice defined by the grid array pattern of laser scribe lines. Each device die includes (i) a device and (ii) a portion of the sapphire wafer having the thickness greater than 125 microns. In some embodiments, a GaN LED device die includes a GaN based LED device, and a sapphire substrate supporting the GaN based LED device. The sapphire substrate has: (i) a thickness greater than 125 microns effective for increased light extraction due to a lower critical angle for total internal reflection; and (ii) sides generated by laser scribing.

    摘要翻译： 激光刻划厚度大于125微米并具有设置在其上的器件的蓝宝石晶片，以形成激光刻划到蓝宝石晶片中的激光划线的栅格阵列图案。 沿着激光划线分离蓝宝石晶片以分离由激光划线的栅格阵列图案限定的多个器件裸片。 每个器件裸片包括（i）器件和（ii）蓝宝石晶片的厚度大于125微米的部分。 在一些实施例中，GaN LED器件管芯包括GaN基LED器件和支撑GaN基LED器件的蓝宝石衬底。 蓝宝石衬底具有：（i）厚度大于125微米，对于增加光提取有效，由于全内反射的临界角较小; 和（ii）通过激光划线产生的边。

    LED with series-connected monolithically integrated mesas
    4.
    发明申请
    LED with series-connected monolithically integrated mesas 有权
    LED串联单片集成台面

    公开(公告)号：US20050225973A1

    公开(公告)日：2005-10-13

    申请号：US10817603

    申请日：2004-04-02

    申请人： Ivan Eliashevich ,  Chris Bohler ,  Bryan Shelton ,  Hari Venugopalan ,  Xiang Gao

    发明人： Ivan Eliashevich ,  Chris Bohler ,  Bryan Shelton ,  Hari Venugopalan ,  Xiang Gao

    IPC分类号： H01L21/00 ,  H01L27/15 ,  H01L33/20

    CPC分类号： H01L27/153 ,  H01L33/20 ,  H01L33/62 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A light emitting semiconductor device die (10, 110, 210, 310) includes an electrically insulating substrate (12, 112). First and second spatially separated electrodes (60, 62, 260, 262, 360, 362) are disposed on the electrically insulating substrate. The first and second electrodes define an electrical current flow direction directed from the first electrode to the second electrode. A plurality of light emitting diode mesas (30, 130, 130′, 230, 330) are disposed on the substrate between the first and second spatially separated electrodes. Electrical series interconnections (50, 150, 250, 350) are disposed on the substrate between neighboring light emitting diode mesas. Each series interconnection carries electrical current flow between the neighboring mesas in the electrical current flow direction.

    摘要翻译： 发光半导体器件管芯（10,110,210,310）包括电绝缘衬底（12,112）。 第一和第二空间分离的电极（60,62,260,262,360,362）设置在电绝缘基板上。 第一和第二电极限定从第一电极指向第二电极的电流流动方向。 多个发光二极管台面（30,130,130'，230,330）设置在第一和第二空间分离的电极之间的衬底上。 在相邻的发光二极管台面之间的基板上设置电气串联互连（50,150,250,350）。 每个串联互连在电流流动方向上在相邻台面之间承载电流。

    FLIP CHIP LIGHT EMITTING DIODE WITH MICROMESAS AND A CONDUCTIVE MESH
    6.
    发明申请
    FLIP CHIP LIGHT EMITTING DIODE WITH MICROMESAS AND A CONDUCTIVE MESH 失效
    FLIP芯片发光二极管与微型和导电网

    公开(公告)号：US20050230700A1

    公开(公告)日：2005-10-20

    申请号：US10826980

    申请日：2004-04-16

    申请人： Emil Stefanov ,  Hari Venugopalan ,  Bryan Shelton ,  Ivan Eliashevich

    发明人： Emil Stefanov ,  Hari Venugopalan ,  Bryan Shelton ,  Ivan Eliashevich

    IPC分类号： H01L23/52 ,  H01L33/08 ,  H01L33/38

    CPC分类号： H01L33/38 ,  H01L33/08 ,  H01L33/20

    摘要： A flip chip light emitting diode (12) includes a light-transmissive substrate (10) with a base semiconducting layer (40) disposed thereupon. A conductive mesh (18) is disposed on the base semiconducting layer (40) and is in electrically conductive contact therewith. Light-emitting micromesas (30) are disposed in openings (20) of the conductive mesh (18). Each light emitting micromesa (30) has a topmost layer (46) of a second conductivity type that is opposite the first conductivity type. A first conductivity type electrode (14) is disposed on the base semiconducting layer (40) and is in electrical communication with the electrically conductive mesh (18). An insulating layer (60) is disposed over the electrically conductive mesh (18). A second conductivity type electrode layer (24) is disposed over the insulating layer (60) and the light-emitting micromesas (30). the insulating layer (60) insulates the second conductivity type electrode layer (24) from the electrically conductive mesh (18).

    摘要翻译： 倒装芯片发光二极管（12）包括具有设置在其上的基极半导体层（40）的透光衬底（10）。 导电网（18）设置在基底半导体层（40）上并与其导电接触。 发光微镜（30）设置在导电网（18）的开口（20）中。 每个发光微镜（30）具有与第一导电类型相反的第二导电类型的最顶层（46）。 第一导电型电极（14）设置在基底半导体层（40）上并与导电网（18）电连通。 绝缘层（60）设置在导电网（18）之上。 第二导电型电极层（24）设置在绝缘层（60）和发光微孔（30）之上。 绝缘层（60）将第二导电型电极层（24）与导电网（18）绝缘。

    Led packages having improved light extraction
    8.
    发明授权
    Led packages having improved light extraction 失效
    LED封装具有改进的光提取

    公开(公告)号：US07015516B2

    公开(公告)日：2006-03-21

    申请号：US10417000

    申请日：2001-11-14

    申请人： Ivan Eliashevich ,  Robert F. Karlicek, Jr. ,  Hari Venugopalan

    发明人： Ivan Eliashevich ,  Robert F. Karlicek, Jr. ,  Hari Venugopalan

    IPC分类号： H01L33/00

    CPC分类号： H01L33/22

    摘要： A light-emitting microelectronic package includes a light-emitting diode (110) having a first region (114) of a first conductivity type, a second region (116) of a second conductivity type, and a light-emitting p-n junction (118) between the first and second regions. The light-emitting diode defines a lower contact surface (120) and a mesa (122) projecting upwardly from the lower contact surface. The first region (114) of a first conductivity type is disposed in the mesa (122) and defines a top surface of the mesa, and the second region (116) of a second conductivity type defines the lower contact surface that substantially surrounds the mesa (122). The mesa includes at least one sidewall (130) extending between the top surface (124) of the mesa and the lower contact surface (120), the at least one sidewall (130) having a roughened surface for optimizing light extraction from the package.

    摘要翻译： 发光微电子封装包括具有第一导电类型的第一区域（114）和第二导电类型的第二区域（116）和发光pn结（118）的发光二极管（110） 在第一和第二区域之间。 发光二极管限定从下接触表面向上突出的下接触表面（120）和台面（122）。 第一导电类型的第一区域（114）设置在台面（122）中并且限定台面的顶表面，并且第二导电类型的第二区域（116）限定基本上围绕台面的下接触表面 （122）。 台面包括在台面的顶表面（124）和下接触表面（120）之间延伸的至少一个侧壁（130），所述至少一个侧壁（130）具有粗糙表面，用于优化从包装中的光提取。

    Optimized contact design for thermosonic bonding of flip-chip devices
    9.
    发明授权
    Optimized contact design for thermosonic bonding of flip-chip devices 有权
    优化的倒装芯片器件热键合接触设计

    公开(公告)号：US07667236B2

    公开(公告)日：2010-02-23

    申请号：US10588473

    申请日：2004-12-22

    申请人： Ivan Eliashevich ,  Hari Venugopalan ,  Xiang Gao ,  Michael J. Sackrison

    发明人： Ivan Eliashevich ,  Hari Venugopalan ,  Xiang Gao ,  Michael J. Sackrison

    IPC分类号： H01L27/15

    CPC分类号： H01L33/382 ,  H01L33/20 ,  H01L33/62 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/12041 ,  H01L2224/05599

    摘要： A light emitting device (A) includes a semiconductor die (100). The semiconductor die includes: an epitaxial structure (120) arranged on a substrate (160), the epitaxial structure forming an active light generating region (140) between a first layer (120n) on a first side of the active region and having a first conductivity type, and a second layer (120p) on a second side of the active region and having a second conductivity type, the second side of the active region being opposite the first side of the active region and the second conductivity type being different that the first conductivity type; a first contact (180n) in operative electrical communication with the active region via the first layer in the epitaxial structure, the first contact being arranged on a side of the epitaxial structure opposite the substrate; a second contact (180p) in operative electrical communication with the active region via the second layer in the epitaxial structure, the second contact being arranged on a side of the epitaxial structure opposite the substrate; a first contact trace corresponding to the first contact and defined at a surface thereof distal from the substrate, the first trace including at least one area designated for bonding (320n); and, a second contact trace corresponding the second contact and defined at a surface thereof distal from the substrate, the second trace including at least one area (320p) designated for bonding. Suitably, the first contact trace is substantially enclosed within the second contact trace.

    摘要翻译： 发光器件（A）包括半导体管芯（100）。 所述半导体管芯包括：布置在衬底（160）上的外延结构（120），所述外延结构在所述有源区的第一侧上的第一层（120n）之间形成有源光产生区（140），并且具有第一 导电类型和在有源区的第二侧上的第二层（120p），并具有第二导电类型，有源区的第二面与有源区的第一侧相反，第二导电类型不同于 第一导电类型; 通过外延结构中的第一层与有源区域电连通的第一接触（180n），第一接触件布置在与衬底相对的外延结构的一侧上; 通过外延结构中的第二层与有源区域电连通的第二触点（180p），第二触点布置在与衬底相对的外延结构的一侧上; 第一接触迹线对应于第一接触并限定在其远离基底的表面，第一迹线包括指定用于接合的至少一个区域（320n）; 以及对应于所述第二接触并限定在其远离所述衬底的表面的第二接触迹线，所述第二迹线包括指定用于接合的至少一个区域（320p）。 适当地，第一接触迹线基本上封闭在第二接触迹线内。

    Contact to n-GaN with Au termination
    10.
    发明授权
    Contact to n-GaN with Au termination 有权
    接触到具有Au终端的n-GaN

    公开(公告)号：US06653215B1

    公开(公告)日：2003-11-25

    申请号：US09971965

    申请日：2001-10-05

    申请人： Michael G. Brown ,  Ivan Eliashevich ,  Keng Ouyang ,  Hari Venugopalan

    发明人： Michael G. Brown ,  Ivan Eliashevich ,  Keng Ouyang ,  Hari Venugopalan

    IPC分类号： H01L2128

    CPC分类号： H01L33/38 ,  H01L2933/0016

    摘要： A contact for n-type III-V semiconductor such as GaN and related nitride-based semiconductors is formed by depositing Al,Ti,Pt and Au in that order on the n-type semiconductor and annealing the resulting stack, desirably at about 400-600° C. for about 1-10 minutes. The resulting contact provides a low-resistance, ohmic contact to the semiconductor and excellent bonding to gold leads.

    摘要翻译： 通过在n型半导体上依次沉积Al，Ti，Pt和Au并且对所得到的叠层进行退火，最好在约400℃下，形成诸如GaN和相关氮化物基半导体的n型III-V半导体的触点， 600℃约1-10分钟。 所得到的接触提供了对半导体的低电阻，欧姆接触和与金引线的极好接合。