公开(公告)号：US20060022801A1

公开(公告)日：2006-02-02

申请号：US11194128

申请日：2005-07-29

申请人： David Husak ,  Robert Stephenson ,  Michael Grady ,  Scott Barvick ,  Pattabhiraman Krishna ,  Chilton Cabot ,  Jeffrey Fischer

发明人： David Husak ,  Robert Stephenson ,  Michael Grady ,  Scott Barvick ,  Pattabhiraman Krishna ,  Chilton Cabot ,  Jeffrey Fischer

IPC分类号： H04Q5/22

CPC分类号： G06K17/0029 ,  G01S5/0252 ,  G01S5/06 ,  G06K7/0008 ,  G06K7/10356 ,  G06K2017/0045 ,  G06K2017/0048 ,  G06K2017/0051

摘要： An architecture of an RFID system that facilitates the accessing of RFID tag data within an RFID environment. The architecture includes a plurality of RFID readers, each reader being operative to transmit a first RF signal for scanning at least one RFID tag disposed within an RF coverage region associated with the reader, and to receive at least one second RF signal including tag data in response to the scanning of the tag. The architecture further includes at least one host computer operative to execute at least one client application, and at least one controller/processor communicably coupled to the plurality of readers and the at least one host computer. The controller/processor is operative to control operation of the plurality of readers, to process the tag data received by the plurality of readers, and to provide the processed tag data to the at least one host computer for use by the at least one client application executing thereon.

摘要翻译： RFID系统的架构，便于在RFID环境中访问RFID标签数据。 该架构包括多个RFID读取器，每个读取器可操作以传送第一RF信号，用于扫描布置在与读取器相关联的RF覆盖区域内的至少一个RFID标签，并且接收至少一个包括标签数据的第二RF信号 响应扫描标签。 该架构进一步包括至少一个可操作以执行至少一个客户端应用的主计算机以及可通信地耦合到多个读取器和至少一个主计算机的至少一个控制器/处理器。 控制器/处理器可操作以控制多个读取器的操作，以处理由多个读取器接收的标签数据，并且将经处理的标签数据提供给至少一个主计算机以供至少一个客户端应用使用 在其上执行。

公开(公告)号：US20060022800A1

公开(公告)日：2006-02-02

申请号：US11194127

申请日：2005-07-29

申请人： Pattabhiraman Krishna ,  Jeffrey Fischer ,  David Husak ,  Robert Stephenson

发明人： Pattabhiraman Krishna ,  Jeffrey Fischer ,  David Husak ,  Robert Stephenson

IPC分类号： H04Q5/22

CPC分类号： G06K17/0029 ,  G01S5/0252 ,  G01S5/06 ,  G06K7/0008 ,  G06K7/10356 ,  G06K2017/0045 ,  G06K2017/0048 ,  G06K2017/0051

摘要： A system and method of scheduling RFID tag interrogations by a plurality of RFID readers so as to mitigate the effects of interference within an RFID environment in which the readers are deployed, and to enhance the efficiency and reliability of the overall RFID system. The system includes a plurality of RFID receivers for receiving RFID tag data, a plurality of RFID tag interrogators for transmitting RF interrogation signals for interrogating RFID tags, and a controller for providing to at least one interrogator, at least one receiver, and at least one tag, a parameter associated with operational characteristics of the interrogator, the receiver, and the tag, respectively. The interrogator, the receiver, and the tag are operative, in response to receipt of the respective parameter, to modify its operational characteristics in accordance with the respective parameter, thereby avoiding interference at the receivers and the tags.

摘要翻译： 一种通过多个RFID读取器调度RFID标签询问的系统和方法，以便减轻在其中部署读取器的RFID环境中的干扰的影响，并且提高整个RFID系统的效率和可靠性。 该系统包括用于接收RFID标签数据的多个RFID接收器，用于发送用于询问RFID标签的RF询问信号的多个RFID标签询问器，以及用于向至少一个询问器提供至少一个接收器的控制器，以及至少一个接收器 标签，分别与询问器，接收器和标签的操作特性相关联的参数。 响应于相应参数的接收，询问器，接收器和标签可操作，以根据相应的参数修改其操作特性，从而避免对接收器和标签的干扰。

公开(公告)号：US20070197006A1

公开(公告)日：2007-08-23

申请号：US11677099

申请日：2007-02-21

申请人： Ilija Dukovski ,  Robert Stephenson ,  Jean Augustin Chan Yiptong ,  Samed Halilov ,  Robert Mears ,  Xiangyang Huang ,  Marek Hytha

发明人： Ilija Dukovski ,  Robert Stephenson ,  Jean Augustin Chan Yiptong ,  Samed Halilov ,  Robert Mears ,  Xiangyang Huang ,  Marek Hytha

IPC分类号： H01L21/20 ,  H01L21/36 ,  H01L31/20

CPC分类号： H01L29/155 ,  H01L21/0237 ,  H01L21/02381 ,  H01L21/02439 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02499 ,  H01L21/02507 ,  H01L21/0251 ,  H01L21/02521 ,  H01L21/02532 ,  H01L21/28194 ,  H01L21/28255 ,  H01L29/1079 ,  H01L29/1083 ,  H01L29/152 ,  H01L29/51 ,  H01L29/513 ,  H01L29/78

摘要： A method for making a semiconductor device which may include forming a first monocrystalline layer comprising a first material having a first lattice constant, a second monocrystalline layer including a second material having a second lattice constant different than the first lattice constant, and a lattice matching layer between the first and second monocrystalline layers and comprising a superlattice. More particularly, the superlattice may include a plurality of groups of layers, and each group of layers may include a plurality of stacked semiconductor monolayers defining a semiconductor base portion and at least one non-semiconductor monolayer thereon. Furthermore, the at least one non-semiconductor monolayer may be constrained within a crystal lattice of adjacent base semiconductor portions, and at least some semiconductor atoms from opposing base semiconductor portions may be chemically bound together through the at least one non-semiconductor monolayer therebetween.

摘要翻译： 一种制造半导体器件的方法，其可以包括形成包括具有第一晶格常数的第一材料的第一单晶层，包括具有不同于第一晶格常数的第二晶格常数的第二材料的第二单晶层和晶格匹配层 在第一和第二单晶层之间并且包括超晶格。 更具体地，超晶格可以包括多组层，并且每组层可以包括限定半导体基底部分和至少一个非半导体单层的多个堆叠的半导体单层。 此外，至少一个非半导体单层可以被约束在相邻的基底半导体部分的晶格内，并且来自相对的基极半导体部分的至少一些半导体原子可以通过其间的至少一个非半导体单层化学地结合在一起。

公开(公告)号：US20060019454A1

公开(公告)日：2006-01-26

申请号：US11136747

申请日：2005-05-25

申请人： Robert Mears ,  Marek Hytha ,  Scott Kreps ,  Robert Stephenson ,  Jean Augustin Yiptong ,  Ilija Dukovski ,  Kalipatnam Rao ,  Samed Halilov ,  Xiangyang Huang

发明人： Robert Mears ,  Marek Hytha ,  Scott Kreps ,  Robert Stephenson ,  Jean Augustin Yiptong ,  Ilija Dukovski ,  Kalipatnam Rao ,  Samed Halilov ,  Xiangyang Huang

IPC分类号： H01L21/336 ,  H01L21/28 ,  H01L21/20

CPC分类号： B82Y10/00 ,  H01L21/823807 ,  H01L29/1054 ,  H01L29/152 ,  H01L29/155 ,  H01L29/513 ,  H01L29/7833

摘要： A method for making a semiconductor device may include forming a superlattice comprising a plurality of stacked groups of layers adjacent a substrate. Each group of layers of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The method may further include forming a high-K dielectric layer on the electrode layer, and forming an electrode layer on the high-K dielectric layer and opposite the superlattice.

摘要翻译： 制造半导体器件的方法可以包括形成包含与衬底相邻的多个堆叠层组的超晶格。 超晶格的每组层可以包括限定基极半导体部分的多个层叠的基底半导体单层和限制在相邻的基极半导体部分的晶格内的至少一个非半导体单层。 该方法还可以包括在电极层上形成高K电介质层，并在高K电介质层上形成与超晶格相对的电极层。

公开(公告)号：US20050167649A1

公开(公告)日：2005-08-04

申请号：US11097588

申请日：2005-04-01

申请人： Robert Mears ,  Robert Stephenson

发明人： Robert Mears ,  Robert Stephenson

IPC分类号： H01L21/8238 ,  H01L29/10 ,  H01L29/15 ,  H01L29/78 ,  H01L29/06

CPC分类号： H01L29/155 ,  B82Y10/00 ,  H01L21/823807 ,  H01L29/045 ,  H01L29/152 ,  H01L29/70 ,  H01L29/868

摘要： A semiconductor device may include a superlattice comprising a plurality of stacked groups of layers. Each group of layers of the superlattice may include a plurality of stacked base silicon monolayers defining a base silicon portion and an energy band-modifying layer thereon. The energy band-modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base silicon portions. The semiconductor device may further include a semiconductor layer adjacent the superlattice and comprising at least one first region therein including a first conductivity type dopant. The superlattice may also include at least one second region therein including a second conductivity type dopant to define, with the at least one first region, at least one semiconductor junction.

摘要翻译： 半导体器件可以包括包含多个堆叠层组的超晶格。 超晶格的每组层可以包括在其上限定基硅部分和能带修饰层的多个层叠的基底硅单层。 能带改性层可以包括约束在相邻基硅部分的晶格内的至少一个非半导体单层。 半导体器件还可以包括邻近超晶格的半导体层，并且包括其中包括第一导电型掺杂剂的至少一个第一区域。 超晶格还可以包括其中的至少一个第二区域，其中包括第二导电型掺杂剂，以在所述至少一个第一区域中限定至少一个半导体结。

公开(公告)号：US20070194298A1

公开(公告)日：2007-08-23

申请号：US11677098

申请日：2007-02-21

申请人： Ilija Dukovski ,  Robert Stephenson ,  Jean Augustin Yiptong ,  Samed Halilov ,  Robert Mears ,  Xiangyang Huang ,  Marek Hytha

发明人： Ilija Dukovski ,  Robert Stephenson ,  Jean Augustin Yiptong ,  Samed Halilov ,  Robert Mears ,  Xiangyang Huang ,  Marek Hytha

IPC分类号： H01L29/06

CPC分类号： H01L29/155 ,  H01L21/0237 ,  H01L21/02381 ,  H01L21/02439 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02499 ,  H01L21/02507 ,  H01L21/0251 ,  H01L21/02521 ,  H01L21/02532 ,  H01L21/28194 ,  H01L21/28255 ,  H01L29/1079 ,  H01L29/1083 ,  H01L29/152 ,  H01L29/51 ,  H01L29/513 ,  H01L29/78

摘要： A semiconductor device may include a first monocrystalline layer comprising a first material having a first lattice constant. A second monocrystalline layer may include a second material having a second lattice constant different than the first lattice constant. The device may also include a lattice matching layer between the first and second monocrystalline layers and comprising a superlattice. The superlattice may include a plurality of groups of layers, and each group of layers may include a plurality of stacked semiconductor monolayers defining a semiconductor base portion and at least one non-semiconductor monolayer thereon. The at least one non-semiconductor monolayer may be constrained within a crystal lattice of adjacent base semiconductor portions, and at least some semiconductor atoms from opposing base semiconductor portions may be chemically bound together through the at least one non-semiconductor monolayer therebetween.

摘要翻译： 半导体器件可以包括包含具有第一晶格常数的第一材料的第一单晶层。 第二单晶层可以包括具有不同于第一晶格常数的第二晶格常数的第二材料。 该器件还可以包括第一和第二单晶层之间的晶格匹配层并且包括超晶格。 超晶格可以包括多组层，并且每组层可以包括多个层叠的半导体单层，其限定半导体基底部分和至少一个非半导体单层。 至少一个非半导体单层可以被约束在相邻的基底半导体部分的晶格内，并且来自相对的基极半导体部分的至少一些半导体原子可以通过其间的至少一个非半导体单层化学地结合在一起。

公开(公告)号：US20070166928A1

公开(公告)日：2007-07-19

申请号：US11614559

申请日：2006-12-21

申请人： Samed Halilov ,  Xiangyang Huang ,  Ilija Dukovski ,  Jean Augustin Yiptong ,  Robert Mears ,  Marek Hytha ,  Robert Stephenson

发明人： Samed Halilov ,  Xiangyang Huang ,  Ilija Dukovski ,  Jean Augustin Yiptong ,  Robert Mears ,  Marek Hytha ,  Robert Stephenson

IPC分类号： H01L21/336

CPC分类号： H01L29/152 ,  B82Y10/00 ,  G01J5/34 ,  H01L28/55 ,  H01L29/151 ,  H01L29/40111 ,  H01L29/40117 ,  H01L29/516 ,  H01L29/78391 ,  H01L29/7881 ,  H01L37/025 ,  H01L41/183 ,  H03H9/02543

摘要： A method for making an electronic device may include forming a selectively polable superlattice comprising a plurality of stacked groups of layers. Each group of layers of the selectively polable superlattice may include a plurality of stacked semiconductor monolayers defining a semiconductor base portion and at least one non-semiconductor monolayer thereon. The at least one non-semiconductor monolayer may be constrained within a crystal lattice of adjacent silicon portions, and at least some semiconductor atoms from opposing base semiconductor portions may be chemically bound together through the at least one non-semiconductor monolayer therebetween. The method may further include coupling at least one electrode to the selectively polable superlattice for selective poling thereof.

摘要翻译： 制造电子器件的方法可以包括形成包括多个堆叠层组的选择性可覆盖的超晶格。 选择性可定向超晶格的每组层可以包括限定半导体基底部分和其上的至少一个非半导体单层的多个堆叠的半导体单层。 至少一个非半导体单层可以被约束在相邻硅部分的晶格内，并且来自相对的基极半导体部分的至少一些半导体原子可以通过其间的至少一个非半导体单层化学地结合在一起。 所述方法还可以包括将至少一个电极耦合到所述选择性可触发的超晶格以用于其选择性极化。

公开(公告)号：US20050272239A1

公开(公告)日：2005-12-08

申请号：US11136834

申请日：2005-05-25

申请人： Marek Hytha ,  Robert Stephenson ,  Scott Kreps

发明人： Marek Hytha ,  Robert Stephenson ,  Scott Kreps

IPC分类号： H01L21/20 ,  H01L21/205 ,  H01L21/8238 ,  H01L29/10 ,  H01L29/15 ,  H01L29/78 ,  H01L21/00 ,  H01L21/28 ,  H01L21/3205 ,  H01L21/76

CPC分类号： H01L29/7833 ,  B82Y10/00 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02507 ,  H01L21/02521 ,  H01L21/02532 ,  H01L21/02573 ,  H01L21/823807 ,  H01L29/1054 ,  H01L29/152 ,  H01L29/155 ,  Y10S438/938

摘要： A method for making a semiconductor device may include forming a superlattice including a plurality of stacked groups of layers, with each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The method may also include performing at least one anneal prior to completing forming of the superlattice.

摘要翻译： 制造半导体器件的方法可以包括形成包括多个层叠组的超晶格，其中每组层包括多个层叠的基底半导体单层，其限定基底半导体部分和至少一个非半导体单层 相邻基极半导体部分的晶格。 该方法还可以包括在完成超晶格形成之前执行至少一个退火。

公开(公告)号：US20050020487A1

公开(公告)日：2005-01-27

申请号：US10861590

申请日：2004-06-03

申请人： Stephen Klaus ,  Christopher Molineaux ,  Thomas Neff ,  Volkmar Guenzler-Pukall ,  Ingrid Langsetmo Parobok ,  Todd Seeley ,  Robert Stephenson

发明人： Stephen Klaus ,  Christopher Molineaux ,  Thomas Neff ,  Volkmar Guenzler-Pukall ,  Ingrid Langsetmo Parobok ,  Todd Seeley ,  Robert Stephenson

IPC分类号： A61K31/00 ,  A61K31/165 ,  A61K31/395 ,  A61P7/06 ,  A61K38/16

CPC分类号： C07D217/24 ,  A61K31/00 ,  A61K31/165 ,  A61K31/17 ,  A61K31/395 ,  A61K31/472 ,  C07C275/40

摘要： The present invention relates to methods and compounds for regulating or enhancing erthropoiesis and iron metabolism, and for treating or preventing iron deficiency and anemia of chronic disease.

摘要翻译： 本发明涉及用于调节或增强红细胞生成和铁代谢以及用于治疗或预防慢性疾病的铁缺乏和贫血的方法和化合物。

公开(公告)号：US20070158640A1

公开(公告)日：2007-07-12

申请号：US11614477

申请日：2006-12-21

申请人： Samed Halilov ,  Xiangyang Huang ,  Ilija Dukovski ,  Jean Augustin Yiptong ,  Robert Mears ,  Marek Hytha ,  Robert Stephenson

发明人： Samed Halilov ,  Xiangyang Huang ,  Ilija Dukovski ,  Jean Augustin Yiptong ,  Robert Mears ,  Marek Hytha ,  Robert Stephenson

IPC分类号： H01L29/06 ,  H01L31/00

CPC分类号： H01L29/152 ,  B82Y10/00 ,  G01J5/34 ,  H01L28/55 ,  H01L29/151 ,  H01L29/40111 ,  H01L29/40117 ,  H01L29/516 ,  H01L29/78391 ,  H01L29/7881 ,  H01L37/025 ,  H01L41/183 ,  H03H9/02543

摘要： An electronic device may include a poled superlattice comprising a plurality of stacked groups of layers and having a net electrical dipole moment. Each group of layers of the poled superlattice may include a plurality of stacked semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer thereon. The at least one non-semiconductor monolayer may be constrained within a crystal lattice of adjacent base semiconductor portions, and at least some semiconductor atoms from opposing base semiconductor portions may be chemically bound together through the at least one non-semiconductor monolayer therebetween. The electronic device may further include at least one electrode coupled to the poled superlattice.

摘要翻译： 电子设备可以包括极化的超晶格，其包括多个堆叠的层组，并且具有净电偶极矩。 极化超晶格的每组层可以包括限定基极半导体部分和其上的至少一个非半导体单层的多个堆叠的半导体单层。 至少一个非半导体单层可以被约束在相邻的基底半导体部分的晶格内，并且来自相对的基极半导体部分的至少一些半导体原子可以通过其间的至少一个非半导体单层化学地结合在一起。 电子设备还可以包括耦合到极化超晶格的至少一个电极。