摘要:
Methods are provided for fabricating packaged chips having protective layers, e.g., lids or other overlying layers having transparent, partially transparent, or opaque characteristics or a combination of such characteristics. Methods are provided for fabricating the packaged chips. Lidded chip structures and assemblies including lidded chips are also provided.
摘要:
A microelectronic device includes a chip having a front surface and a rear surface, the front surface having an active region and a plurality of contacts exposed at the front surface outside of the active region. The device further includes a lid overlying the front surface. The lid has edges bounding the lid, at least one of the edges including one or more outer portions and one or more recesses extending laterally inwardly from the outer portions, with the contacts being aligned with the recesses and exposed through them.
摘要:
Lidded chip packages are provided in which an optoelectronic device chip has microelectronic circuits exposed at a surface of the chip with a lid mounted to overlie the optoelectronic device and the microelectronic circuits. An opaque film may be attached to the lid to overlie the microelectronic circuits while exposing the optoelectronic device. Lidded chip packages are also provided in which the lid overlies an active or passive device mounted to the chip. Wiring traces may be embedded within an adhesive between the lid and the chip.
摘要:
Methods are provided for fabricating packaged chips, each packaged chip having a protective layer, e.g., a transparent lid, metallic enclosure layer, shield layer, etc., and methods are provided for manufacturing such protective layer to be incorporated into a packaged chip. Lidded chip structures, and assemblies are also provided which include lidded chips.
摘要:
A compliant structure is provided on a semiconductor wafer. The compliant structure includes cavities. The compliant structure and the wafer seal the cavities during process steps used to form conductive elements on the compliant structure. After processing, vents are opened to connect the cavities to the exterior of the assembly. The vents may be formed by severing the wafer and compliant structure to form individual units, so that the severance planes intersect channels or other voids communicating with the cavities. Alternatively, the vents may be formed by forming holes in the compliant structure, or by opening bores extending through the wafer.
摘要:
Methods are provided for making a plurality of lidded microelectronic elements. In an exemplary embodiment, a lid wafer is assembled with a device wafer. Desirably, the lid wafer is severed into a plurality of lid elements to remove portions of the lid wafer overlying contacts at a front face of the device wafer adjacent to dicing lanes of the device wafer. Thereafter, desirably, the device wafer is severed along the dicing lanes to provide a plurality of lidded microelectronic elements.
摘要:
A method of making chip assemblies includes providing an in-process assembly including a semiconductor wafer, a wafer compliant structure overlying a front surface of the wafer and cavities, and terminals carried on the compliant structure adjacent the cavities and electrically connected to the wafer, the cavities being substantially sealed. The method includes subdividing the in-process assembly to form individual chip assemblies, each including one or more chip regions of the wafer, a portion of the compliant structure and the terminals carried on the portion, and opening vents communicating with said cavities after said providing step.
摘要:
Packaged microelectronic elements are provided. In an exemplary embodiment, a microelectronic element having a front face and a plurality of peripheral edges bounding the front face has a device region at the front face and a contact region with a plurality of exposed contacts adjacent to at least one of the peripheral edges. The packaged element may include a plurality of support walls overlying the front face of the microelectronic element such that a lid can be mounted to the support walls above the microelectronic element. For example, the lid may have an inner surface confronting the front face. In a particular embodiment, some of the contacts can be exposed beyond edges of the lid.
摘要:
Selective area stamping of optical elements may be performed to make multiple micro-optic components on one or two sides of a substrate may be fabricated using a batch process. The presence of molding material may be controlled on the substrate through the use of gaps.
摘要:
Methods and apparatus for non-contact electrical probes are described. In accordance with the invention, non-contact electrical probes use negative or positive corona discharge. Non-contact electrical probes are suited for testing of OLED flat panel displays.