METHOD FOR MANUFACTURING THIN FILM TRANSISTOR ARRAY PANEL
    1.
    发明申请
    METHOD FOR MANUFACTURING THIN FILM TRANSISTOR ARRAY PANEL 有权
    制造薄膜晶体管阵列的方法

    公开(公告)号:US20120028421A1

    公开(公告)日:2012-02-02

    申请号:US13109686

    申请日:2011-05-17

    IPC分类号: H01L21/336

    摘要: A method for manufacturing a thin film transistor array panel includes forming a gate line; forming an insulating layer on the gate line; forming first and second silicon layers first and second metal layers; forming a photoresist pattern having first and second portions; forming first and second metal patterns by etching the first and second metal layers; processing the first metal pattern with SF6 or SF6/He; forming silicon and semiconductor patterns by etching the second and first silicon layers; removing the first portion of the photoresist pattern; forming an upper layer of a data wire by wet etching the second metal pattern; forming a lower layer of the data wire and an ohmic contact by etching the first metal and amorphous silicon patterns; forming a passivation layer including a contact hole on the upper layer; and forming a pixel electrode on the passivation layer.

    摘要翻译: 薄膜晶体管阵列板的制造方法包括:形成栅极线; 在栅极线上形成绝缘层; 第一和第二硅层第一和第二金属层; 形成具有第一和第二部分的光致抗蚀剂图案; 通过蚀刻第一和第二金属层形成第一和第二金属图案; 用SF6或SF6 / He处理第一金属图案; 通过蚀刻第二和第一硅层形成硅和半导体图案; 去除光致抗蚀剂图案的第一部分; 通过湿法蚀刻第二金属图案形成数据线的上层; 通过蚀刻第一金属和非晶硅图案形成数据线的下层和欧姆接触; 在上层形成包括接触孔的钝化层; 以及在所述钝化层上形成像素电极。

    THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME
    3.
    发明申请
    THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME 有权
    薄膜晶体管阵列及其制造方法

    公开(公告)号:US20110140111A1

    公开(公告)日:2011-06-16

    申请号:US12859792

    申请日:2010-08-20

    IPC分类号: H01L33/08 H01L21/336

    摘要: A thin film transistor array panel is provided and includes a gate line, a gate insulating layer covering the gate line, a semiconductor layer disposed on the gate insulating layer, and a data line and a drain electrode disposed on the semiconductor layer. The data line and the drain electrode have a dual-layered structure including a lower layer and an upper layer with the lower layer having a first portion protruded outside the upper layer and the semiconductor layer having a second portion protruded outside the edge of the lower layer.

    摘要翻译: 提供了一种薄膜晶体管阵列面板,包括栅极线,覆盖栅极线的栅极绝缘层,设置在栅极绝缘层上的半导体层,以及设置在半导体层上的数据线和漏电极。 数据线和漏电极具有包括下层和上层的双层结构,其中下层具有突出于上层之外的第一部分,并且半导体层具有突出于下层边缘外侧的第二部分 。

    THIN-FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME
    6.
    发明申请
    THIN-FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME 有权
    薄膜晶体管及其制造方法

    公开(公告)号:US20120037913A1

    公开(公告)日:2012-02-16

    申请号:US13167668

    申请日:2011-06-23

    IPC分类号: H01L29/786 H01L21/336

    摘要: A thin-film transistor (TFT) and a method of manufacturing the same are disclosed herein. The TFT may include a gate electrode disposed on an insulating substrate, an insulating layer disposed on the insulating substrate and the gate electrode, an active layer pattern disposed on the insulating layer to overlap the gate electrode, a source electrode disposed on the insulating layer and at least part of which overlaps the active layer pattern, and a drain electrode which is separated from the source electrode and at least part of which overlaps the active layer pattern. A first ohmic contact layer pattern may be disposed between the active layer pattern and the source electrode and between the active layer pattern and the drain electrode. The first ohmic contact layer may have higher nitrogen content on its surface than in other portions of the first ohmic contact layer.

    摘要翻译: 本文公开了一种薄膜晶体管(TFT)及其制造方法。 TFT可以包括设置在绝缘基板上的栅电极,设置在绝缘基板上的绝缘层和栅电极,设置在绝缘层上的与栅电极重叠的有源层图案,设置在绝缘层上的源电极和 其至少一部分与有源层图案重叠,以及与源电极分离并且其至少一部分与有源层图案重叠的漏电极。 可以在有源层图案和源电极之间以及有源层图案和漏电极之间设置第一欧姆接触层图案。 第一欧姆接触层在其表面上可以具有比在第一欧姆接触层的其它部分更高的氮含量。

    THIN FILM TRANSISTOR SUBSTRATE AND A FABRICATING METHOD THEREOF
    7.
    发明申请
    THIN FILM TRANSISTOR SUBSTRATE AND A FABRICATING METHOD THEREOF 有权
    薄膜晶体管基板及其制造方法

    公开(公告)号:US20100032664A1

    公开(公告)日:2010-02-11

    申请号:US12502653

    申请日:2009-07-14

    IPC分类号: H01L29/786 H01L21/336

    CPC分类号: H01L29/7869 H01L27/1225

    摘要: An oxide semiconductor thin film transistor substrate includes a gate line and a gate electrode disposed on an insulating substrate, an oxide semiconductor pattern disposed adjacent to the gate electrode, a data line electrically insulated from the gate line, the data line and the gate line defining a display region, a first opening exposing a surface of the data line, a second opening exposing a surface of the oxide semiconductor pattern, and a drain electrode disposed on the first opening and a drain electrode pad, the drain electrode extending from the first opening to the second opening and electrically connecting the drain electrode pad and the oxide semiconductor pattern.

    摘要翻译: 氧化物半导体薄膜晶体管基板包括栅极线和设置在绝缘基板上的栅电极,邻近栅电极设置的氧化物半导体图案,与栅极线电绝缘的数据线,数据线和限定线 显示区域,暴露数据线的表面的第一开口,暴露氧化物半导体图案的表面的第二开口和设置在第一开口上的漏电极和漏电极焊盘,漏电极从第一开口延伸 到第二开口并电连接漏电极焊盘和氧化物半导体图案。