公开(公告)号：US20060071292A1

公开(公告)日：2006-04-06

申请号：US10711744

申请日：2004-10-01

申请人： Douglas Coolbaugh ,  Ebenezer Eshun ,  Alvin Joseph ,  Robert Rassel

发明人： Douglas Coolbaugh ,  Ebenezer Eshun ,  Alvin Joseph ,  Robert Rassel

IPC分类号： H01L29/93 ,  H01L31/108

CPC分类号： H01L29/66143 ,  H01L29/0615 ,  H01L29/0692 ,  H01L29/872

摘要： Schottky barrier diodes use a dielectric separation region to bound an active region. The dielectric separation region permits the elimination of a guard ring in at least one dimension. Further, using a dielectric separation region in an active portion of the integrated circuit device may reduce or eliminate parasitic capacitance by eliminating this guard ring.

摘要翻译： 肖特基势垒二极管使用介电分离区域结合活性区域。 电介质分离区允许在至少一个维度上消除保护环。 此外，在集成电路器件的有源部分中使用介质分离区可以通过消除该保护环来减少或消除寄生电容。

公开(公告)号：US20070099386A1

公开(公告)日：2007-05-03

申请号：US11163791

申请日：2005-10-31

申请人： Douglas Coolbaugh ,  Ebenezer Eshun ,  Robert Rassel ,  James Slinkman ,  Michael Zierak

发明人： Douglas Coolbaugh ,  Ebenezer Eshun ,  Robert Rassel ,  James Slinkman ,  Michael Zierak

IPC分类号： H01L21/336 ,  H01L29/788

CPC分类号： H01L29/66659 ,  H01L21/26586

摘要： A method for fabricating high gain FETs that substantially reduces or eliminates unwanted variation in device characteristics caused by using a prior art shadow masking process is provided. The inventive method employs a blocking mask that at least partially extends over the gate region wherein after extension and halo implants an FET having an asymmetric halo region asymmetric extension regions or a combination thereof is fabricated. The inventive method thus provides high gain FETs in which the variation of device characteristics is substantially reduced. The present invention also relates to the resulting asymmetric high gain FET device that is fabricated utilizing the method of the present invention.

摘要翻译： 提供了一种制造高增益FET的方法，其基本上减少或消除了由使用现有技术的阴影掩蔽处理引起的器件特性的不必要的变化。 本发明的方法采用阻挡掩模，其在栅极区域上至少部分地延伸，其中在延伸和卤素注入之后，制造具有不对称卤素区域不对称延伸区域或其组合的FET。 因此，本发明的方法提供了高增益FET，其中器件特性的变化显着降低。 本发明还涉及利用本发明的方法制造的非对称高增益FET器件。

公开(公告)号：US20060145296A1

公开(公告)日：2006-07-06

申请号：US10905473

申请日：2005-01-06

申请人： Douglas Coolbaugh ,  Ebenezer Eshun ,  Richard Rassel ,  Robert Rassel

发明人： Douglas Coolbaugh ,  Ebenezer Eshun ,  Richard Rassel ,  Robert Rassel

IPC分类号： H01L29/00

CPC分类号： H01L28/20

摘要： Tunable TCR resistors incorporated into integrated circuits and a method fabricating the tunable TCR resistors. The tunable TCR resistors including two or more resistors of two or more different materials having opposite polarity and different magnitude TCRs, the same polarity and different magnitude TCRs or having opposite polarity and about the same TCRs.

摘要翻译： 整合在集成电路中的可调TCR电阻和制造可调TCR电阻的方法。 可调TCR电阻器包括具有相反极性和不同幅度TCR，相同极性和不同幅度TCR或具有相反极性和大约相同TCR的两种或更多种不同材料的两个或更多个电阻器。

公开(公告)号：US20050230785A1

公开(公告)日：2005-10-20

申请号：US10709115

申请日：2004-04-14

申请人： Douglas Coolbaugh ,  Ebenezer Eshun ,  Robert Rassel ,  Anthony Stamper

发明人： Douglas Coolbaugh ,  Ebenezer Eshun ,  Robert Rassel ,  Anthony Stamper

IPC分类号： H01C17/26 ,  H01L29/76

CPC分类号： H01C17/267

摘要： A structure for resistors and the method for tuning the same. The resistor comprises an electrically conducting region coupled to a liner region. Both the electrically conducting region and the liner region are electrically coupled to first and second contact regions. A voltage difference is applied between the first and second contact regions. As a result, a current flows between the first and second contact regions in the electrically conducting region. The voltage difference and the materials of the electrically conducting region and the liner region are such that electromigration occurs only in the electrically conducting region. As a result, a void region within the electrically conducting region expands in the direction of the flow of the charged particles constituting the current. Because the resistor loses a conducting portion of the electrically conducting region to the void region, the resistance of the resistor is increased (i.e., tuned).

摘要翻译： 电阻器结构及其调谐方法。 电阻器包括耦合到衬垫区域的导电区域。 导电区域和衬里区域都电耦合到第一和第二接触区域。 在第一和第二接触区域之间施加电压差。 结果，电流在导电区域中的第一和第二接触区域之间流动。 导电区域和衬垫区域的电压差和材料使得电迁移仅在导电区域中发生。 结果，导电区域内的空隙区域在构成电流的带电粒子的流动方向上膨胀。 因为电阻器将导电区域的导电部分损失到空隙区域，电阻器的电阻增加（即调谐）。

公开(公告)号：US20070254449A1

公开(公告)日：2007-11-01

申请号：US11627408

申请日：2007-01-26

申请人： Douglas Coolbaugh ,  Ebenezer Eshun ,  Richard Rassel ,  Robert Rassel

发明人： Douglas Coolbaugh ,  Ebenezer Eshun ,  Richard Rassel ,  Robert Rassel

IPC分类号： H01L21/20

CPC分类号： H01L28/20

摘要： Tunable TCR resistors incorporated into integrated circuits and a method fabricating the tunable TCR resistors. The tunable TCR resistors including two or more resistors of two or more different materials having opposite polarity and different magnitude TCRs, the same polarity and different magnitude TCRs or having opposite polarity and about the same TCRs.

摘要翻译： 整合在集成电路中的可调TCR电阻和制造可调TCR电阻的方法。 可调TCR电阻器包括具有相反极性和不同幅度TCR，相同极性和不同幅度TCR或具有相反极性和大约相同TCR的两种或更多种不同材料的两个或更多个电阻器。

公开(公告)号：US20070194390A1

公开(公告)日：2007-08-23

申请号：US11276282

申请日：2006-02-22

申请人： Anil Chinthakindi ,  Douglas Coolbaugh ,  Keith Downes ,  Ebenezer Eshun ,  John Florkey ,  Heidi Greer ,  Robert Rassel ,  Anthony Stamper ,  Kunal Vaed

发明人： Anil Chinthakindi ,  Douglas Coolbaugh ,  Keith Downes ,  Ebenezer Eshun ,  John Florkey ,  Heidi Greer ,  Robert Rassel ,  Anthony Stamper ,  Kunal Vaed

IPC分类号： H01L29/76

CPC分类号： H01L29/8605 ,  H01L27/0802 ,  H01L28/20

摘要： The present invention provides a semiconductor structure including a buried resistor with improved control, in which the resistor is fabricated in a region of a semiconductor substrate beneath a well region that is also present in the substrate. In accordance with the present invention, the inventive structure includes a semiconductor substrate containing at least a well region; and a buried resistor located in a region of the semiconductor substrate that is beneath said well region. The present invention also provides a method of fabricating such a structure in which a deep ion implantation process is used to form the buried resistor and a shallower ion implantation process is used in forming the well region.

摘要翻译： 本发明提供一种包括具有改进控制的掩埋电阻器的半导体结构，其中电阻器制造在半导体衬底的也存在于衬底中的阱区域下方的区域中。 根据本发明，本发明的结构包括至少含有一个阱区的半导体衬底; 以及位于半导体衬底的位于所述阱区之下的区域中的掩埋电阻器。 本发明还提供一种制造这样的结构的方法，其中使用深离子注入工艺来形成掩埋电阻器，并且在形成阱区域中使用较浅的离子注入工艺。

公开(公告)号：US20080090407A1

公开(公告)日：2008-04-17

申请号：US11953927

申请日：2007-12-11

申请人： Douglas Coolbaugh ,  Daniel Edelstein ,  Ebenezer Eshun ,  Zhong-Xiang He ,  Robert Rassel ,  Anthony Stamper

发明人： Douglas Coolbaugh ,  Daniel Edelstein ,  Ebenezer Eshun ,  Zhong-Xiang He ,  Robert Rassel ,  Anthony Stamper

IPC分类号： H01L21/44

CPC分类号： H01L24/11 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/05006 ,  H01L2224/05007 ,  H01L2224/05022 ,  H01L2224/05554 ,  H01L2224/05568 ,  H01L2224/05572 ,  H01L2224/13007 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/16 ,  H01L2224/45124 ,  H01L2924/0001 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/48 ,  H01L2224/05552

摘要： Terminal pads and methods of fabricating terminal pads. The methods including forming a conductive diffusion barrier under a conductive pad in or overlapped by a passivation layer comprised of multiple dielectric layers including diffusion barrier layers. The methods including forming the terminal pads subtractively or by a damascene process.

摘要翻译： 端子焊盘和制造端子焊盘的方法。 所述方法包括在由包括扩散阻挡层的多个电介质层组成的钝化层的内部或与其重叠的导电焊盘下方形成导电扩散阻挡层。 所述方法包括减法地形成端子焊盘或通过镶嵌工艺。

公开(公告)号：US20080042798A1

公开(公告)日：2008-02-21

申请号：US11848263

申请日：2007-08-31

申请人： Douglas Coolbaugh ,  Ebenezer Eshun ,  Terence Hook ,  Robert Rassel ,  Edmund Sprogis ,  Anthony Stamper ,  William Murphy

发明人： Douglas Coolbaugh ,  Ebenezer Eshun ,  Terence Hook ,  Robert Rassel ,  Edmund Sprogis ,  Anthony Stamper ,  William Murphy

IPC分类号： H01C1/08

CPC分类号： H01C7/1013 ,  H01C1/084 ,  H01L2924/0002 ,  Y10T29/49083 ,  Y10T29/49085 ,  Y10T29/49099 ,  Y10T29/49144 ,  Y10T29/49147 ,  H01L2924/00

摘要： A resistor with heat sink is provided. The heat sink includes a conductive path having metal or other thermal conductor having a high thermal conductivity. To avoid shorting the electrical resistor to ground with the thermal conductor, a thin layer of high thermal conductivity electrical insulator is interposed between the thermal conductor and the body of the resistor. Accordingly, a resistor can carry large amounts of current because the high conductivity thermal conductor will conduct heat away from the resistor to a heat sink. Various configurations of thermal conductors and heat sinks are provided offering good thermal conductive properties in addition to reduced parasitic capacitances and other parasitic electrical effects, which would reduce the high frequency response of the electrical resistor.

公开(公告)号：US20070187800A1

公开(公告)日：2007-08-16

申请号：US11737304

申请日：2007-04-19

申请人： Douglas Coolbaugh ,  Ebenezer Eshun ,  Robert Rassel ,  Anthony Stamper

发明人： Douglas Coolbaugh ,  Ebenezer Eshun ,  Robert Rassel ,  Anthony Stamper

IPC分类号： H01L29/00 ,  H01L21/20

CPC分类号： H01C17/267

摘要： A structure for resistors and the method for tuning the same. The resistor comprises an electrically conducting region coupled to a liner region. Both the electrically conducting region and the liner region are electrically coupled to first and second contact regions. A voltage difference is applied between the first and second contact regions. As a result, a current flows between the first and second contact regions in the electrically conducting region. The voltage difference and the materials of the electrically conducting region and the liner region are such that electromigration occurs only in the electrically conducting region. As a result, a void region within the electrically conducting region expands in the direction of the flow of the charged particles constituting the current. Because the resistor loses a conducting portion of the electrically conducting region to the void region, the resistance of the resistor is increased (i.e., tuned).

摘要翻译： 电阻器结构及其调谐方法。 电阻器包括耦合到衬垫区域的导电区域。 导电区域和衬里区域都电耦合到第一和第二接触区域。 在第一和第二接触区域之间施加电压差。 结果，电流在导电区域中的第一和第二接触区域之间流动。 导电区域和衬垫区域的电压差和材料使得电迁移仅在导电区域中发生。 结果，导电区域内的空隙区域在构成电流的带电粒子的流动方向上膨胀。 因为电阻器将导电区域的导电部分损失到空隙区域，电阻器的电阻增加（即调谐）。

公开(公告)号：US20070158714A1

公开(公告)日：2007-07-12

申请号：US11164382

申请日：2005-11-21

申请人： Ebenezer Eshun ,  Jessie Abbotts ,  Daniel Colello ,  Douglas Coolbaugh ,  Zhong-Xiang He ,  Matthew Moon ,  Charles Musante ,  Robert Rassel

发明人： Ebenezer Eshun ,  Jessie Abbotts ,  Daniel Colello ,  Douglas Coolbaugh ,  Zhong-Xiang He ,  Matthew Moon ,  Charles Musante ,  Robert Rassel

IPC分类号： H01L29/94

CPC分类号： H01L28/60 ,  H01L21/76895

摘要： A MIM capacitor technique is described wherein bottom plates (electrodes) are composed of gate conductor material, and are formed in the same layer, in the same way, using the same masking and processing steps as transistor gates. The top plates (electrodes) are formed using a simple single-mask, single-damascene process. Electrical connections to both electrodes of the MIM capacitor are made via conventional BEOL metallization, requiring no additional dedicated process steps. The bottom plates (formed of gate conductor material) of the MIM capacitors overlie STI regions formed at the same time as STI regions between transistors. Method and apparatus are described.

摘要翻译： 描述了MIM电容器技术，其中底板（电极）由栅极导体材料构成，并且以相同的方式使用与晶体管栅极相同的掩模和处理步骤形成在相同的层中。 顶板（电极）使用简单的单掩模，单镶嵌工艺形成。 与MIM电容器的两个电极的电连接通过常规BEOL金属化制成，不需要额外的专用工艺步骤。 MIM电容器的底板（由栅极导体材料形成）覆盖与晶体管之间的STI区域同时形成的STI区域。 描述了方法和装置。