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公开(公告)号：US20140184333A1
公开(公告)日：2014-07-03
申请号：US13950895
申请日：2013-07-25
Inventor： Sang-Heung LEE , Seong-il Kim , Dong Min Kang , Jong-Won Lim , Chull Won Ju , Hyung Sup Yoon , Jae Kyoung Mun , Eun Soo Nam
IPC: H03G3/30
CPC classification number: H03F3/08 , H03G1/0047 , H03G1/0088 , H03G3/02 , H03G3/3084 , H03G11/02
Abstract: Provided is a feedback amplifier. The feedback amplifier includes: an amplification circuit unit amplifying a bust packet signal inputted from an input terminal and outputting the amplified voltage to an output terminal; a feedback circuit unit disposed between the input terminal and the output terminal and controlling whether to apply a fixed resistance value to a signal outputted to the output terminal; a packet signal detection unit detecting a peak value of a bust packet signal from the output terminal and controlling whether to apply the fixed resistance value; and a bias circuit unit generating a bias voltage, wherein the feedback circuit unit determines a feedback resistance value to change the fixed resistance value in response to at least one control signal and adjusts a gain by receiving the bias voltage.
Abstract translation: 提供反馈放大器。 反馈放大器包括：放大电路单元，放大从输入端子输入的突发分组信号，并将放大的电压输出到输出端子; 反馈电路单元，设置在所述输入端子和所述输出端子之间，并且控制是否对输出到所述输出端子的信号施加固定电阻值; 分组信号检测单元，检测来自输出端的突发分组信号的峰值，并控制是否施加固定电阻值; 以及产生偏置电压的偏置电路单元，其中所述反馈电路单元确定反馈电阻值以响应于至少一个控制信号改变所述固定电阻值，并且通过接收所述偏置电压来调整增益。
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公开(公告)号：US09209266B2
公开(公告)日：2015-12-08
申请号：US14555182
申请日：2014-11-26
Inventor： Jong-Won Lim , Ho Kyun Ahn , Young Rak Park , Dong Min Kang , Woo Jin Chang , Seong-il Kim , Sung Bum Bae , Sang-Heung Lee , Hyung Sup Yoon , Chull Won Ju , Jae Kyoung Mun , Eun Soo Nam
IPC: H01L21/265 , H01L21/336 , H01L21/28 , H01L29/66 , H01L29/423 , H01L29/778 , H01L29/16 , H01L21/311
CPC classification number: H01L29/66431 , H01L21/28255 , H01L21/31116 , H01L21/31144 , H01L29/1608 , H01L29/42316 , H01L29/42376 , H01L29/66068 , H01L29/7787
Abstract: Disclosed is a manufacturing method of a high electron mobility transistor. The method includes: forming a source electrode and a drain electrode on a substrate; forming a first insulating film having a first opening on an entire surface of the substrate, the first opening exposing a part of the substrate; forming a second insulating film having a second opening within the first opening, the second opening exposing a part of the substrate; forming a third insulating film having a third opening within the second opening, the third opening exposing a part of the substrate; etching a part of the first insulating film, the second insulating film and the third insulating film so as to expose the source electrode and the drain electrode; and forming a T-gate electrode on a support structure including the first insulating film, the second insulating film and the third insulating film.
Abstract translation: 公开了一种高电子迁移率晶体管的制造方法。 该方法包括：在基板上形成源电极和漏电极; 在所述基板的整个表面上形成具有第一开口的第一绝缘膜，所述第一开口暴露所述基板的一部分; 在所述第一开口内形成具有第二开口的第二绝缘膜，所述第二开口暴露所述基板的一部分; 在所述第二开口内形成具有第三开口的第三绝缘膜，所述第三开口暴露所述基板的一部分; 蚀刻第一绝缘膜，第二绝缘膜和第三绝缘膜的一部分，以使源电极和漏电极露出; 以及在包括第一绝缘膜，第二绝缘膜和第三绝缘膜的支撑结构上形成T栅电极。
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Patent Agency Ranking
公开(公告)号：US09178474B2
公开(公告)日：2015-11-03
申请号：US13950895
申请日：2013-07-25
Inventor： Sang-Heung Lee , Seong-il Kim , Dong Min Kang , Jong-Won Lim , Chull Won Ju , Hyung Sup Yoon , Jae Kyoung Mun , Eun Soo Nam
CPC classification number: H03F3/08 , H03G1/0047 , H03G1/0088 , H03G3/02 , H03G3/3084 , H03G11/02
Abstract: Provided is a feedback amplifier. The feedback amplifier includes: an amplification circuit unit amplifying a burst packet signal inputted from an input terminal and outputting the amplified voltage to an output terminal; a feedback circuit unit disposed between the input terminal and the output terminal and controlling whether to apply a fixed resistance value to a signal outputted to the output terminal; a packet signal detection unit detecting a peak value of a burst packet signal from the output terminal and controlling whether to apply the fixed resistance value; and a bias circuit unit generating a bias voltage, wherein the feedback circuit unit determines a feedback resistance value to change the fixed resistance value in response to at least one control signal and adjusts a gain by receiving the bias voltage.
Abstract translation: 提供反馈放大器。 反馈放大器包括：放大电路单元，放大从输入端子输入的突发分组信号，并将放大的电压输出到输出端子; 反馈电路单元，设置在所述输入端子和所述输出端子之间，并且控制是否对输出到所述输出端子的信号施加固定电阻值; 分组信号检测单元，检测来自输出端的突发分组信号的峰值，并控制是否应用固定电阻值; 以及产生偏置电压的偏置电路单元，其中所述反馈电路单元确定反馈电阻值以响应于至少一个控制信号改变所述固定电阻值，并且通过接收所述偏置电压来调整增益。
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公开(公告)号：US10256811B2
公开(公告)日：2019-04-09
申请号：US15654792
申请日：2017-07-20
Inventor： Woojin Chang , Jong-Won Lim , Dong Min Kang , Dong-Young Kim , Seong-il Kim , Hae Cheon Kim , Jae Won Do , Byoung-Gue Min , Min Jeong Shin , Hokyun Ahn , Hyung Sup Yoon , Sang-Heung Lee , Jongmin Lee , Sungjae Chang , Yoo Jin Jang , Hyunwook Jung , Kyu Jun Cho , Hong Gu Ji
IPC: H03K17/687 , H03K17/693 , G11C5/14 , H03K19/0175 , H03K3/353 , H03K17/0812 , H03K17/10 , H03K17/12 , H03K17/14 , H03K17/16 , H03K17/28
Abstract: Provided is a cascode circuit including first and second transistors connected between a drain terminal and a source terminal in cascode form, a level sifter configured to change a voltage level of a switching control signal applied to a gate terminal and provide the changed switching control signal to a gate of the first transistor, a buffer configured to delay the switching control signal and provide the delayed switching control signal to a gate of the second transistor, and a first resistor connected between the level shifter and the gate of the first transistor.
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5.发明授权公开(公告)号：US08841154B2
公开(公告)日：2014-09-23
申请号：US13916006
申请日：2013-06-12
Inventor： Hyung Sup Yoon , Byoung-Gue Min , Jong-Won Lim , Ho Kyun Ahn , Jong Min Lee , Seong-il Kim , Jae Kyoung Mun , Eun Soo Nam
CPC classification number: H01L21/28008 , H01L21/28587 , H01L29/42316 , H01L29/66863
Abstract: Disclosed is a method of manufacturing a field effect type compound semiconductor device in which leakage current of a device is decreased and breakdown voltage is enhanced. The method of manufacturing a field effect type compound semiconductor device includes: stacking an active layer and an ohmic layer on a substrate and forming a first oxide layer on the ohmic layer; forming a mesa region in predetermined regions of the first oxide layer, the ohmic layer, and the active layer; planarizing the mesa region after forming a nitride layer by evaporating a nitride on the mesa region; forming an ohmic electrode on the first oxide layer; forming a minute gate resist pattern after forming a second oxide layer on a semiconductor substrate in which the ohmic electrode is formed and forming a minute gate pattern having a under-cut shaped profile by dry-etching the first oxide layer, the nitride layer, and the second oxide layer; forming a gate recess region by forming a head pattern of a gamma gate electrode on the semiconductor substrate; and forming the gamma gate electrode by evaporating refractory metal on the semiconductor substrate in which the gate recess region is formed.
Abstract translation: 公开了一种制造场效应型化合物半导体器件的方法，其中器件的漏电流降低并且击穿电压增强。 制造场效应型化合物半导体器件的方法包括：在衬底上堆叠有源层和欧姆层，并在欧姆层上形成第一氧化物层; 在所述第一氧化物层，所述欧姆层和所述有源层的预定区域中形成台面区域; 通过在台面区域上蒸发氮化物，在形成氮化物层之后使台面区域平坦化; 在所述第一氧化物层上形成欧姆电极; 在形成欧姆电极的半导体衬底上形成第二氧化物层之后形成微小栅极抗蚀剂图案，并通过干蚀刻第一氧化物层，氮化物层和形成具有下切形状轮廓的微小栅极图案 第二氧化物层; 通过在所述半导体衬底上形成伽马栅电极的头部图形来形成栅极凹部区域; 以及通过在形成有所述栅极凹部的所述半导体衬底上蒸发难熔金属而形成所述γ栅电极。
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公开(公告)号：US20140167806A1
公开(公告)日：2014-06-19
申请号：US14020931
申请日：2013-09-09
Inventor： Chul Won JU , Hyung Sup Yoon , Jong-Won Lim , Sang-Heung Lee , Seong-il Kim , Dong Min Kang , Eun Soo Nam , Jae Kyoung Mun
IPC: G01R1/04
CPC classification number: G01R1/0466 , G01R1/0458
Abstract: Provided is a semiconductor device testing apparatus including a first socket configured to load a package, on which a semiconductor device to be tested may be mounted, and a second socket coupled to the first socket. The first socket may include an upper part including a hole configured to accommodate the package and a terminal pad provided at both side edges of the hole to hold input and output terminals of the package, and a lower part including a heating room, in which a heater and a temperature sensing part may be provided, the heater being configured to heat the semiconductor device and the temperature sensing part being configured to measure temperature of the semiconductor device. The second socket may include a probe card with a pattern that may be configured to receive test signals from an external power source.
Abstract translation: 提供一种半导体器件测试装置，包括：第一插座，被配置为加载可以安装待测试的半导体器件的封装，以及耦合到第一插座的第二插座。 第一插座可以包括上部，其包括被配置为容纳封装的孔和设置在孔的两个侧边缘处的端子垫，以保持封装的输入和输出端子，以及包括加热室的下部，其中 加热器和温度检测部件，加热器被配置为加热半导体器件，并且温度检测部分被配置为测量半导体器件的温度。 第二插座可以包括具有可被配置为从外部电源接收测试信号的模式的探针卡。
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7.发明申请公开(公告)号：US20140017885A1
公开(公告)日：2014-01-16
申请号：US13916006
申请日：2013-06-12
Inventor： Hyung Sup YOON , Byoung-gue Min , Jong-Won Lim , Ho Kyun Ahn , Jong Min Lee , Seong-il Kim , Jae Kyoung Mun , Eun Soo Nam
IPC: H01L21/28
CPC classification number: H01L21/28008 , H01L21/28587 , H01L29/42316 , H01L29/66863
Abstract: Disclosed is a method of manufacturing a field effect type compound semiconductor device in which leakage current of a device is decreased and breakdown voltage is enhanced. The method of manufacturing a field effect type compound semiconductor device includes: stacking an active layer and an ohmic layer on a substrate and forming a first oxide layer on the ohmic layer; forming a mesa region in predetermined regions of the first oxide layer, the ohmic layer, and the active layer; planarizing the mesa region after forming a nitride layer by evaporating a nitride on the mesa region; forming an ohmic electrode on the first oxide layer; forming a minute gate resist pattern after forming a second oxide layer on a semiconductor substrate in which the ohmic electrode is formed and forming a minute gate pattern having a under-cut shaped profile by dry-etching the first oxide layer, the nitride layer, and the second oxide layer; forming a gate recess region by forming a head pattern of a gamma gate electrode on the semiconductor substrate; and forming the gamma gate electrode by evaporating refractory metal on the semiconductor substrate in which the gate recess region is formed.
Abstract translation: 公开了一种制造场效应型化合物半导体器件的方法，其中器件的漏电流降低并且击穿电压增强。 制造场效应型化合物半导体器件的方法包括：在衬底上堆叠有源层和欧姆层，并在欧姆层上形成第一氧化物层; 在所述第一氧化物层，所述欧姆层和所述有源层的预定区域中形成台面区域; 通过在台面区域上蒸发氮化物，在形成氮化物层之后使台面区域平坦化; 在所述第一氧化物层上形成欧姆电极; 在形成欧姆电极的半导体衬底上形成第二氧化物层之后形成微小栅极抗蚀剂图案，并通过干蚀刻第一氧化物层，氮化物层和形成具有下切形状轮廓的微小栅极图案 第二氧化物层; 通过在所述半导体衬底上形成伽马栅电极的头部图形来形成栅极凹部区域; 以及通过在形成有所述栅极凹部的所述半导体衬底上蒸发难熔金属而形成所述γ栅电极。
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