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公开(公告)号：US09837719B2
公开(公告)日：2017-12-05
申请号：US15229891
申请日：2016-08-05
Inventor： Dong-Young Kim , Dong Min Kang , Seong-Il Kim , Hae Cheon Kim , Jae Won Do , Byoung-Gue Min , Ho Kyun Ahn , Hyung Sup Yoon , Sang-Heung Lee , Jong Min Lee , Jong-Won Lim , Yoo Jin Jang , Hyun Wook Jung , Kyu Jun Cho , Chull Won Ju
CPC classification number: H01Q9/0407 , H01Q1/50 , H01Q9/0442
Abstract: Provided herein is a patch antenna including a multilayered substrate on which a plurality of dielectric layers are laminated; at least one metal pattern layer disposed between the plurality of dielectric layers outside a central area of the multilayered substrate; an antenna patch disposed on an upper surface of the multilayered substrate and within the central area; a ground layer disposed on a lower surface of the multilayered substrate; a plurality of connection via patterns penetrating the plurality of dielectric layers to connect the metal pattern layer and the ground layer, and surrounding the central area; a transmission line comprising a first transmission line unit disposed on the upper surface of the multilayered substrate and located outside the central area, and a second transmission line unit disposed on the upper surface of the multilayered substrate and located within the central area; and an impedance transformer located below the second transmission line unit within the central area of the multilayered substrate.
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公开(公告)号：US09419123B1
公开(公告)日：2016-08-16
申请号：US14803877
申请日：2015-07-20
Inventor： Jong Min Lee
IPC: H01L29/778 , H01L29/66 , H01L29/10 , H01L21/265
CPC classification number: H01L29/7786 , H01L21/2654 , H01L21/7605 , H01L29/0642 , H01L29/1029 , H01L29/2003
Abstract: In a method for fabricating a field effect power electronic device, an epi layer is formed on a substrate defined by a device isolation area and a device operation area. A mask pattern is formed which covers the epi layer in the device operation area and has openings positioned at a predetermined distance along a first direction. An inside of the epi layer having the mask pattern formed thereon is formed as an active area, and a non-active area is formed by implanting ions into an inside of the epi layer having the mask pattern not formed thereon. The mask pattern is removed. Source and drain electrodes are formed, in a second direction, on the epi layer in the device operation area with the non-active area interposed therebetween. A gate electrode is formed on the epi layer in the device operation area between the source electrode and the drain electrode.
Abstract translation: 在制造场效应电力电子装置的方法中，在由装置隔离区域和装置操作区域限定的基板上形成外延层。 形成掩模图案，其掩盖设备操作区域中的外延层，并具有沿第一方向定位在预定距离处的开口。 形成有其上形成有掩模图案的外延层的内部形成为有源区，并且通过将离子注入到其中未形成掩模图案的外延层的内部形成非有源区。 去除掩模图案。 源极和漏极电极在第二方向上在器件操作区域中的外延层上形成，其中非有源区域插入其间。 在源电极和漏电极之间的器件操作区域中的外延层上形成栅电极。
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3.发明授权公开(公告)号：US08841154B2
公开(公告)日：2014-09-23
申请号：US13916006
申请日：2013-06-12
Inventor： Hyung Sup Yoon , Byoung-Gue Min , Jong-Won Lim , Ho Kyun Ahn , Jong Min Lee , Seong-il Kim , Jae Kyoung Mun , Eun Soo Nam
CPC classification number: H01L21/28008 , H01L21/28587 , H01L29/42316 , H01L29/66863
Abstract: Disclosed is a method of manufacturing a field effect type compound semiconductor device in which leakage current of a device is decreased and breakdown voltage is enhanced. The method of manufacturing a field effect type compound semiconductor device includes: stacking an active layer and an ohmic layer on a substrate and forming a first oxide layer on the ohmic layer; forming a mesa region in predetermined regions of the first oxide layer, the ohmic layer, and the active layer; planarizing the mesa region after forming a nitride layer by evaporating a nitride on the mesa region; forming an ohmic electrode on the first oxide layer; forming a minute gate resist pattern after forming a second oxide layer on a semiconductor substrate in which the ohmic electrode is formed and forming a minute gate pattern having a under-cut shaped profile by dry-etching the first oxide layer, the nitride layer, and the second oxide layer; forming a gate recess region by forming a head pattern of a gamma gate electrode on the semiconductor substrate; and forming the gamma gate electrode by evaporating refractory metal on the semiconductor substrate in which the gate recess region is formed.
Abstract translation: 公开了一种制造场效应型化合物半导体器件的方法，其中器件的漏电流降低并且击穿电压增强。 制造场效应型化合物半导体器件的方法包括：在衬底上堆叠有源层和欧姆层，并在欧姆层上形成第一氧化物层; 在所述第一氧化物层，所述欧姆层和所述有源层的预定区域中形成台面区域; 通过在台面区域上蒸发氮化物，在形成氮化物层之后使台面区域平坦化; 在所述第一氧化物层上形成欧姆电极; 在形成欧姆电极的半导体衬底上形成第二氧化物层之后形成微小栅极抗蚀剂图案，并通过干蚀刻第一氧化物层，氮化物层和形成具有下切形状轮廓的微小栅极图案 第二氧化物层; 通过在所述半导体衬底上形成伽马栅电极的头部图形来形成栅极凹部区域; 以及通过在形成有所述栅极凹部的所述半导体衬底上蒸发难熔金属而形成所述γ栅电极。
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4.发明申请公开(公告)号：US20140017885A1
公开(公告)日：2014-01-16
申请号：US13916006
申请日：2013-06-12
Inventor： Hyung Sup YOON , Byoung-gue Min , Jong-Won Lim , Ho Kyun Ahn , Jong Min Lee , Seong-il Kim , Jae Kyoung Mun , Eun Soo Nam
IPC: H01L21/28
CPC classification number: H01L21/28008 , H01L21/28587 , H01L29/42316 , H01L29/66863
Abstract: Disclosed is a method of manufacturing a field effect type compound semiconductor device in which leakage current of a device is decreased and breakdown voltage is enhanced. The method of manufacturing a field effect type compound semiconductor device includes: stacking an active layer and an ohmic layer on a substrate and forming a first oxide layer on the ohmic layer; forming a mesa region in predetermined regions of the first oxide layer, the ohmic layer, and the active layer; planarizing the mesa region after forming a nitride layer by evaporating a nitride on the mesa region; forming an ohmic electrode on the first oxide layer; forming a minute gate resist pattern after forming a second oxide layer on a semiconductor substrate in which the ohmic electrode is formed and forming a minute gate pattern having a under-cut shaped profile by dry-etching the first oxide layer, the nitride layer, and the second oxide layer; forming a gate recess region by forming a head pattern of a gamma gate electrode on the semiconductor substrate; and forming the gamma gate electrode by evaporating refractory metal on the semiconductor substrate in which the gate recess region is formed.
Abstract translation: 公开了一种制造场效应型化合物半导体器件的方法，其中器件的漏电流降低并且击穿电压增强。 制造场效应型化合物半导体器件的方法包括：在衬底上堆叠有源层和欧姆层，并在欧姆层上形成第一氧化物层; 在所述第一氧化物层，所述欧姆层和所述有源层的预定区域中形成台面区域; 通过在台面区域上蒸发氮化物，在形成氮化物层之后使台面区域平坦化; 在所述第一氧化物层上形成欧姆电极; 在形成欧姆电极的半导体衬底上形成第二氧化物层之后形成微小栅极抗蚀剂图案，并通过干蚀刻第一氧化物层，氮化物层和形成具有下切形状轮廓的微小栅极图案 第二氧化物层; 通过在所述半导体衬底上形成伽马栅电极的头部图形来形成栅极凹部区域; 以及通过在形成有所述栅极凹部的所述半导体衬底上蒸发难熔金属而形成所述γ栅电极。
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Patent Agency Ranking
公开(公告)号：US09899226B2
公开(公告)日：2018-02-20
申请号：US14658121
申请日：2015-03-13
Inventor： Ho Kyun Ahn , Hae Cheon Kim , Jong Won Lim , Dong Min Kang , Yong Hwan Kwon , Seong Il Kim , Zin Sig Kim , Eun Soo Nam , Byoung Gue Min , Hyung Sup Yoon , Kyung Ho Lee , Jong Min Lee , Kyu Jun Cho
IPC: H01L29/40 , H01L21/28 , H01L29/423 , H01L29/66 , H01L29/778 , H01L29/51 , H01L29/20 , H01L29/45
CPC classification number: H01L21/28264 , H01L29/2003 , H01L29/407 , H01L29/42316 , H01L29/4236 , H01L29/452 , H01L29/51 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66462 , H01L29/7786
Abstract: Provided herein is a semiconductor device including a substrate; an active layer formed on top of the substrate; a protective layer formed on top of the active layer and having a first aperture; a source electrode, driving gate electrode and drain electrode formed on top of the protective layer; and a first additional gate electrode formed on top of the first aperture, wherein an electric field is applied to the active layer, protective layer and driving gate electrode due to a voltage applied to each of the source electrode, drain electrode and driving gate electrode, and the first additional gate electrode is configured to attenuate a size of the electric field applied to at least a portion of the active layer, protective layer and driving gate electrode.
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公开(公告)号：US10134854B2
公开(公告)日：2018-11-20
申请号：US15248676
申请日：2016-08-26
Inventor： Ho Kyun Ahn , Dong Min Kang , Yong-Hwan Kwon , Dong-Young Kim , Seong Il Kim , Hae Cheon Kim , Eun Soo Nam , Jae Won Do , Byoung-Gue Min , Hyung Sup Yoon , Sang-Heung Lee , Jong Min Lee , Jong-Won Lim , Hyun Wook Jung , Kyu Jun Cho
IPC: H01L29/40 , H01L29/20 , H01L29/205 , H01L29/778 , H01L29/66
Abstract: A high electron mobility transistor includes a substrate including a first surface and a second surface facing each other and having a via hole passing through the first surface and the second surface, an active layer on the first surface, a cap layer on the active layer and including a gate recess region exposing a portion of the active layer, a source electrode and a drain electrode on one of the cap layer and the active layer, an insulating layer on the source electrode and the drain electrode and having on opening corresponding to the gate recess region to expose the gate recess region, a first field electrode on the insulating layer, a gate electrode electrically connected to the first field electrode on the insulating layer, and a second field electrode on the second surface and contacting the active layer through the via hole.
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7.发明授权Wafer level packaged GaN power semiconductor device and the manufacturing method thereof 有权晶圆级封装GaN功率半导体器件及其制造方法公开(公告)号：US09012920B2
公开(公告)日：2015-04-21
申请号：US13867328
申请日：2013-04-22
Inventor： Chull Won Ju , Hae Cheon Kim , Hyung Sup Yoon , Woo Jin Chang , Sang-Heung Lee , Dong-Young Kim , Jong-Won Lim , Dong Min Kang , Ho Kyun Ahn , Jong Min Lee , Eun Soo Nam
IPC: H01L29/20 , H01L29/66 , H01L29/417 , H01L29/778 , H01L23/00
CPC classification number: H01L29/2003 , H01L24/05 , H01L24/06 , H01L24/16 , H01L29/41758 , H01L29/66431 , H01L29/66462 , H01L29/7787 , H01L2224/0401 , H01L2224/05554 , H01L2224/05568 , H01L2224/056 , H01L2224/06135 , H01L2224/131 , H01L2224/16225 , H01L2224/16227 , H01L2224/81815 , H01L2924/00014
Abstract: Disclosed are a GaN (gallium nitride) compound power semiconductor device and a manufacturing method thereof. The gallium nitride compound power semiconductor device includes: a gallium nitride compound element formed by being grown on a wafer; a contact pad including a source, a drain, and a gate connecting with the gallium nitride compound element; a module substrate to which the nitride gallium compound element is flip-chip bonded; a bonding pad formed on the module substrate; and a bump formed on the bonding pad of the module substrate so that the contact pad and the bonding pad are flip-chip bonded. By this configuration, it is possible to reduce the process costs by forming the bump on the substrate based on the wafer level, rapidly emit the heat generated from an AlGaN HEMT device by forming the sub source contact pad and the sub drain contact pad of the substrate in the active region, and efficiently emit the heat generated from the AlGaN HEMT device by forming a via hole on the substrate and filling the via hole with the conductive metal.
Abstract translation: 公开了一种GaN（氮化镓）复合功率半导体器件及其制造方法。 氮化镓化合物功率半导体器件包括：通过在晶片上生长形成的氮化镓复合元素; 包括源极，漏极和与氮化镓复合元件连接的栅极的接触焊盘; 将氮化镓化合物元件倒装芯片接合的模块基板; 形成在所述模块基板上的焊盘; 以及形成在模块基板的焊盘上的凸点，使得接触焊盘和焊盘被倒装芯片接合。 通过这种结构，可以通过基于晶片级在基板上形成凸块来降低处理成本，通过形成子源接触焊盘和子漏极接触焊盘，快速地发射由AlGaN HEMT器件产生的热量 衬底，并且通过在衬底上形成通孔并用导电金属填充通孔，从而有效地发射由AlGaN HEMT器件产生的热量。
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公开(公告)号：US09780176B2
公开(公告)日：2017-10-03
申请号：US15238492
申请日：2016-08-16
Inventor： Jong Min Lee , Byoung-Gue Min , Hyung Sup Yoon , Dong Min Kang , Dong-Young Kim , Seong-Il Kim , Hae Cheon Kim , Jae Won Do , Ho Kyun Ahn , Sang-Heung Lee , Jong-Won Lim , Hyun Wook Jung , Kyu Jun Cho , Chull Won Ju
IPC: H01L29/40 , H01L29/20 , H01L29/205 , H01L29/778 , H01L29/66
CPC classification number: H01L29/408 , H01L29/2003 , H01L29/205 , H01L29/66462 , H01L29/7786 , H01L29/7787
Abstract: The present invention relates to a high reliability field effect power device and a manufacturing method thereof. A method of manufacturing a field effect power device includes sequentially forming a transfer layer, a buffer layer, a barrier layer and a passivation layer on a substrate, patterning the passivation layer by etching a first region of the passivation layer, and forming at least one electrode on the first region of the barrier layer exposed by patterning the passivation layer, wherein the first region is provided to form the at least one electrode, and the passivation layer may include a material having a wider bandgap than the barrier layer to prevent a trapping effect and a leakage current of the field effect power device.
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9.发明授权公开(公告)号：US09331976B2
公开(公告)日：2016-05-03
申请号：US14080874
申请日：2013-11-15
Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE , Solbox Inc. , SK TELECOM CO., LTD. , LG Uplus Corporation
Inventor： Taesang Choi , John Dongho Shinn , Jong Min Lee , Ja-Ryeong Koo
CPC classification number: H04L61/1511 , H04L61/303 , H04L67/2842 , H04L67/289
Abstract: A method of request routing redirection includes: receiving, by a first content delivery network (CDN) among a plurality of CDNs connected by CDN interconnection (CDNi), a domain name system (DNS) request including a list of CDN-provider-identifications (IDs) of higher CDNs, from a client; determining whether the client's request is processable; and when the client's request is not processable, redirecting the request, while preventing a loop of the request routing on the basis of the list of the CDN-provider-IDs.
Abstract translation: 一种请求路由重定向的方法包括：通过由CDN互连（CDNi）连接的多个CDN之中的第一内容传送网络（CDN）接收包括CDN提供商标识列表的域名系统（DNS）请求 ID）较高的CDN，来自客户端; 确定客户的请求是否可处理; 并且当客户端的请求不可处理时，重定向请求，同时根据CDN提供者ID的列表阻止请求路由的循环。
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