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    Method of making a variable capacitor component
    1.
    发明授权
    Method of making a variable capacitor component 有权
    制作可变电容器组件的方法

    公开(公告)号：US07200908B2

    公开(公告)日：2007-04-10

    申请号：US11442420

    申请日：2006-05-26

    申请人： Fabrice Cassett ,  Guillaume Bouche ,  Maurice Rivoire

    发明人： Fabrice Cassett ,  Guillaume Bouche ,  Maurice Rivoire

    IPC分类号： H01G7/00 ,  H01G5/00

    CPC分类号： H01H59/0009 ,  H01G5/16 ,  H01G5/18 ,  H01H2059/0081 ,  Y10T29/43 ,  Y10T29/435 ,  Y10T29/49 ,  Y10T29/49002 ,  Y10T29/49105 ,  Y10T29/49156

    摘要： A method of making a variable capacitor by forming a grove portion in an insulating substrate, two upper portions of the substrate located on either side of the groove portion forming two lateral edges, a conductive layer covering the inside of the groove portion, a flexible conductive membrane, placed above the groove portion by bearing on the edges, a dielectric layer covering the conductive layer or the membrane to insulate the conductive layer and the membrane, and terminals of application of a voltage between the conductive layer and the membrane, and such that the depth of the groove portion continuously increases from one of the edges to the bottom of the groove portion, and that the conductive layer covers the inside of the groove portion at least to reach one of the two edges, that it may cover.

    摘要翻译： 一种通过在绝缘基板中形成槽部来制造可变电容器的方法，位于形成两个侧边缘的槽部分的任一侧上的基板的两个上部，覆盖槽部分内部的导电层，柔性导电 膜，通过承载在边缘上而置于凹槽部分上方，覆盖导电层或膜的电介质层以使导电层和膜绝缘，以及在导电层和膜之间施加电压的端子，使得 凹槽部分的深度从凹槽部分的一个边缘到底部连续地增加，并且导电层至少覆盖凹槽部分的内部，至少可以覆盖两个边缘中的一个。

    COMPONENT COMPRISING A VARIABLE CAPACITOR
    3.
    发明申请
    COMPONENT COMPRISING A VARIABLE CAPACITOR 有权
    包含可变电容器的组件

    公开(公告)号：US20060114638A1

    公开(公告)日：2006-06-01

    申请号：US10999211

    申请日：2004-11-29

    申请人： Fabrice Casset ,  Guillaume Bouche ,  Maurice Rivoire

    发明人： Fabrice Casset ,  Guillaume Bouche ,  Maurice Rivoire

    IPC分类号： H01G5/00

    CPC分类号： H01H59/0009 ,  H01G5/16 ,  H01G5/18 ,  H01H2059/0081 ,  Y10T29/43 ,  Y10T29/435 ,  Y10T29/49 ,  Y10T29/49002 ,  Y10T29/49105 ,  Y10T29/49156

    摘要： A variable capacitor having a groove portion formed in an insulating substrate, two upper portions of the substrate located on either side of the groove portion forming two lateral edges, a conductive layer covering the inside of the groove portion, a flexible conductive membrane, placed above the groove portion by bearing on the edges, a dielectric layer covering the conductive layer or the membrane to insulate the conductive layer and the membrane, and terminals of application of a voltage between the conductive layer and the membrane, and such that the depth of the groove portion continuously increases from one of the edges to the bottom of the groove portion, and that the conductive layer covers the inside of the groove portion at least to reach one of the two edges, that it may cover.

    摘要翻译： 一种可变电容器，其具有形成在绝缘基板中的槽部，位于形成两个侧边缘的槽部的任一侧的基板的两个上部，覆盖所述槽部的内部的导电层，位于上方的柔性导电膜 沟槽部分通过承载在边缘上，覆盖导电层或膜的电介质层以使导电层和膜绝缘，以及在导电层和膜之间施加电压的端子，并且使得 凹槽部分从凹槽部分的一个边缘到底部连续地增加，并且导电层至少覆盖凹槽部分的内部至少可以覆盖两个边缘中的一个。

    Component comprising a variable capacitor
    4.
    发明申请
    Component comprising a variable capacitor 有权
    组件包括可变电容器

    公开(公告)号：US20060213044A1

    公开(公告)日：2006-09-28

    申请号：US11442420

    申请日：2006-05-26

    申请人： Fabrice Casset ,  Guillaume Bouche ,  Maurice Rivoire

    发明人： Fabrice Casset ,  Guillaume Bouche ,  Maurice Rivoire

    IPC分类号： H01G7/00 ,  H05K3/02

    CPC分类号： H01H59/0009 ,  H01G5/16 ,  H01G5/18 ,  H01H2059/0081 ,  Y10T29/43 ,  Y10T29/435 ,  Y10T29/49 ,  Y10T29/49002 ,  Y10T29/49105 ,  Y10T29/49156

    摘要： A variable capacitor having a groove portion formed in an insulating substrate, two upper portions of the substrate located on either side of the groove portion forming two lateral edges, a conductive layer covering the inside of the groove portion, a flexible conductive membrane, placed above the groove portion by bearing on the edges, a dielectric layer covering the conductive layer or the membrane to insulate the conductive layer and the membrane, and terminals of application of a voltage between the conductive layer and the membrane, and such that the depth of the groove portion continuously increases from one of the edges to the bottom of the groove portion, and that the conductive layer covers the inside of the groove portion at least to reach one of the two edges, that it may cover.

    摘要翻译： 一种可变电容器，其具有形成在绝缘基板中的槽部，位于形成两个侧边缘的槽部的任一侧的基板的两个上部，覆盖所述槽部的内部的导电层，位于上方的柔性导电膜 沟槽部分通过承载在边缘上，覆盖导电层或膜的电介质层以使导电层和膜绝缘，以及在导电层和膜之间施加电压的端子，并且使得 凹槽部分从凹槽部分的一个边缘到底部连续地增加，并且导电层至少覆盖凹槽部分的内部至少可以覆盖两个边缘中的一个。

    LDMOS with field plate connected to gate
    5.
    发明授权
    LDMOS with field plate connected to gate 有权
    LDMOS与场板连接到门

    公开(公告)号：US09450074B1

    公开(公告)日：2016-09-20

    申请号：US13194210

    申请日：2011-07-29

    申请人： Fanling Hsu Yang ,  Timothy K. McGuire ,  Sudarsan Uppili ,  Guillaume Bouche

    发明人： Fanling Hsu Yang ,  Timothy K. McGuire ,  Sudarsan Uppili ,  Guillaume Bouche

    IPC分类号： H01L29/40 ,  H01L29/66 ,  H01L29/78

    CPC分类号： H01L29/66681 ,  H01L29/0692 ,  H01L29/402 ,  H01L29/404 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/66659 ,  H01L29/7816 ,  H01L29/7824 ,  H01L29/7835

    摘要： Semiconductor devices, such as laterally diffused metal oxide semiconductor (LDMOS) devices, are described that have a field plate connected to a gate of the device. In one or more implementations, the semiconductor devices include a substrate having a source region of a first conductivity type and a drain region of the first conductivity type. A gate is positioned over the surface and between the source region and the drain region. The gate is configured to receive a voltage so that a conduction region may be formed at least partially below the gate to allow majority carriers to travel between the source region and the drain region. The device also includes a field plate at least partially positioned over and connected to the gate. The field plate is configured to shape an electrical field generated between the source region and the drain region when a voltage is applied to the gate.

    摘要翻译： 描述了半导体器件，例如横向扩散的金属氧化物半导体（LDMOS）器件，其具有连接到器件的栅极的场板。 在一个或多个实施方案中，半导体器件包括具有第一导电类型的源极区和第一导电类型的漏极区的衬底。 栅极位于表面上并且在源极区域和漏极区域之间。 栅极被配置为接收电压，使得可以至少部分地在栅极下方形成导电区域，以允许多数载流子在源极区域和漏极区域之间行进。 该装置还包括至少部分地定位在栅极上并连接到栅极的场板。 场板被配置为当电压施加到栅极时，使在源极区域和漏极区域之间产生的电场成形。

    LDMOS with thick interlayer-dielectric layer
    6.
    发明授权
    LDMOS with thick interlayer-dielectric layer 有权
    LDMOS具有较厚的层间介电层

    公开(公告)号：US09171916B1

    公开(公告)日：2015-10-27

    申请号：US13272301

    申请日：2011-10-13

    申请人： David L. Snyder ,  Sudarsan Uppili ,  Guillaume Bouche

    发明人： David L. Snyder ,  Sudarsan Uppili ,  Guillaume Bouche

    IPC分类号： H01L29/40 ,  H01L21/8238

    CPC分类号： H01L29/402 ,  H01L21/82385 ,  H01L29/063 ,  H01L29/1095 ,  H01L29/42368 ,  H01L29/66659 ,  H01L29/66681 ,  H01L29/7816 ,  H01L29/7835

    摘要： Semiconductor devices, such as LDMOS devices, are described that include an interlayer-dielectric layer (ILD) region having a thickness of at least two and one half (2.5) microns to increase the maximum breakdown voltage. In one or more implementations, the semiconductor devices include a substrate having a source region and a drain region formed proximate to a surface of the substrate. A gate is positioned over the surface and between the source region and the drain region. An ILD region having a thickness of at least two and one half (2.5) microns is formed over the surface and the gate of the device. The device also includes one or more field plates configured to shape an electrical field generated between the source region and the drain region when a voltage is applied to the gate.

    摘要翻译： 描述了诸如LDMOS器件的半导体器件，其包括具有至少两个和一个（2.5）微米厚度的层间介电层（ILD）区域以增加最大击穿电压。 在一个或多个实施方案中，半导体器件包括具有靠近衬底表面形成的源区和漏区的衬底。 栅极位于表面上并且在源极区域和漏极区域之间。 在器件的表面和栅极上形成具有至少两个半（2.5）微米厚度的ILD区域。 该装置还包括一个或多个场板，其配置成当电压施加到栅极时，使在源极区域和漏极区域之间产生的电场成形。