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    Method of forming a semiconductor structure comprising a formation of at least one sidewall spacer structure
    5.
    发明授权
    Method of forming a semiconductor structure comprising a formation of at least one sidewall spacer structure 有权
    形成半导体结构的方法，包括形成至少一个侧壁间隔结构

    公开(公告)号：US08003460B2

    公开(公告)日：2011-08-23

    申请号：US12028895

    申请日：2008-02-11

    申请人： Frank Wirbeleit ,  Rolf Stephan ,  Peter Javorka

    发明人： Frank Wirbeleit ,  Rolf Stephan ,  Peter Javorka

    IPC分类号： H01L21/8238 ,  H01L21/336

    CPC分类号： H01L21/823864 ,  H01L21/823842 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6659

    摘要： According to an illustrative example, a method of forming a semiconductor structure comprises providing a semiconductor substrate comprising a first feature and a second feature. A material layer is formed over the first feature and the second feature. A mask is formed over the first feature. At least one etch process adapted to form a sidewall spacer structure adjacent the second feature from a portion of the material layer is performed. The mask protects a portion of the material layer over the first feature from being affected by the at least one etch process. An ion implantation process is performed. The mask remains over the first feature during the ion implantation process.

    摘要翻译： 根据说明性示例，形成半导体结构的方法包括提供包括第一特征和第二特征的半导体衬底。 在第一特征和第二特征上形成材料层。 在第一特征上形成掩模。 执行适于从材料层的一部分形成邻近第二特征的侧壁间隔结构的至少一个蚀刻工艺。 所述掩模保护所述第一特征上的所述材料层的一部分不受所述至少一个蚀刻工艺的影响。 进行离子注入工艺。 在离子注入过程中，掩模保留在第一个特征之上。

    Self-biasing transistor structure and an SRAM cell having less than six transistors
    9.
    发明申请
    Self-biasing transistor structure and an SRAM cell having less than six transistors 有权
    自偏压晶体管结构和具有小于六个晶体管的SRAM单元

    公开(公告)号：US20060022282A1

    公开(公告)日：2006-02-02

    申请号：US11045177

    申请日：2005-01-28

    申请人： Frank Wirbeleit ,  Manfred Horstmann ,  Christian Hobert

    发明人： Frank Wirbeleit ,  Manfred Horstmann ,  Christian Hobert

    IPC分类号： H01L29/76 ,  H01L29/94

    CPC分类号： H01L29/105 ,  G11C11/412 ,  H01L27/11 ,  H01L29/7838

    摘要： By providing a self-biasing semiconductor switch, an SRAM cell having a reduced number of individual active components may be realized. In particular embodiments, the self-biasing semiconductor device may be provided in the form of a double channel field effect transistor that allows the formation of an SRAM cell with less than six transistor elements and, in preferred embodiments, with as few as two individual transistor elements.

    摘要翻译： 通过提供自偏压半导体开关，可以实现具有减少数量的各个有源元件的SRAM单元。 在特定实施例中，自偏置半导体器件可以以双通道场效应晶体管的形式提供，其允许形成具有小于六个晶体管元件的SRAM单元，并且在优选实施例中，具有少至两个单独的晶体管 元素。

    Transistor with embedded strain-inducing material formed in diamond-shaped cavities based on a pre-amorphization
    10.
    发明授权
    Transistor with embedded strain-inducing material formed in diamond-shaped cavities based on a pre-amorphization 有权
    基于预非晶化形成在金刚石腔中的嵌入式应变诱导材料的晶体管

    公开(公告)号：US08664056B2

    公开(公告)日：2014-03-04

    申请号：US13113698

    申请日：2011-05-23

    申请人： Frank Wirbeleit ,  Andy Wei

    发明人： Frank Wirbeleit ,  Andy Wei

    IPC分类号： H01L21/8234

    CPC分类号： H01L21/26506 ,  H01L21/26586 ,  H01L21/30604 ,  H01L21/30608 ,  H01L29/165 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7834 ,  H01L29/7848

    摘要： When forming cavities in active regions of semiconductor devices in order to incorporate a strain\-inducing semiconductor material, superior uniformity may be achieved by using an implantation process so as to selectively modify the etch behavior of exposed portions of the active region. In this manner, the basic configuration of the cavities may be adjusted with a high degree of flexibility, while at the same time the dependence on pattern loading effect may be reduced. Consequently, a significantly reduced variability of transistor characteristics may be achieved.

    摘要翻译： 当在半导体器件的有源区域中形成空腔以引入应变引起的半导体材料时，可以通过使用注入工艺来实现优异的均匀性，以便选择性地改变有源区域的暴露部分的蚀刻行为。 以这种方式，可以以高度的灵活性来调节空腔的基本构造，同时可以降低对图案加载效果的依赖性。 因此，可以实现晶体管特性的显着降低的变化。