VARIABLE RELUCTANCE SENSOR INTERFACE WITH INTEGRATION BASED ARMING THRESHOLD
    3.
    发明申请
    VARIABLE RELUCTANCE SENSOR INTERFACE WITH INTEGRATION BASED ARMING THRESHOLD 有权
    具有集成度的ARM变速器传感器接口

    公开(公告)号:US20140035561A1

    公开(公告)日:2014-02-06

    申请号:US13564505

    申请日:2012-08-01

    IPC分类号: G01P3/48

    摘要: An interface for processing a variable reluctance sensor signal provided by a variable reluctance sensor including an integrator, an arming comparator and a detect circuit. The integrator includes an input for receiving the variable reluctance sensor signal and an output providing an integrated signal indicative of total flux change of the variable reluctance sensor. The arming comparator compares the integrated signal with a predetermined arming threshold and provides an armed signal indicative thereof. The detect circuit provides a reset signal after the armed signal is provided to reset the integrator. A corresponding method of processing the variable reluctance sensor signal is also described.

    摘要翻译: 一种用于处理由包括积分器,布防比较器和检测电路的可变磁阻传感器提供的可变磁阻传感器信号的接口。 积分器包括用于接收可变磁阻传感器信号的输入端和提供指示可变磁阻传感器的总磁通量变化的积分信号的输出。 布防比较器将积分信号与预定的布防阈值进行比较,并提供指示其的布防信号。 在提供布防信号以复位积分器之后,检测电路提供复位信号。 还描述了处理可变磁阻传感器信号的相应方法。

    VRS INTERFACE WITH 1/T ARMING FUNCTION
    4.
    发明申请
    VRS INTERFACE WITH 1/T ARMING FUNCTION 有权
    具有1 / T武器功能的VRS接口

    公开(公告)号:US20130328554A1

    公开(公告)日:2013-12-12

    申请号:US13494501

    申请日:2012-06-12

    IPC分类号: G01B7/30 G01R33/00

    CPC分类号: G01D5/2013

    摘要: A variable reluctance sensor system for processing a variable reluctance sensor signal including an arming comparator and an arming circuit. The arming comparator compares the variable reluctance sensor signal with an arming threshold which decreases proportional to 1/t from a predetermined maximum level and asserts an armed signal when the variable reluctance sensor signal reaches the arming threshold. The arming threshold may be decreased based on a scaling factor multiplied by 1/t to ensure detection of each pulse of the variable reluctance sensor signal. The arming threshold may decrease to a predetermined minimum level sufficiently low to intersect the variable reluctance sensor signal and sufficiently high relative to an expected noise level. The arming threshold is reset in response to a timing event, such as zero crossing of the variable reluctance sensor signal.

    摘要翻译: 一种用于处理包括布防比较器和布防电路的可变磁阻传感器信号的可变磁阻传感器系统。 布防比较器将可变磁阻传感器信号与从预定最大电平成比例降低到1 / t的布防阈值进行比较,并且当可变磁阻传感器信号达到布防阈值时断言布防信号。 可以基于乘以1 / t的比例因子来减小布防阈值,以确保检测可变磁阻传感器信号的每个脉冲。 布防阈值可以降低到足够低的预定最小电平以与可变磁阻传感器信号相交并且相对于期望的噪声电平足够高。 响应于定时事件(例如可变磁阻传感器信号的过零点)来复位布防阈值。

    Variable reluctance sensor interface with integration based arming threshold
    5.
    发明授权
    Variable reluctance sensor interface with integration based arming threshold 有权
    可变磁阻传感器接口,具有集成的布防阈值

    公开(公告)号:US09103847B2

    公开(公告)日:2015-08-11

    申请号:US13564505

    申请日:2012-08-01

    摘要: An interface for processing a variable reluctance sensor signal provided by a variable reluctance sensor including an integrator, an arming comparator and a detect circuit. The integrator includes an input for receiving the variable reluctance sensor signal and an output providing an integrated signal indicative of total flux change of the variable reluctance sensor. The arming comparator compares the integrated signal with a predetermined arming threshold and provides an armed signal indicative thereof. The detect circuit provides a reset signal after the armed signal is provided to reset the integrator. A corresponding method of processing the variable reluctance sensor signal is also described.

    摘要翻译: 一种用于处理由包括积分器,布防比较器和检测电路的可变磁阻传感器提供的可变磁阻传感器信号的接口。 积分器包括用于接收可变磁阻传感器信号的输入端和提供指示可变磁阻传感器的总磁通量变化的积分信号的输出。 布防比较器将积分信号与预定的布防阈值进行比较,并提供指示其的布防信号。 在提供布防信号以复位积分器之后,检测电路提供复位信号。 还描述了处理可变磁阻传感器信号的相应方法。

    VRS interface with 1/T arming function
    6.
    发明授权
    VRS interface with 1/T arming function 有权
    VRS接口具有1 / T布防功能

    公开(公告)号:US08970209B2

    公开(公告)日:2015-03-03

    申请号:US13494501

    申请日:2012-06-12

    IPC分类号: G01B7/30

    CPC分类号: G01D5/2013

    摘要: A variable reluctance sensor system for processing a variable reluctance sensor signal including an arming comparator and an arming circuit. The arming comparator compares the variable reluctance sensor signal with an arming threshold which decreases proportional to 1/t from a predetermined maximum level and asserts an armed signal when the variable reluctance sensor signal reaches the arming threshold. The arming threshold may be decreased based on a scaling factor multiplied by 1/t to ensure detection of each pulse of the variable reluctance sensor signal. The arming threshold may decrease to a predetermined minimum level sufficiently low to intersect the variable reluctance sensor signal and sufficiently high relative to an expected noise level. The arming threshold is reset in response to a timing event, such as zero crossing of the variable reluctance sensor signal.

    摘要翻译: 一种用于处理包括布防比较器和布防电路的可变磁阻传感器信号的可变磁阻传感器系统。 布防比较器将可变磁阻传感器信号与从预定最大电平成比例降低到1 / t的布防阈值进行比较,并且当可变磁阻传感器信号达到布防阈值时断言布防信号。 可以基于乘以1 / t的比例因子来减小布防阈值,以确保检测可变磁阻传感器信号的每个脉冲。 布防阈值可以降低到足够低的预定最小电平以与可变磁阻传感器信号相交并且相对于期望的噪声电平足够高。 响应于定时事件(例如可变磁阻传感器信号的过零点)来复位布防阈值。

    Semiconductor device and method for forming the same
    8.
    发明授权
    Semiconductor device and method for forming the same 有权
    半导体装置及其形成方法

    公开(公告)号:US07276419B2

    公开(公告)日:2007-10-02

    申请号:US11264068

    申请日:2005-10-31

    IPC分类号: H01L21/336

    摘要: A semiconductor device may include first, second, and third semiconductor layers. The first and third layers may have a first dopant type, and the second layer may have a second dopant type. A first region within the third semiconductor layer may have the second dopant type. A second region between the first region and the second semiconductor layer may have the first dopant type. A third region above the second region may have the first dopant type. A fourth semiconductor region adjacent to the third region may have a first concentration of the second dopant type. A source contact region may have a second concentration of the second dopant type adjacent to the third semiconductor region and adjacent to the fourth semiconductor region. The second concentration may be higher than the first concentration.

    摘要翻译: 半导体器件可以包括第一,第二和第三半导体层。 第一和第三层可以具有第一掺杂剂类型,并且第二层可以具有第二掺杂剂类型。 第三半导体层内的第一区域可以具有第二掺杂剂类型。 第一区域和第二半导体层之间的第二区域可以具有第一掺杂剂类型。 第二区域上方的第三区域可以具有第一掺杂剂类型。 与第三区域相邻的第四半导体区域可以具有第二掺杂剂类型的第一浓度。 源极接触区域可以具有与第三半导体区域相邻并且与第四半导体区域相邻的第二掺杂剂类型的第二浓度。 第二浓度可能高于第一浓度。

    Overvoltage protection circuit
    9.
    发明授权
    Overvoltage protection circuit 失效
    过压保护电路

    公开(公告)号:US5483406A

    公开(公告)日:1996-01-09

    申请号:US128425

    申请日:1993-09-30

    摘要: An overvoltage protection circuit (11) for decoupling circuitry (12) from a voltage applied to an input (38). The overvoltage protection circuit (11) is integrated on an integrated circuit along with the circuitry (12). The overvoltage protection circuit (11) comprises a sense circuit (13), a timing circuit (14), a decoupling circuit (16), and a circuit (17). The sense circuit (13) detects when the voltage applied to the input (38) exceeds a threshold voltage. The timing circuit (14) is responsive to the sense circuit (13) and determines when the voltage exceeds the threshold voltage for a predetermined time. The decoupling circuit (16) is responsive to the timing circuit (14) and decouples the circuitry from the voltage applied to the input (38). The circuit (17) generates a logic signal indicating the circuitry has been decoupled.

    摘要翻译: 一种用于使电路(12)与施加到输入(38)的电压去耦的过电压保护电路(11)。 过电压保护电路(11)与电路(12)一体集成在集成电路上。 过压保护电路(11)包括检测电路(13),定时电路(14),去耦电路(16)和电路(17)。 感测电路(13)检测施加到输入(38)的电压何时超过阈值电压。 定时电路(14)响应于感测电路(13),并且在预定时间内确定电压何时超过阈值电压。 解耦电路(16)响应于定时电路(14)并且将电路与施加到输入端(38)的电压分离。 电路(17)产生指示电路已经去耦的逻辑信号。

    DUAL-LOOP DC-TO-DC CONVERTER APPARATUS
    10.
    发明申请
    DUAL-LOOP DC-TO-DC CONVERTER APPARATUS 有权
    双环路DC-DC转换器装置

    公开(公告)号:US20100079126A1

    公开(公告)日:2010-04-01

    申请号:US12242145

    申请日:2008-09-30

    申请人: John M. Pigott

    发明人: John M. Pigott

    IPC分类号: G05F1/565

    CPC分类号: H02M3/156 H02M2001/0016

    摘要: A dual loop DC-to-DC converter is provided that includes a first control loop that maintains a DC output voltage (VOUT) less than or equal to a desired maximum value of the VOUT, a second control loop that operates simultaneously with the first control loop and maintains a DC input voltage (VIN) greater than or equal to a desired minimum value of the VIN, and a duty cycle selection module. The first control loop generates a first clock signal having a first duty cycle, and the second control loop generates a second clock signal having a second duty cycle. The duty cycle selection module continuously determines which one of the first duty cycle and the second duty cycle has a lower duty cycle value, and continuously generates a PWM output signal having a modulated duty cycle equal to the lower duty cycle value.

    摘要翻译: 提供一种双回路DC-DC转换器,其包括第一控制回路,其保持小于或等于VOUT的期望最大值的DC输出电压(VOUT);与第一控制同时操作的第二控制回路 并且保持大于或等于VIN的期望最小值的DC输入电压(VIN)和占空比选择模块。 第一控制环路产生具有第一占空比的第一时钟信号,而第二控制环路产生具有第二占空比的第二时钟信号。 占空比选择模块连续地确定第一占空比和第二占空比中的哪一个具有较低的占空比值,并连续产生具有等于较低占空比值的调制占空比的PWM输出信号。