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    Field-effect transistors with superior passivating films and method of making same
    2.
    发明授权
    Field-effect transistors with superior passivating films and method of making same 失效
    具有超级钝化膜的场效应晶体管及其制造方法

    公开(公告)号：US3641405A

    公开(公告)日：1972-02-08

    申请号：US3641405D

    申请日：1969-12-16

    Applicant: GEN ELECTRIC

    Inventor： BROWN DALE M ,  ENGELER WILLIAM E

    IPC: H01L21/225 ,  H01L21/316 ,  H01L27/00 ,  H01L27/092 ,  H01L29/00 ,  H01L11/14

    CPC classification number: H01L27/00 ,  H01L21/02129 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/02271 ,  H01L21/2255 ,  H01L21/31612 ,  H01L21/31662 ,  H01L27/0927 ,  H01L29/00

    Abstract: Improved semiconductor field-effect transistors have selfregistration and electrical insulation. Conductivity-modified, surface adjacent source and drain regions are formed by diffusing dopants through gate-oxide layer. One embodiment features a conducting gate electrode which is formed from a thin deposited film. In this embodiment a large region of opposite-conductivitytype semiconductor is formed by diffusion through both conducting and oxide films. Complementary ''''N-channel'''' and ''''P-channel'''' devices may be formed on the same substrate by combining two separate embodiments. In such devices the original conductivitytype semiconductor is the base for one FET, while the large conductivity-modified-type region is the base for the other FET. Such modules may be interconnected to form integrated circuits capable of performing a variety of logical functions.

    Abstract translation: 改进的半导体场效应晶体管具有自动对准和电绝缘。 通过将掺杂剂通过栅氧化层扩散形成电导率改性的表面相邻源极和漏极区。 一个实施例的特征在于由薄的沉积膜形成的导电栅电极。 在本实施例中，通过扩散通过导电和氧化膜形成相反导电型半导体的大区域。 可以通过组合两个单独的实施例在相同的基板上形成互补的“N沟道”和“P沟道”器件。 在这种器件中，原始导电型半导体是一个FET的基极，而大导电率改变型区域是另一个FET的基极。 这样的模块可以互连以形成能够执行各种逻辑功能的集成电路。

    Self-registered ig-fet devices and method of making same
    5.
    发明授权
    Self-registered ig-fet devices and method of making same 失效
    自注册IG-FET器件及其制造方法

    公开(公告)号：US3566517A

    公开(公告)日：1971-03-02

    申请号：US3566517D

    申请日：1967-10-13

    Applicant: GEN ELECTRIC

    Inventor： BROWN DALE M ,  ENGELER WILLIAM E ,  GRAY PETER V ,  GARFINKEL MARVIN

    IPC: H01L21/00 ,  H01L29/00 ,  H01L29/78 ,  B01J17/00 ,  H01G13/00

    CPC classification number: H01L29/00 ,  H01L21/00 ,  H01L29/78 ,  Y10S148/043 ,  Y10S148/053 ,  Y10S148/103 ,  Y10S148/105 ,  Y10S148/106

    Abstract: SELF-REGISTERED FIELD-EFFECT TRANSISTORS ARE BUILT BY FORMING THE GATE THEREOF AT THE SAME TIME THE CHANNEL-ADJACENT PORTION OF THE SOURCE AND DRAIN REGIONS ARE DEFINED. IN ONE EMBODIMENT A REFACTORY METALLIC FILM IS DEPOSITED OVER AN INSULATING FILM AND ETCHED TO FORM THE GATE. SUBSEQUENTLY, THE METALLIC FILM MAY SERVE AS A DIFFUSION MASK, ALTHOUGH THIS IS NOT ESSENTIAL. THE METALLIC FILM IS PATTERNED BY PHOTORESIST MASKING AND ETCHING. THE PORTION OF THE METALLIC FILM OVERLYING THE CHANNEL REGION OF THE SEMICONDUCTOR BODY THEREOF IS USED AS A GATE. AS A RESULT OF SIMULTANEOUS DEFINITION OF THE CHANNEL-ADJACENT PLORTIONS OF SOURCE AND DRAIN REGIONS AND PATTERNING OF THE CHANNELALIGNED PORTIONS OF THE GATE, WHEN SOURCE AND DRAIN REGIONS ARE FORMED BY DIFFUSION OF ACTIVATORS INTO THE SILICON WAFER, AUTOMATIC REGISTRATION OF THE GATE-ADJACENT PORTIONS OF THE SOURCE AND DRAIN JUNCTIONS BENEATH THE GATE IS ACHIEVED.

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