公开(公告)号：US08440548B2

公开(公告)日：2013-05-14

申请号：US13185742

申请日：2011-07-19

申请人： Hidekazu Miyairi ,  Takashi Ienaga ,  Masao Moriguchi ,  Yosuke Kanzaki

发明人： Hidekazu Miyairi ,  Takashi Ienaga ,  Masao Moriguchi ,  Yosuke Kanzaki

IPC分类号： H01L21/20 ,  H01L21/36

CPC分类号： H01L21/02488 ,  H01L21/02502 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02658 ,  H01L21/32105 ,  H01L29/04 ,  H01L29/66765 ,  H01L29/78678 ,  H01L29/78696

摘要： An object is to provide a manufacturing method of a microcrystalline silicon film with improved adhesion between an insulating film and the microcrystalline silicon film. The microcrystalline silicon film is formed in the following manner. Over an insulating film, a microcrystalline silicon grain having a height that allows the microcrystalline silicon grain to be completely oxidized by later plasma oxidation (e.g., a height greater than 0 nm and less than or equal to 5 nm), or a microcrystalline silicon film or an amorphous silicon film having a thickness that allows the microcrystalline silicon film or the amorphous silicon film to be completely oxidized by later plasma oxidation (e.g., a thickness greater than 0 nm and less than or equal to 5 nm) is formed. Plasma treatment in an atmosphere including oxygen or plasma oxidation is performed on the microcrystalline silicon grain, the microcrystalline silicon film, or the amorphous silicon film, so that a silicon oxide grain or a silicon oxide film is formed over the insulating film. A microcrystalline silicon film is formed over the silicon oxide grain or the silicon oxide film.

摘要翻译： 本发明的目的是提供一种具有改善的绝缘膜和微晶硅膜之间的粘附性的微晶硅膜的制造方法。 以下述方式形成微晶硅膜。 在绝缘膜上，具有通过稍后的等离子体氧化（例如，高于0nm且小于或等于5nm的高度）使微晶硅晶粒完全氧化的高度的微晶硅晶粒或微晶硅膜 或具有通过稍后的等离子体氧化（例如，厚度大于0nm且小于或等于5nm）使微晶硅膜或非晶硅膜完全氧化的厚度的非晶硅膜。 在微晶硅晶粒，微晶硅膜或非晶硅膜上进行包括氧或等离子体氧化的气氛中的等离子体处理，使得在绝缘膜上形成氧化硅晶粒或氧化硅膜。 在氧化硅晶粒或氧化硅膜上形成微晶硅膜。

公开(公告)号：US08884297B2

公开(公告)日：2014-11-11

申请号：US13696865

申请日：2011-05-06

申请人： Sachiaki Tezuka ,  Yasuhiro Jinbo ,  Toshinari Sasaki ,  Hidekazu Miyairi ,  Yosuke Kanzaki ,  Masao Moriguchi

发明人： Sachiaki Tezuka ,  Yasuhiro Jinbo ,  Toshinari Sasaki ,  Hidekazu Miyairi ,  Yosuke Kanzaki ,  Masao Moriguchi

IPC分类号： H01L21/336 ,  H01L21/205 ,  H01L29/04 ,  H01L29/786 ,  H01L21/02 ,  C23C16/50 ,  C23C16/455 ,  C23C16/24 ,  H01L29/66

CPC分类号： H01L21/02513 ,  C23C16/24 ,  C23C16/45523 ,  C23C16/50 ,  H01L21/02422 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02502 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/0262 ,  H01L29/04 ,  H01L29/66765 ,  H01L29/78696

摘要： A manufacturing method of a microcrystalline silicon film includes the steps of forming a first microcrystalline silicon film over an insulating film by a plasma CVD method under a first condition; and forming a second microcrystalline silicon film over the first microcrystalline silicon film under a second condition. As a source gas supplied to a treatment chamber, a deposition gas containing silicon and a gas containing hydrogen are used. In the first condition, a flow rate of hydrogen is set at a flow rate 50 to 1000 times inclusive that of the deposition gas, and the pressure inside the treatment chamber is set 67 to 1333 Pa inclusive. In the second condition, a flow rate of hydrogen is set at a flow rate 100 to 2000 times inclusive that of the deposition gas, and the pressure inside the treatment chamber is set 1333 to 13332 Pa inclusive.

摘要翻译： 微晶硅膜的制造方法包括以下步骤：在第一条件下通过等离子体CVD法在绝缘膜上形成第一微晶硅膜; 以及在第二条件下在所述第一微晶硅膜上形成第二微晶硅膜。 作为供给到处理室的源气体，使用含有硅和含氢气体的沉积气体。 在第一条件下，将氢的流量设定为包含沉积气体的流量的50〜1000倍，处理室内的压力为67〜1333Pa。 在第二条件下，将氢的流量设定为包含沉积气体的流量的100〜2000倍，处理室内的压力为1333〜13332Pa。

公开(公告)号：US20130056742A1

公开(公告)日：2013-03-07

申请号：US13696865

申请日：2011-05-06

申请人： Sachiaki Tezuka ,  Yasuhiro Jinbo ,  Toshinari Sasaki ,  Hidekazu Miyairi ,  Yosuke Kanzaki ,  Masao Moriguchi

发明人： Sachiaki Tezuka ,  Yasuhiro Jinbo ,  Toshinari Sasaki ,  Hidekazu Miyairi ,  Yosuke Kanzaki ,  Masao Moriguchi

IPC分类号： H01L29/786 ,  H01L29/04 ,  H01L21/205 ,  H01L21/336

CPC分类号： H01L21/02513 ,  C23C16/24 ,  C23C16/45523 ,  C23C16/50 ,  H01L21/02422 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02502 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/0262 ,  H01L29/04 ,  H01L29/66765 ,  H01L29/78696

摘要： A manufacturing method of a microcrystalline silicon film includes the steps of forming a first microcrystalline silicon film over an insulating film by a plasma CVD method under a first condition; and forming a second microcrystalline silicon film over the first microcrystalline silicon film under a second condition. As a source gas supplied to a treatment chamber, a deposition gas containing silicon and a gas containing hydrogen are used. In the first condition, a flow rate of hydrogen is set at a flow rate 50 to 1000 times inclusive that of the deposition gas, and the pressure inside the treatment chamber is set 67 to 1333 Pa inclusive. In the second condition, a flow rate of hydrogen is set at a flow rate 100 to 2000 times inclusive that of the deposition gas, and the pressure inside the treatment chamber is set 1333 to 13332 Pa inclusive.

摘要翻译： 微晶硅膜的制造方法包括以下步骤：在第一条件下通过等离子体CVD法在绝缘膜上形成第一微晶硅膜; 以及在第二条件下在所述第一微晶硅膜上形成第二微晶硅膜。 作为供给到处理室的源气体，使用含有硅和含氢气体的沉积气体。 在第一条件下，将氢的流量设定为包含沉积气体的流量的50〜1000倍，处理室内的压力为67〜1333Pa。 在第二条件下，将氢的流量设定为包含沉积气体的流量的100〜2000倍，处理室内的压力为1333〜13332Pa。

公开(公告)号：US09401396B2

公开(公告)日：2016-07-26

申请号：US13433563

申请日：2012-03-29

申请人： Kanta Abe ,  Hidekazu Miyairi ,  Tetsuhiro Tanaka ,  Takashi Ienaga ,  Yoshitaka Yamamoto

发明人： Kanta Abe ,  Hidekazu Miyairi ,  Tetsuhiro Tanaka ,  Takashi Ienaga ,  Yoshitaka Yamamoto

IPC分类号： H01L21/20 ,  H01L21/36 ,  H01L29/04 ,  H01L29/66 ,  H01L21/28 ,  H01L29/786

CPC分类号： H01L29/04 ,  H01L21/28008 ,  H01L29/66765 ,  H01L29/786 ,  H01L29/78648 ,  H01L29/78678 ,  H01L29/78696

摘要： Provided is a method for manufacturing a semiconductor device, in which a degradation of characteristics of a thin film transistor can be suppressed by performing plasma oxidation treatment on a gate insulating film containing nitrogen. An embodiment of the present invention is a method for manufacturing a semiconductor device comprising a thin film transistor including a gate electrode, a gate insulating film containing nitrogen, and a channel region in microcrystalline semiconductor films. The method includes the steps of performing plasma treatment on the gate insulating film in an oxidizing gas atmosphere containing hydrogen and an oxidizing gas containing an oxygen atom, and forming the microcrystalline semiconductor film over the gate insulating film. Formula (1), a/b≧2, and Formula (2), b>0, are satisfied, where the amount of hydrogen and the amount of the oxidizing gas in the oxidizing gas atmosphere are a and b, respectively.

摘要翻译： 提供一种半导体器件的制造方法，其中通过对含有氮的栅极绝缘膜进行等离子体氧化处理可以抑制薄膜晶体管的特性的劣化。 本发明的一个实施例是一种半导体器件的制造方法，该半导体器件包括薄膜晶体管，该薄膜晶体管包括栅电极，含氮的栅绝缘膜和微晶半导体膜中的沟道区。 该方法包括以下步骤：在包含氢的氧化气体气氛和含有氧原子的氧化气体的栅极绝缘膜上进行等离子体处理，并在栅极绝缘膜上形成微晶半导体膜。 满足式（1），a /b≥2和式（2），b> 0，其中，氢和氧化气体气氛中的氧化气体量分别为a和b。

公开(公告)号：US09159781B2

公开(公告)日：2015-10-13

申请号：US13433563

申请日：2012-03-29

申请人： Kanta Abe ,  Hidekazu Miyairi ,  Tetsuhiro Tanaka ,  Takashi Ienaga ,  Yoshitaka Yamamoto

发明人： Kanta Abe ,  Hidekazu Miyairi ,  Tetsuhiro Tanaka ,  Takashi Ienaga ,  Yoshitaka Yamamoto

IPC分类号： H01L21/20 ,  H01L21/36 ,  H01L29/04 ,  H01L29/66 ,  H01L29/786

摘要： Provided is a method for manufacturing a semiconductor device, in which a degradation of characteristics of a thin film transistor can be suppressed by performing plasma oxidation treatment on a gate insulating film containing nitrogen. An embodiment of the present invention is a method for manufacturing a semiconductor device comprising a thin film transistor including a gate electrode, a gate insulating film containing nitrogen, and a channel region in microcrystalline semiconductor films. The method includes the steps of performing plasma treatment on the gate insulating film in an oxidizing gas atmosphere containing hydrogen and an oxidizing gas containing an oxygen atom, and forming the microcrystalline semiconductor film over the gate insulating film. Formula (1), a/b≧2, and Formula (2), b>0, are satisfied, where the amount of hydrogen and the amount of the oxidizing gas in the oxidizing gas atmosphere are a and b, respectively.

公开(公告)号：US09496406B2

公开(公告)日：2016-11-15

申请号：US13547377

申请日：2012-07-12

申请人： Shunpei Yamazaki ,  Hidekazu Miyairi ,  Akiharu Miyanaga ,  Kengo Akimoto ,  Kojiro Shiraishi

发明人： Shunpei Yamazaki ,  Hidekazu Miyairi ,  Akiharu Miyanaga ,  Kengo Akimoto ,  Kojiro Shiraishi

IPC分类号： H01L29/786 ,  H01L27/12

CPC分类号： H01L29/78618 ,  G02F1/133345 ,  G02F1/133528 ,  G02F1/134336 ,  G02F1/13439 ,  G02F1/136286 ,  G02F1/1368 ,  G02F1/167 ,  G02F2201/123 ,  G09G3/3674 ,  G09G2310/0286 ,  H01L27/1225 ,  H01L27/3262 ,  H01L29/247 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78693 ,  H01L29/78696

摘要： An embodiment is to include an inverted staggered (bottom gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. The buffer layer having higher carrier concentration than the semiconductor layer is provided intentionally between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed.

摘要翻译： 一个实施例是包括反向交错（底栅结构）薄膜晶体管，其中使用含有In，Ga和Zn的氧化物半导体膜作为半导体层，并且缓冲层设置在半导体层与源极和漏极之间 电极层。 有意地在源极和漏极电极层与半导体层之间提供具有比半导体层高的载流子浓度的缓冲层，从而形成欧姆接触。

公开(公告)号：US09176353B2

公开(公告)日：2015-11-03

申请号：US12213728

申请日：2008-06-24

申请人： Shunpei Yamazaki ,  Yukie Suzuki ,  Hideaki Kuwabara ,  Hajime Kimura ,  Hidekazu Miyairi ,  Yoshiyuki Kurokawa ,  Satoshi Kobayashi

发明人： Shunpei Yamazaki ,  Yukie Suzuki ,  Hideaki Kuwabara ,  Hajime Kimura ,  Hidekazu Miyairi ,  Yoshiyuki Kurokawa ,  Satoshi Kobayashi

IPC分类号： G02F1/136 ,  G02F1/1368 ,  H01L21/67

CPC分类号： G02F1/1368 ,  G02F1/133345 ,  H01L21/67207 ,  H01L29/41733 ,  H01L29/66765 ,  H01L29/78678 ,  H01L29/78696

摘要： An object is to propose a method of manufacturing, with high mass productivity, liquid crystal display devices having thin film transistors with highly reliable electric characteristics. In a liquid crystal display device having an inverted staggered thin film transistor, the inverted staggered thin film transistor is formed as follows: a gate insulating film is formed over a gate electrode; a microcrystalline semiconductor film which functions as a channel formation region is formed over the gate insulating film; a buffer layer is formed over the microcrystalline semiconductor film; a pair of source and drain regions are formed over the buffer layer; and a pair of source and drain electrodes are formed in contact with the source and drain regions so as to expose a part of the source and drain regions.

公开(公告)号：US09069202B2

公开(公告)日：2015-06-30

申请号：US13407891

申请日：2012-02-29

申请人： Hidekazu Miyairi ,  Tetsuji Ishitani ,  Daisuke Kubota ,  Toshiyuki Isa ,  Kouhei Toyotaka ,  Susumu Kawashima

发明人： Hidekazu Miyairi ,  Tetsuji Ishitani ,  Daisuke Kubota ,  Toshiyuki Isa ,  Kouhei Toyotaka ,  Susumu Kawashima

IPC分类号： G02F1/1343 ,  G02F1/1333 ,  G02F1/1362 ,  G02F1/136

CPC分类号： G02F1/133345 ,  G02F1/134363 ,  G02F1/136209 ,  G02F1/136213 ,  G02F1/136286 ,  G02F2001/13606 ,  G02F2001/13629 ,  G02F2001/136295 ,  G02F2201/124

摘要： Provided are a liquid crystal display device with horizontal electric field mode, in which a decrease in driving speed can be suppressed by reducing the resistance of a wiring even when the number of pixels is increased, and a manufacturing method thereof. One of a scan wiring and a signal wiring is divided in an intersection portion where the scan wiring and the signal wiring intersect with each other, and the separated wirings are connected with a connection electrode positioned over a thick insulating film. Accordingly, parasitic capacitance at the intersection portion can be reduced, preventing the decrease in the driving speed. The connection electrode is formed at the same time as formation of a pixel electrode and a common electrode using a low-resistance metal, which contributes to the reduction in manufacturing process of the liquid crystal display device.

摘要翻译： 提供一种具有水平电场模式的液晶显示装置及其制造方法，其中即使增加像素数也可以通过降低布线的电阻来抑制驱动速度的降低。 扫描布线和信号布线之一被划分在扫描布线和信号布线彼此相交的交叉部分中，并且分离的布线与位于厚绝缘膜上的连接电极连接。 因此，可以减少交叉部分处的寄生电容，防止驱动速度的降低。 连接电极与使用低电阻金属的像素电极和公共电极的形成同时形成，这有助于液晶显示装置的制造工艺的减少。

公开(公告)号：US09018109B2

公开(公告)日：2015-04-28

申请号：US12715629

申请日：2010-03-02

申请人： Hidekazu Miyairi ,  Erika Kato ,  Kunihiko Suzuki

发明人： Hidekazu Miyairi ,  Erika Kato ,  Kunihiko Suzuki

IPC分类号： H01L21/31 ,  H01L21/469 ,  H01L29/49 ,  H01L29/66 ,  H01L29/786 ,  H01L27/12

CPC分类号： H01L29/4908 ,  H01L27/1214 ,  H01L27/1288 ,  H01L29/66765 ,  H01L29/78669 ,  H01L29/78678 ,  H01L29/78696

摘要： A thin film transistor in which deterioration at initial operation is not likely to be caused and a manufacturing method thereof. A transistor which includes a gate insulating layer at least whose uppermost surface is a silicon nitride layer, a semiconductor layer over the gate insulating layer, and a buffer layer over the semiconductor layer and in which the concentration of nitrogen in the vicinity of an interface between the semiconductor layer and the gate insulating layer, which is in the semiconductor layer is lower than that of the buffer layer and other parts of the semiconductor layer. Such a thin film transistor can be manufactured by exposing the gate insulating layer to an air atmosphere and performing plasma treatment on the gate insulating layer before the semiconductor layer is formed.

摘要翻译： 其中不可能引起初始操作劣化的薄膜晶体管及其制造方法。 一种晶体管，其至少具有栅极绝缘层，其最上表面是氮化硅层，栅极绝缘层上的半导体层，以及半导体层上的缓冲层，其中，在界面附近的氮浓度 半导体层中的半导体层和栅极绝缘层比缓冲层和半导体层的其它部分低。 这样的薄膜晶体管可以通过将栅极绝缘层暴露于空气气氛中，并且在形成半导体层之前对栅极绝缘层进行等离子体处理来制造。

公开(公告)号：US09000441B2

公开(公告)日：2015-04-07

申请号：US12504897

申请日：2009-07-17

申请人： Daisuke Kawae ,  Yoshiyuki Kurokawa ,  Hidekazu Miyairi

发明人： Daisuke Kawae ,  Yoshiyuki Kurokawa ,  Hidekazu Miyairi

IPC分类号： H01L27/14 ,  H01L29/786 ,  H01L27/12 ,  H01L29/04 ,  H01L29/66

CPC分类号： H01L29/78696 ,  H01L27/1214 ,  H01L27/1288 ,  H01L29/04 ,  H01L29/66765 ,  H01L29/78645

摘要： A thin film transistor whose threshold voltage can be controlled and which has a favorable switching characteristic is provided. The thin film transistor includes a first gate electrode layer; a semiconductor layer; a first gate insulating layer provided between the first gate electrode layer and the semiconductor layer; source electrode and drain electrode layers which are provided over the semiconductor layer; a conductive layer covered by the first gate insulating layer and the semiconductor layer and provided so as to overlap with part of the first gate electrode layer; a second gate insulating layer provided so as to cover at least a back channel portion of the semiconductor layer; and a second gate electrode layer provided over the second gate insulating layer so as to overlap with the back channel portion of the semiconductor layer.

摘要翻译： 提供了可以控制阈值电压并具有良好的开关特性的薄膜晶体管。 薄膜晶体管包括第一栅电极层; 半导体层; 设置在所述第一栅极电极层和所述半导体层之间的第一栅极绝缘层; 源电极和漏极电极层，设置在半导体层上; 由第一栅极绝缘层和半导体层覆盖的导电层，并且设置成与第一栅极电极层的一部分重叠; 第二栅极绝缘层，设置成覆盖半导体层的至少后沟道部分; 以及第二栅极电极层，设置在所述第二栅极绝缘层上方以与所述半导体层的所述后部沟道部重叠。