公开(公告)号：US08836126B2

公开(公告)日：2014-09-16

申请号：US12535489

申请日：2009-08-04

申请人： Hirosato Ochimizu ,  Atsuhiro Tsukune ,  Hiroshi Kudo

发明人： Hirosato Ochimizu ,  Atsuhiro Tsukune ,  Hiroshi Kudo

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/532 ,  H01L21/768 ,  H01L23/528

CPC分类号： H01L21/76807 ,  H01L21/76831 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76864 ,  H01L21/76867 ,  H01L21/76873 ,  H01L21/76879 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2224/05149 ,  H01L2224/05649 ,  H01L2224/29149 ,  H01L2224/29649 ,  H01L2224/80449 ,  H01L2224/81449 ,  H01L2224/83449 ,  H01L2224/84449 ,  H01L2224/85449 ,  H01L2924/0002 ,  H01L2924/01025 ,  H01L2924/00

摘要： A semiconductor device includes an insulating layer formed over a semiconductor substrate, the insulating layer including oxygen, a first wire formed in the insulating layer, and a second wire formed in the insulating layer over the first wire and containing manganese, oxygen, and copper, the second wire having a projection portion formed in the insulating layer and extending downwardly but spaced apart from the first wire.

摘要翻译： 半导体器件包括形成在半导体衬底上的绝缘层，所述绝缘层包括氧，形成在所述绝缘层中的第一线，以及形成在所述第一线上的绝缘层中并且含有锰，氧和铜的第二线， 所述第二线具有形成在所述绝缘层中并且向下延伸但与所述第一线间隔开的突出部分。

公开(公告)号：US20100038792A1

公开(公告)日：2010-02-18

申请号：US12535489

申请日：2009-08-04

申请人： Hirosato OCHIMIZU ,  Atsuhiro Tsukune ,  Hiroshi Kudo

发明人： Hirosato OCHIMIZU ,  Atsuhiro Tsukune ,  Hiroshi Kudo

IPC分类号： H01L23/522 ,  H01L21/768

CPC分类号： H01L21/76807 ,  H01L21/76831 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76864 ,  H01L21/76867 ,  H01L21/76873 ,  H01L21/76879 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2224/05149 ,  H01L2224/05649 ,  H01L2224/29149 ,  H01L2224/29649 ,  H01L2224/80449 ,  H01L2224/81449 ,  H01L2224/83449 ,  H01L2224/84449 ,  H01L2224/85449 ,  H01L2924/0002 ,  H01L2924/01025 ,  H01L2924/00

摘要： A semiconductor device includes an insulating layer formed over a semiconductor substrate, the insulating layer including oxygen, a first wire formed in the insulating layer, and a second wire formed in the insulating layer over the first wire and containing manganese, oxygen, and copper, the second wire having a projection portion formed in the insulating layer and extending downwardly but spaced apart from the first wire.

摘要翻译： 半导体器件包括形成在半导体衬底上的绝缘层，所述绝缘层包括氧，形成在所述绝缘层中的第一线，以及形成在所述第一线上的绝缘层中并且含有锰，氧和铜的第二线， 所述第二线具有形成在所述绝缘层中并且向下延伸但与所述第一线间隔开的突出部分。

公开(公告)号：US06344363B1

公开(公告)日：2002-02-05

申请号：US09143099

申请日：1998-08-28

申请人： Rika Shinohara ,  Atsuhiro Tsukune ,  Hiroshi Kudo

发明人： Rika Shinohara ,  Atsuhiro Tsukune ,  Hiroshi Kudo

IPC分类号： H01L2100

CPC分类号： H01L27/11502 ,  C23C16/401 ,  C23C16/402 ,  C23C16/511 ,  H01L21/02131 ,  H01L21/02164 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/31612 ,  H01L21/31629 ,  H01L28/55

摘要： A ferroelectric film is formed on a principal surface of an underlying substrate. By the vapor deposition using high density plasma, an insulating protection film is deposited so that the ferroelectric film is covered therewith. The deposited protection film can prevent the ferroelectric film from deteriorating.

摘要翻译： 在下层基板的主面上形成铁电体膜。 通过使用高密度等离子体的气相沉积，沉积绝缘保护膜，以便将铁电体膜覆盖。 沉积的保护膜可以防止铁电体膜劣化。

公开(公告)号：US07679144B2

公开(公告)日：2010-03-16

申请号：US11938441

申请日：2007-11-12

申请人： Hiroshi Kudo ,  Kenji Ishikawa

发明人： Hiroshi Kudo ,  Kenji Ishikawa

IPC分类号： H01L27/088 ,  H01L21/00 ,  H01L21/84

CPC分类号： H01L27/1104 ,  H01L23/485 ,  H01L27/0207 ,  H01L27/11 ,  H01L2924/0002 ,  H01L2924/00

摘要： The semiconductor device includes a silicon substrate, a device isolation insulating film dividing an active region of the silicon substrate into plural pieces, a gate electrode formed on the active region, a source/drain region which is formed in the active region on both sides of the gate electrode, and which constitutes a MOS transistor of an SRAM memory cell with the gate electrode, an interlayer insulating film formed over each of the active region and the device isolation insulating film, a first hole which is formed in the interlayer isolation insulating film, and which commonly overlaps with two adjacent active regions and the device isolation insulating film between the active regions, and a first conductive plug which is formed in the first hole, and which electrically connects the two active regions.

摘要翻译： 半导体器件包括硅衬底，将硅衬底的有源区分成多个部件的器件隔离绝缘膜，形成在有源区上的栅电极，形成在有源区的两侧的有源区中的源/漏区 并且构成具有栅电极的SRAM存储单元的MOS晶体管，形成在有源区和器件隔离绝缘膜之上的层间绝缘膜，形成在层间隔离绝缘膜中的第一孔 并且其通常与有源区域之间的两个相邻的有源区和器件隔离绝缘膜重叠，并且形成在第一孔中并且电连接两个有源区的第一导电插塞。

公开(公告)号：USD580540S1

公开(公告)日：2008-11-11

申请号：US29306495

申请日：2008-04-10

申请人： Hiroshi Kudo

设计人： Hiroshi Kudo

公开(公告)号：US20080012081A1

公开(公告)日：2008-01-17

申请号：US11902246

申请日：2007-09-20

申请人： Hiroshi Kudo

发明人： Hiroshi Kudo

IPC分类号： H01L29/76

CPC分类号： H01L29/1083 ,  H01L21/26586 ,  H01L21/823807 ,  H01L21/823814 ,  H01L27/0207 ,  H01L27/11 ,  H01L27/1104 ,  H01L29/41758 ,  H01L29/665 ,  H01L29/66659 ,  H01L29/7835

摘要： The semiconductor device comprises a plurality of MOS transistors 12 each including a gate electrode 20 formed over a semiconductor substrate 10 with a gate insulating film 18 formed therebetween, and a source diffused layer 28 and a drain diffused layer 34 of a second conductions type arranged with a channel region 36 of a first conduction type therebetween, the source diffused layers 28 and the drain diffused layers 34 of said plural MIS transistors 12 being arranged side by side in the same direction, a pocket region of the first conduction type being formed selectively between the source diffused layer 28 and the channel region 36 of each of the plural MIS transistors 12, and a pocket impurity-not-implanted region being formed between the drain diffused layer 34 and the channel region 36 of each of the plural MIS transistors 12.

摘要翻译： 半导体器件包括多个MOS晶体管12，每个MOS晶体管12包括形成在半导体衬底10上的栅电极20，其间形成有栅极绝缘膜18，以及第二导电类型的源极扩散层28和漏极扩散层34， 在其间具有第一导电类型的沟道区36，所述多个MIS晶体管12的源极扩散层28和漏极扩散层34沿相同方向并排布置，第一导电类型的穴区选择性地形成在 多个MIS晶体管12中的每一个的源极扩散层28和沟道区36以及在多个MIS晶体管12的漏极扩散层34和沟道区36之间形成的杂质未掺杂区。

公开(公告)号：US07064038B2

公开(公告)日：2006-06-20

申请号：US10754577

申请日：2004-01-12

申请人： Hiroshi Kudo ,  Junko Naganuma ,  Sadahiro Kishii

发明人： Hiroshi Kudo ,  Junko Naganuma ,  Sadahiro Kishii

IPC分类号： H01L21/336 ,  H01L21/338 ,  H01L21/337 ,  H01L21/44

CPC分类号： H01L21/823835 ,  H01L21/823842 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/66606

摘要： The method for fabricating a semiconductor device comprises the steps of: forming a dummy electrode 22n and a dummy electrode 22p; forming a metal film 32 on the dummy electrode 22p; conducting a thermal treatment at a first temperature to substitute the dummy electrode 22n with an electrode 34a of a material containing the constituent material of the metal film 32; forming a metal film 36 on the dummy electrode 22n; and conducting a thermal treatment at a second temperature, which is lower than the first temperature and at which an interdiffusion of constituent materials between the electrode 34a and the metal film 36 does not take place, to substitute the second dummy electrode with an electrode 34b of a material containing the constituent material of the metal film 36.

公开(公告)号：US5602060A

公开(公告)日：1997-02-11

申请号：US582808

申请日：1996-01-04

申请人： Michiko Kobayashi ,  Syun-ichi Fukuyama ,  Yoshihiro Nakata ,  Masanori Naitou ,  Hiroshi Kudo ,  Yoshiyuki Ohkura

发明人： Michiko Kobayashi ,  Syun-ichi Fukuyama ,  Yoshihiro Nakata ,  Masanori Naitou ,  Hiroshi Kudo ,  Yoshiyuki Ohkura

IPC分类号： C01B33/12 ,  C08G77/12 ,  C09D183/16 ,  C23C18/12 ,  C30B29/06 ,  H01L21/312 ,  H01L21/316 ,  H01L21/768 ,  H01L23/29 ,  H01L23/522 ,  B05D3/02

CPC分类号： C23C18/1212 ,  C09D183/16 ,  C23C18/122 ,  C23C18/1279 ,  H01L21/312 ,  H01L21/316 ,  H01L23/296 ,  H01L2924/0002

摘要： Process for the production of semiconductor devices comprising the steps of applying a solution of the specified polycarbosilane in a solvent onto a substrate having electrically conductive components fabricated therein, and curing the coated layer of the polycarbosilane at a temperature of not less than 350.degree. C. in an oxidizing atmosphere to thereby covert the polycarbosilane layer to a silicon oxide layer. The resulting silicon oxide layer has a planarized surface and has no cracking and accordingly is useful as a dielectric layer and a protective layer in the production of semiconductor devices having a high reliability.

摘要翻译： 制造半导体器件的方法包括以下步骤：将特定的聚碳硅烷溶液溶解在其上制备导电组分的基片上，并在不低于350℃的温度下固化聚碳硅烷的涂层。 在氧化气氛中，将聚碳硅烷层转变成氧化硅层。 所得到的氧化硅层具有平坦化的表面，并且没有破裂，因此在制造具有高可靠性的半导体器件中可用作介电层和保护层。

公开(公告)号：US08067791B2

公开(公告)日：2011-11-29

申请号：US12621106

申请日：2009-11-18

申请人： Hiroshi Kudo ,  Junko Naganuma ,  Sadahiro Kishii

发明人： Hiroshi Kudo ,  Junko Naganuma ,  Sadahiro Kishii

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC分类号： H01L21/823835 ,  H01L21/823842 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/66606

摘要： A semiconductor device formed by the steps of: forming a dummy electrode 22n and a dummy electrode 22p; forming a metal film 32 on the dummy electrode 22p; conducting a thermal treatment at a first temperature to substitute the dummy electrode 22n with an electrode 34a of a material containing the constituent material of the metal film 32; forming a metal film 36 on the dummy electrode 22n; and conducting a thermal treatment at a second temperature, which is lower than the first temperature and at which an interdiffusion of constituent materials between the electrode 34a and the metal film 36 does not take place, to substitute the second dummy electrode with an electrode 34b of a material containing the constituent material of the metal film 36.

摘要翻译： 一种半导体器件，通过以下步骤形成：形成虚拟电极22n和虚拟电极22p; 在虚拟电极22p上形成金属膜32; 在第一温度进行热处理以用包含金属膜32的构成材料的材料的电极34a代替虚设电极22n; 在虚拟电极22n上形成金属膜36; 并且在低于第一温度的第二温度下进行热处理，并且在电极34a与金属膜36之间的构成材料不发生相互扩散的情况下，用第二虚拟电极用电极34b 含有金属膜36的构成材料的材料。

公开(公告)号：US07163887B2

公开(公告)日：2007-01-16

申请号：US10924847

申请日：2004-08-25

申请人： Hiroshi Kudo ,  Koichiro Inazawa

发明人： Hiroshi Kudo ,  Koichiro Inazawa

IPC分类号： H01L21/4763

CPC分类号： H01L21/76811 ,  H01L21/31138 ,  H01L21/76807

摘要： A method for fabricating a semiconductor device that prevents the occurrence of bowing and thickness reduction in a dual damascene method. As shown in FIG. 2(B), silicon nitride etching is performed on a semiconductor device in process of fabrication which has a section shown in FIG. 2(A). As a result, part of a copper film is oxidized and changes into oxide. Moreover, a CFx deposit is formed on it. By performing organic insulating film etching by the use of hydrogen plasma in FIG. 2(C), however, the oxide is deoxidized to copper and the CFx deposit is converted into a volatile compound and is removed.

摘要翻译： 一种制造半导体器件的方法，该半导体器件防止在双镶嵌方法中产生弯曲和厚度减小。 如图所示。 如图2（B）所示，在具有图2所示部分的制造工艺中对半导体器件进行氮化硅蚀刻。 2（A）。 结果，部分铜膜被氧化并变成氧化物。 此外，在其上形成CF x x沉积物。 通过在图1中使用氢等离子体进行有机绝缘膜蚀刻。 然而，如图2（C）所示，氧化物脱氧成铜，将CF>矿沉积物转化为挥发性化合物并除去。