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    Method of forming a solute-enriched layer in a substrate surface and article formed thereby
    1.
    发明授权
    Method of forming a solute-enriched layer in a substrate surface and article formed thereby 有权
    在基材表面形成富含溶质层的方法和由此形成的制品

    公开(公告)号：US06413866B1

    公开(公告)日：2002-07-02

    申请号：US09525367

    申请日：2000-03-15

    申请人： Horatio S. Wildman ,  Lawrence A. Clevenger ,  Chenting Lin ,  Kenneth P. Rodbell ,  Stefan Weber ,  Roy C. Iggulden ,  Maria Ronay ,  Florian Schnabel

    发明人： Horatio S. Wildman ,  Lawrence A. Clevenger ,  Chenting Lin ,  Kenneth P. Rodbell ,  Stefan Weber ,  Roy C. Iggulden ,  Maria Ronay ,  Florian Schnabel

    IPC分类号： H01L2144

    CPC分类号： H01L21/7685 ,  H01L21/321 ,  H01L21/76867 ,  H01L21/76888 ,  H01L23/53219 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method of enriching the surface of a substrate with a solute material that was originally dissolved in the substrate material, to yield a uniform dispersion of the solute material at the substrate surface. The method generally entails the use of a solvent material that is more reactive than the solute material to a chosen reactive agent. The surface of the substrate is reacted with the reactive agent to preferentially form a reaction compound of the solvent material at the surface of the substrate. As the compound layer develops, the solute material segregates or diffuses out of the compound layer and into the underlying substrate, such that the region of the substrate nearest the compound layer becomes enriched with the solute material. At least a portion of the compound layer is then removed without removing the underlying enriched region of the substrate. For microcircuit applications, the method can be used to enrich the surface of an aluminum line with elemental copper to improve the electromigration resistance of the line.

    摘要翻译： 一种使用最初溶解在基片材料中的溶质材料来富集基片的表面的方法，以使溶质材料在基片表面上均匀分散。 该方法通常需要使用比溶质材料对选择的反应剂更具反应性的溶剂材料。 使基板的表面与反应剂反应，以优先在基材的表面形成溶剂材料的反应化合物。 当化合物层发展时，溶质材料从化合物层中分离或扩散到下面的衬底中，使得最接近化合物层的衬底的区域变得富集溶质材料。 然后除去化合物层的至少一部分而不去除底物的下面的富集区域。 对于微电路应用，该方法可用于通过元素铜来丰富铝线的表面，以提高线路的电迁移能力。

    CMP process using indicator areas to determine endpoint
    3.
    发明授权
    CMP process using indicator areas to determine endpoint 有权
    CMP过程使用指示器区域来确定端点

    公开(公告)号：US5972787A

    公开(公告)日：1999-10-26

    申请号：US135866

    申请日：1998-08-18

    申请人： Karl E. Boggs ,  Chenting Lin ,  Joachim F. Nuetzel ,  Robert Ploessl ,  Maria Ronay ,  Florian Schnabel ,  Jeremy K. Stephens

    发明人： Karl E. Boggs ,  Chenting Lin ,  Joachim F. Nuetzel ,  Robert Ploessl ,  Maria Ronay ,  Florian Schnabel ,  Jeremy K. Stephens

    IPC分类号： H01L21/304 ,  B24B37/013 ,  B24B49/12 ,  H01L21/306 ,  H01L21/3105 ,  H01L21/66 ,  H01L23/544 ,  H01L21/4763 ,  H01L21/302 ,  H01L21/31

    CPC分类号： B24B49/12 ,  B24B37/013 ,  H01L21/31053 ,  H01L22/20 ,  H01L22/34 ,  H01L2924/0002

    摘要： The method of polishing metal layers on wafers comprises the steps of: providing indicator areas on said wafer, said indicator areas having combinations of line widths and pattern factors violating existing ground rules of metal lines thereby said indicator areas being dished out during said polishing using a chemical-mechanical polisher to polish the metal layers to remove material therefrom, inspecting indicator areas on the wafer to determine an amount of material removed from said areas, and adjusting the operation of the chemical-mechanical polisher in response to the inspection of the indicator areas. The indicator areas may include macroblocks comprised of a multitude of individual blocks. The wafer may be inspected by optically identifying the polishing state of to blocks in the macroblock. Additionally, the process may be automated for mass production. A feedback loop to the polisher can be formed where data from optical inspection of macroblocks on a polished wafer can be immediately fed back to the polisher in order to adjust process parameters.

    摘要翻译： 在晶片上抛光金属层的方法包括以下步骤：在所述晶片上提供指示器区域，所述指示器区域具有违反金属线的现有基准规则的线宽度和图案因素的组合，从而在所述抛光期间抛光所述指示器区域， 化学机械抛光机抛光金属层以从中去除材料，检查晶片上的指示器区域以确定从所述区域移除的材料的量，以及响应于指示器区域的检查来调整化学机械抛光机的操作 。 指示器区域可以包括由多个单独块组成的宏块。 可以通过光学地识别宏块中的块的抛光状态来检查晶片。 此外，该方法可以自动化用于批量生产。 可以形成到抛光机的反馈回路，其中来自抛光晶片上的宏块的光学检查的数据可以被立即反馈到抛光机，以便调整工艺参数。

    Electronic component with improved precharging
    6.
    发明申请
    Electronic component with improved precharging 审中-公开
    电子元件具有改进的预充电

    公开(公告)号：US20060250868A1

    公开(公告)日：2006-11-09

    申请号：US11402194

    申请日：2006-04-11

    申请人： Florian Schnabel ,  Helmut Schneider

    发明人： Florian Schnabel ,  Helmut Schneider

    IPC分类号： G11C7/00

    CPC分类号： G11C7/12 ,  G11C11/4094 ,  G11C2207/2227

    摘要： An electronic component has a first bit line and a second bit line, which are coupled to a plurality of memory cells, a line for providing a precharging potential, a resistance component which is connected to the line, a first switch which is coupled between the resistance component and the first bit line for connection of the first bit line to the resistance component, and a second switch, which is coupled between the resistance component and the second bit line, for connection of the second bit line to the resistance component. The electrical resistance of the resistance component is controllable in order to assume a predetermined first resistance value or a predetermined second resistance value which is higher than the first resistance value.

    摘要翻译： 电子部件具有第一位线和第二位线，其耦合到多个存储器单元，用于提供预充电电位的线，连接到线的电阻分量，第一开关，其耦合在 电阻分量和用于将第一位线连接到电阻分量的第一位线，以及耦合在电阻分量和第二位线之间的用于将第二位线连接到电阻分量的第二开关。 电阻分量的电阻是可控制的，以便呈现比第一电阻值高的预定第一电阻值或预定第二电阻值。

    Memory component having a novel arrangement of the bit lines
    7.
    发明申请
    Memory component having a novel arrangement of the bit lines 失效
    存储器组件具有位线的新颖布置

    公开(公告)号：US20060152988A1

    公开(公告)日：2006-07-13

    申请号：US11301354

    申请日：2005-12-12

    申请人： Florian Schnabel ,  Helmut Schneider

    发明人： Florian Schnabel ,  Helmut Schneider

    IPC分类号： G11C7/00

    CPC分类号： G11C5/025 ,  G11C7/06 ,  G11C7/18 ,  G11C11/4097 ,  H01L27/0207 ,  H01L27/10885 ,  H01L27/10897

    摘要： A memory component comprises a plurality of bit lines, on which memory cells are arranged, and a plurality of sense amplifiers, which are arranged in a row, each sense amplifier being connected to two bit lines. A bit line which is connected to a first sense amplifier in the row is arranged directly adjacent to a bit line which is connected to a second sense amplifier in the same row.

    摘要翻译： 存储器组件包括布置有存储器单元的多个位线和排列成行的多个读出放大器，每个读出放大器连接到两个位线。 连接到行中的第一读出放大器的位线被布置成与连接到同一行中的第二读出放大器的位线相邻。

    Apparatus and method for writing to and/or reading from a memory cell in a semiconductor memory
    8.
    发明申请
    Apparatus and method for writing to and/or reading from a memory cell in a semiconductor memory 审中-公开
    用于向半导体存储器中的存储单元进行写入和/或读取的装置和方法

    公开(公告)号：US20060133172A1

    公开(公告)日：2006-06-22

    申请号：US11283493

    申请日：2005-11-18

    申请人： Florian Schnabel ,  Jens Polney

    发明人： Florian Schnabel ,  Jens Polney

    IPC分类号： G11C7/04

    CPC分类号： G11C7/04 ,  G11C5/146 ,  G11C11/4074 ,  G11C11/409

    摘要： The invention proposes an apparatus for writing to and/or reading from a memory cell in a semiconductor memory having a selection transistor and a storage capacitor, where the apparatus has a device which is used to influence a threshold voltage for the selection transistor contrary to the influence of an ambient temperature. The invention also proposes a method for writing to and/or reading from a memory cell in a semiconductor memory having a selection transistor and a storage capacitor, where the method comprises the following method steps: a) an ambient temperature for the memory cell is ascertained, and b) an electrical voltage is applied to a substrate well in the selection transistor as a function of the ascertained ambient temperature such that a threshold voltage for the selection transistor is influenced contrary to the influence of an ambient temperature.

    摘要翻译： 本发明提出了一种用于在具有选择晶体管和存储电容器的半导体存储器中从存储单元写入和/或读取的装置，其中该装置具有用于影响与该选择晶体管相反的选择晶体管的阈值电压的装置 环境温度的影响。 本发明还提出了一种用于在具有选择晶体管和存储电容器的半导体存储器中的存储单元的写入和/或读取方法，其中该方法包括以下方法步骤：a）确定存储单元的环境温度 并且b）作为所确定的环境温度的函数，在选择晶体管中的基板上施加电压，使得选择晶体管的阈值电压与环境温度的影响相反。