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    Circuit substrate
    1.
    发明授权
    Circuit substrate 有权

    公开(公告)号：US10559534B2

    公开(公告)日：2020-02-11

    申请号：US16052641

    申请日：2018-08-02

    Applicant: Industrial Technology Research Institute ,  First Hi-tec Enterprise Co., Ltd. ,  NEXCOM International Co., Ltd.

    Inventor： Sheng-Che Hung ,  Min-Lin Lee ,  Ching-Shan Chang ,  Hung-I Liu

    IPC: H05K1/18 ,  H01L23/538 ,  H01L23/522 ,  H01L23/00 ,  H05K1/02 ,  H01L23/498 ,  H05K1/11

    Abstract: A circuit substrate includes a dielectric layer, a first conductive structure and a second conductive structure. The first conductive structure includes a first conductive circuit and a first conductive via. The first conductive circuit is disposed on the dielectric layer. The first conductive via is disposed in the dielectric layer, and the first conductive circuit is connected to the first conductive via. The second conductive structure includes a second conductive circuit and a second conductive via. The second conductive circuit is disposed in the dielectric layer, the second conductive circuit and the first conductive circuit of the first conductive structure are arranged with an interval, and the second conductive via surrounds the first conductive via with an interval. The second conductive structure has an extending portion. The extending portion protrudes toward the first conductive via and does not contact the first conductive via.

    Circuit board having via and manufacturing method thereof
    3.
    发明授权
    Circuit board having via and manufacturing method thereof 有权
    具有通孔及其制造方法的电路板

    公开(公告)号：US09125304B2

    公开(公告)日：2015-09-01

    申请号：US14226526

    申请日：2014-03-26

    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE

    Inventor： Shih-Hsien Wu ,  Min-Lin Lee

    IPC: H05K1/11 ,  H05K3/10 ,  H05K1/02 ,  H05K3/46

    CPC classification number: H05K1/0227 ,  H05K1/0222 ,  H05K1/0251 ,  H05K1/115 ,  H05K1/116 ,  H05K3/4685 ,  H05K2201/09854 ,  Y10T29/49165

    Abstract: The disclosure provides a manufacturing method for a circuit board having a via and including a substrate, a ground conductor, a floated conductor and a signal conductor. The substrate includes a second sheet layer, a second ground layer, a core layer, a first ground layer and a first sheet layer that are stacked in sequence from bottom to top. The ground conductor penetrates through the core layer and is electrically coupled to the first ground layer and the second ground layer. The floated conductor penetrates through the core layer and is electrically insulated from the first ground layer, the second ground layer and the ground conductor. The signal conductor penetrates through the substrate, being located between the ground conductor and the floated conductor, and insulated from the first ground layer, the second ground layer, the ground conductor and the floated conductor.

    Abstract translation: 本发明提供了一种具有通孔并且包括衬底，接地导体，浮动导体和信号导体的电路板的制造方法。 基板包括从底部到顶部依次层叠的第二片层，第二接地层，芯层，第一接地层和第一片层。 接地导体穿过芯层并电耦合到第一接地层和第二接地层。 浮动导体穿过芯层，并与第一接地层，第二接地层和接地导体电绝缘。 信号导体穿过衬底，位于接地导体和浮动导体之间，并与第一接地层，第二接地层，接地导体和浮动导体绝缘。

    Multi-layer circuit structure
    5.
    发明授权
    Multi-layer circuit structure 有权

    公开(公告)号：US10129974B2

    公开(公告)日：2018-11-13

    申请号：US15245202

    申请日：2016-08-24

    Applicant: Industrial Technology Research Institute ,  First Hi-tec Enterprise Co., Ltd. ,  NEXCOM International Co., Ltd.

    Inventor： Chien-Min Hsu ,  Min-Lin Lee ,  Huey-Ru Chang ,  Hung-I Liu ,  Ching-shan Chang

    IPC: H01P3/08 ,  H05K1/02 ,  H05K1/11

    Abstract: A multi-layer circuit structure includes a differential transmission line pair and at least one conductive pattern. The differential transmission line pair includes first and second transmission lines disposed side by side. Each of the first and second transmission lines includes first and second segments connected to each other. An spacing between the two first segments is non-fixed, and an spacing between the two second segments is fixed. A first zone is located between the two first segments, a second zone is opposite to the first zone and located outside the first segment of the first transmission line, and a third zone is opposite to the first zone and located outside the first segment of the second transmission line. The conductive pattern is coplanar with the differential transmission line pair and disposed on at least one of the first, second and third zones. The conductive pattern is electrically connected to a reference potential and electrically insulated from the differential transmission line pair.

    VIA STRUCTURE
    6.
    发明申请
    VIA STRUCTURE 有权
    威盛结构

    公开(公告)号：US20150334821A1

    公开(公告)日：2015-11-19

    申请号：US14809607

    申请日：2015-07-27

    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE

    Inventor： Shih-Hsien WU ,  Min-Lin Lee

    IPC: H05K1/02 ,  H05K1/11

    CPC classification number: H05K1/0227 ,  H05K1/0222 ,  H05K1/0251 ,  H05K1/115 ,  H05K1/116 ,  H05K3/4685 ,  H05K2201/09854 ,  Y10T29/49165

    Abstract: A via structure includes a ground conductor, a floated conductor and a signal conductor. The ground conductor is electrically coupled to a reference potential. The floated conductor is electrically insulated from the ground conductor. The signal conductor is located between and insulated from the ground conductor and the floated conductor.

    Abstract translation: 通孔结构包括接地导体，浮动导体和信号导体。 接地导体电耦合到参考电位。 浮动导体与接地导体电绝缘。 信号导体位于接地导体和浮动导体之间并与之绝缘。

    Embedded capacitor module
    7.
    发明授权
    Embedded capacitor module 有权
    嵌入式电容器模块

    公开(公告)号：US09013893B2

    公开(公告)日：2015-04-21

    申请号：US13896436

    申请日：2013-05-17

    Applicant: Industrial Technology Research Institute

    Inventor： Chien-Min Hsu ,  Min-Lin Lee ,  Cheng-Liang Cheng ,  Li-Duan Tsai

    IPC: H05K1/18 ,  H01L23/498 ,  H01L23/64 ,  H05K1/02 ,  H05K1/16 ,  H01L23/50 ,  H01L23/00 ,  H05K3/46 ,  H01G4/33

    CPC classification number: H05K1/185 ,  H01G4/33 ,  H01L23/49822 ,  H01L23/50 ,  H01L23/642 ,  H01L24/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/14 ,  H01L2924/19041 ,  H05K1/0231 ,  H05K1/162 ,  H05K3/4608 ,  H05K2201/0116 ,  H05K2201/0187 ,  H05K2201/09309 ,  H05K2203/0315

    Abstract: An embedded capacitor module includes an electrode lead-out portion and at least one solid electrolytic capacitor portion adjacently disposed with the electrode lead-out portion. The electrode lead-out portion comprises a first substrate, a second substrate, a first insulating material disposed between the first substrate and the second substrate, a first porous layer formed on at least one surface of the first substrate, and a first oxide layer disposed on the first porous layer. The solid electrolytic capacitor portion comprises the first substrate, the second substrate, the first porous layer, the first oxide layer, all of which are extended from the electrode lead-out portion, a first conductive polymer layer disposed on the first oxide layer, a first carbon layer disposed on the first conductive polymer layer, and a first conductive adhesive layer disposed on the first carbon layer.

    Abstract translation: 嵌入式电容器模块包括电极引出部分和与电极引出部分相邻设置的至少一个固体电解电容器部分。 电极引出部包括第一基板，第二基板，设置在第一基板和第二基板之间的第一绝缘材料，形成在第一基板的至少一个表面上的第一多孔层和设置在第一基板 在第一多孔层上。 固体电解电容器部分包括第一衬底，第二衬底，第一多孔层，第一氧化物层，它们全部从电极引出部分延伸出来，第一导电聚合物层设置在第一氧化物层上， 设置在第一导电聚合物层上的第一碳层和设置在第一碳层上的第一导电粘合剂层。

    CIRCUIT SUBSTRATE
    8.
    发明申请
    CIRCUIT SUBSTRATE 审中-公开

    公开(公告)号：US20190148300A1

    公开(公告)日：2019-05-16

    申请号：US16052641

    申请日：2018-08-02

    Applicant: Industrial Technology Research Institute ,  First Hi-tec Enterprise Co.,Ltd. ,  NEXCOM International Co., Ltd.

    Inventor： Sheng-Che Hung ,  Min-Lin Lee ,  Ching-Shan Chang ,  Hung-I Liu

    IPC: H01L23/538 ,  H01L23/00 ,  H01L23/522

    Abstract: A circuit substrate includes a dielectric layer, a first conductive structure and a second conductive structure. The first conductive structure includes a first conductive circuit and a first conductive via. The first conductive circuit is disposed on the dielectric layer. The first conductive via is disposed in the dielectric layer, and the first conductive circuit is connected to the first conductive via. The second conductive structure includes a second conductive circuit and a second conductive via. The second conductive circuit is disposed in the dielectric layer, the second conductive circuit and the first conductive circuit of the first conductive structure are arranged with an interval, and the second conductive via surrounds the first conductive via with an interval. The second conductive structure has an extending portion. The extending portion protrudes toward the first conductive via and does not contact the first conductive via.

    Via structure
    10.
    发明授权
    Via structure 有权
    通过结构

    公开(公告)号：US09258883B2

    公开(公告)日：2016-02-09

    申请号：US14809607

    申请日：2015-07-27

    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE

    Inventor： Shih-Hsien Wu ,  Min-Lin Lee

    IPC: H05K1/11 ,  H05K1/02

    CPC classification number: H05K1/0227 ,  H05K1/0222 ,  H05K1/0251 ,  H05K1/115 ,  H05K1/116 ,  H05K3/4685 ,  H05K2201/09854 ,  Y10T29/49165

    Abstract: A via structure includes a ground conductor, a floated conductor and a signal conductor. The ground conductor is electrically coupled to a reference potential. The floated conductor is electrically insulated from the ground conductor. The signal conductor is located between and insulated from the ground conductor and the floated conductor.

    Abstract translation: 通孔结构包括接地导体，浮动导体和信号导体。 接地导体电耦合到参考电位。 浮动导体与接地导体电绝缘。 信号导体位于接地导体和浮动导体之间并与之绝缘。

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