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公开(公告)号：US20170135227A1
公开(公告)日：2017-05-11
申请号：US15318829
申请日：2015-06-19
申请人： Alpha Metals, Inc.
发明人： Hosur Venkatagiriyappa Ramakrishna , Morgana De Avila Ribas , Ranjit Pandher , Siuli Sarkar , Sutapa Mukherjee , Bawa Singh
IPC分类号： H05K3/34 , H05K1/09 , H05K1/11 , B23K35/362 , B23K1/00 , B23K35/02 , B23K35/36 , H01L23/00 , H05K1/18
CPC分类号： H05K3/3489 , B23K1/0016 , B23K1/203 , B23K35/025 , B23K35/26 , B23K35/3613 , B23K35/362 , H01L24/83 , H01L2224/2929 , H01L2224/29294 , H01L2224/293 , H01L2224/29388 , H01L2224/2939 , H01L2224/29393 , H01L2224/32225 , H01L2224/83011 , H01L2224/83024 , H01L2224/83815 , H01L2224/8392 , H01L2924/0665 , H05K1/09 , H05K1/111 , H05K1/181 , H05K3/3431 , H01L2924/014
摘要： A method of forming a solder joint, the method comprising: (i) providing a solder flux; (ii) providing solder particles; (iii) providing two or more work pieces to be joined; and (iv) heating the solder flux and the solder particles in the vicinity of the two or more work pieces to be joined to form: (i) a solder joint between the two or more work pieces to be joined, and (ii) a solder flux residue. The solder flux residue substantially covers the exposed surfaces of the solder joint.
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2.发明授权Packaged semiconductor devices, methods of packaging semiconductor devices, and PoP devices 有权封装半导体器件，封装半导体器件的方法和PoP器件公开(公告)号：US09570401B2
公开(公告)日：2017-02-14
申请号：US15167258
申请日：2016-05-27
发明人： Po-Hao Tsai , Jui-Pin Hung , Jing-Cheng Lin
IPC分类号： H01L21/48 , H01L23/538 , H01L25/10 , H01L21/56 , H01L25/00
CPC分类号： H01L23/562 , H01L21/4853 , H01L21/4857 , H01L21/486 , H01L21/565 , H01L21/78 , H01L23/3114 , H01L23/3128 , H01L23/49816 , H01L23/49827 , H01L23/5383 , H01L23/5384 , H01L23/5386 , H01L23/5389 , H01L24/03 , H01L24/19 , H01L24/73 , H01L24/83 , H01L24/97 , H01L25/105 , H01L25/50 , H01L2224/02317 , H01L2224/033 , H01L2224/04105 , H01L2224/12105 , H01L2224/13024 , H01L2224/19 , H01L2224/32145 , H01L2224/32225 , H01L2224/73265 , H01L2224/73267 , H01L2224/8392 , H01L2224/97 , H01L2225/0651 , H01L2225/06568 , H01L2225/1035 , H01L2225/1041 , H01L2225/1047 , H01L2225/1058 , H01L2924/01322 , H01L2924/12042 , H01L2924/15311 , H01L2924/181 , H01L2224/48227 , H01L2924/00012 , H01L2224/82 , H01L2924/00 , H01L2224/83 , H01L2224/83005
摘要： Packaged semiconductor devices, methods of packaging semiconductor devices, and package-on-package (PoP) devices are disclosed. In some embodiments, a method of packaging a semiconductor device includes forming through-package vias (TPVs) over a carrier, and coupling a semiconductor device to the carrier. The semiconductor device includes contact pads disposed on a surface thereof and an insulating material disposed over the contact pads. A molding material is formed over the carrier between the TPVs and the semiconductor device. Openings are formed in the insulating material using a laser drilling process over the contact pads, and a redistribution layer (RDL) is formed over the insulating material and the openings in the insulating material. A portion of the RDL is coupled to a top surface of each of the contact pads.
摘要翻译： 公开了封装半导体器件，封装半导体器件的方法和封装封装（PoP）器件。 在一些实施例中，封装半导体器件的方法包括在载体上形成贯穿封装通孔（TPV），以及将半导体器件耦合到载体。 半导体器件包括设置在其表面上的接触焊盘和设置在接触焊盘上的绝缘材料。 在TPV和半导体器件之间的载体上形成模制材料。 使用在接触焊盘上的激光钻孔工艺在绝缘材料中形成开口，并且在绝缘材料和绝缘材料中的开口上形成再分布层（RDL）。 RDL的一部分耦合到每个接触焊盘的顶表面。
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公开(公告)号：US20160190085A1
公开(公告)日：2016-06-30
申请号：US14959468
申请日：2015-12-04
发明人： Akira KATO
CPC分类号： H01L24/32 , H01L21/4821 , H01L23/3107 , H01L23/3142 , H01L23/49513 , H01L23/49517 , H01L23/49537 , H01L23/49575 , H01L23/49582 , H01L24/29 , H01L24/83 , H01L2224/26175 , H01L2224/29083 , H01L2224/291 , H01L2224/29111 , H01L2224/29116 , H01L2224/29147 , H01L2224/32245 , H01L2224/83444 , H01L2224/83447 , H01L2224/83544 , H01L2224/83655 , H01L2224/8392 , H01L2224/83948 , H01L2224/83951 , H01L2924/181 , H01L2924/014 , H01L2924/00014 , H01L2924/01047 , H01L2924/01029 , H01L2924/0103 , H01L2924/0102
摘要： A manufacturing method of a semiconductor module, includes: forming a Ni plating layer on a surface of a first lead frame; forming a Au plating layer on a surface of the Ni plating layer; manufacturing an intermediate body that a semiconductor element is soldered to the first lead frame; forming a primer layer by applying a primer to a surface of the intermediate body and then drying the primer; molding a sealing resin body on a surface of the primer layer; and performing heat treatment so that Ni included in the Ni plating layer is dispersed in the Au plating layer.
摘要翻译： 一种半导体模块的制造方法，包括：在第一引线框架的表面上形成Ni镀层; 在所述Ni镀层的表面上形成Au镀层; 制造半导体元件被焊接到第一引线框架的中间体; 通过将底漆施用到中间体的表面，然后干燥底漆来形成底漆层; 在底漆层的表面上成型密封树脂体; 并且进行热处理，使得Ni镀层中包含的Ni分散在Au镀层中。
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公开(公告)号：US20160064298A1
公开(公告)日：2016-03-03
申请号：US14835750
申请日：2015-08-26
发明人： Peh Hean TEH , Jagen Krishnan , Swee Kah Lee , Poh Cheng Lim , Joachim Mahler , Chew Theng Tai , Yik Yee Tan , Soon Lock Goh
IPC分类号： H01L23/29 , H01L21/3105 , H01L23/00 , H01L21/56 , H01L23/495 , H01L23/31
CPC分类号： H01L21/3105 , C09J163/00 , H01L21/56 , H01L23/295 , H01L23/3107 , H01L23/3142 , H01L23/49513 , H01L23/49548 , H01L23/49555 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2224/8392 , H01L2224/8592 , H01L2224/92247 , H01L2924/181 , H01L2924/00012 , H01L2924/00014 , H01L2924/00
摘要： An electronic device comprising a carrier having a mounting surface, at least one electronic chip mounted on the mounting surface, an encapsulant at least partially encapsulating the carrier and the at least one electronic chip, and a plurality of capsules in the encapsulant, wherein the capsules comprise a core comprising an additive and comprise a shell, in particular a crackable shell, enclosing the core.
摘要翻译： 一种电子设备，包括具有安装表面的载体，安装在所述安装表面上的至少一个电子芯片，至少部分地封装所述载体和所述至少一个电子芯片的密封剂以及所述密封剂中的多个胶囊，其中所述胶囊 包括包含添加剂的芯，并且包括封装芯的壳，特别是可裂纹壳。
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5.发明授权Packaged semiconductor devices, methods of packaging semiconductor devices, and PoP devices 有权封装半导体器件，封装半导体器件的方法和PoP器件公开(公告)号：US08877554B2
公开(公告)日：2014-11-04
申请号：US13890162
申请日：2013-05-08
发明人： Po-Hao Tsai , Jui-Pin Hung , Jing-Cheng Lin
IPC分类号： H01L23/48 , H01L23/498 , H01L21/768
CPC分类号： H01L23/562 , H01L21/4853 , H01L21/4857 , H01L21/486 , H01L21/565 , H01L21/78 , H01L23/3114 , H01L23/3128 , H01L23/49816 , H01L23/49827 , H01L23/5383 , H01L23/5384 , H01L23/5386 , H01L23/5389 , H01L24/03 , H01L24/19 , H01L24/73 , H01L24/83 , H01L24/97 , H01L25/105 , H01L25/50 , H01L2224/02317 , H01L2224/033 , H01L2224/04105 , H01L2224/12105 , H01L2224/13024 , H01L2224/19 , H01L2224/32145 , H01L2224/32225 , H01L2224/73265 , H01L2224/73267 , H01L2224/8392 , H01L2224/97 , H01L2225/0651 , H01L2225/06568 , H01L2225/1035 , H01L2225/1041 , H01L2225/1047 , H01L2225/1058 , H01L2924/01322 , H01L2924/12042 , H01L2924/15311 , H01L2924/181 , H01L2224/48227 , H01L2924/00012 , H01L2224/82 , H01L2924/00 , H01L2224/83 , H01L2224/83005
摘要： Packaged semiconductor devices, methods of packaging semiconductor devices, and package-on-package (PoP) devices are disclosed. In some embodiments, a method of packaging a semiconductor device includes forming through-package vias (TPVs) over a carrier, and coupling a semiconductor device to the carrier. The semiconductor device includes contact pads disposed on a surface thereof and an insulating material disposed over the contact pads. A molding material is formed over the carrier between the TPVs and the semiconductor device. Openings are formed in the insulating material using a laser drilling process over the contact pads, and a redistribution layer (RDL) is formed over the insulating material and the openings in the insulating material. A portion of the RDL is coupled to a top surface of each of the contact pads.
摘要翻译： 公开了封装半导体器件，封装半导体器件的方法和封装封装（PoP）器件。 在一些实施例中，封装半导体器件的方法包括在载体上形成贯穿封装通孔（TPV），以及将半导体器件耦合到载体。 半导体器件包括设置在其表面上的接触焊盘和设置在接触焊盘上的绝缘材料。 在TPV和半导体器件之间的载体上形成模制材料。 使用在接触焊盘上的激光钻孔工艺在绝缘材料中形成开口，并且在绝缘材料和绝缘材料中的开口上形成再分布层（RDL）。 RDL的一部分耦合到每个接触焊盘的顶表面。
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6.发明申请Packaged Semiconductor Devices, Methods of Packaging Semiconductor Devices, and PoP Devices 有权封装半导体器件，封装半导体器件和PoP器件的方法公开(公告)号：US20140264839A1
公开(公告)日：2014-09-18
申请号：US13890162
申请日：2013-05-08
发明人： Po-Hao Tsai , Jui-Pin Hung , Jing-Cheng Lin
IPC分类号： H01L23/498 , H01L21/768
CPC分类号： H01L23/562 , H01L21/4853 , H01L21/4857 , H01L21/486 , H01L21/565 , H01L21/78 , H01L23/3114 , H01L23/3128 , H01L23/49816 , H01L23/49827 , H01L23/5383 , H01L23/5384 , H01L23/5386 , H01L23/5389 , H01L24/03 , H01L24/19 , H01L24/73 , H01L24/83 , H01L24/97 , H01L25/105 , H01L25/50 , H01L2224/02317 , H01L2224/033 , H01L2224/04105 , H01L2224/12105 , H01L2224/13024 , H01L2224/19 , H01L2224/32145 , H01L2224/32225 , H01L2224/73265 , H01L2224/73267 , H01L2224/8392 , H01L2224/97 , H01L2225/0651 , H01L2225/06568 , H01L2225/1035 , H01L2225/1041 , H01L2225/1047 , H01L2225/1058 , H01L2924/01322 , H01L2924/12042 , H01L2924/15311 , H01L2924/181 , H01L2224/48227 , H01L2924/00012 , H01L2224/82 , H01L2924/00 , H01L2224/83 , H01L2224/83005
摘要： Packaged semiconductor devices, methods of packaging semiconductor devices, and package-on-package (PoP) devices are disclosed. In some embodiments, a method of packaging a semiconductor device includes forming through-package vias (TPVs) over a carrier, and coupling a semiconductor device to the carrier. The semiconductor device includes contact pads disposed on a surface thereof and an insulating material disposed over the contact pads. A molding material is formed over the carrier between the TPVs and the semiconductor device. Openings are formed in the insulating material using a laser drilling process over the contact pads, and a redistribution layer (RDL) is formed over the insulating material and the openings in the insulating material. A portion of the RDL is coupled to a top surface of each of the contact pads.
摘要翻译： 公开了封装半导体器件，封装半导体器件的方法和封装封装（PoP）器件。 在一些实施例中，封装半导体器件的方法包括在载体上形成贯穿封装通孔（TPV），以及将半导体器件耦合到载体。 半导体器件包括设置在其表面上的接触焊盘和设置在接触焊盘上的绝缘材料。 在TPV和半导体器件之间的载体上形成模制材料。 使用在接触焊盘上的激光钻孔工艺在绝缘材料中形成开口，并且在绝缘材料和绝缘材料中的开口上形成再分布层（RDL）。 RDL的一部分耦合到每个接触焊盘的顶表面。
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公开(公告)号：US08314484B2
公开(公告)日：2012-11-20
申请号：US12691175
申请日：2010-01-21
申请人： Ryoichi Kajiwara , Shigehisa Motowaki , Kazutoshi Ito , Toshiaki Ishii , Katsuo Arai , Takuya Nakajo , Hidemasa Kagii
发明人： Ryoichi Kajiwara , Shigehisa Motowaki , Kazutoshi Ito , Toshiaki Ishii , Katsuo Arai , Takuya Nakajo , Hidemasa Kagii
IPC分类号： H01L23/15
CPC分类号： H01L21/56 , H01L23/3107 , H01L23/49513 , H01L23/49524 , H01L23/49562 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/40 , H01L24/41 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/83 , H01L24/85 , H01L2224/04026 , H01L2224/05624 , H01L2224/05644 , H01L2224/0603 , H01L2224/29101 , H01L2224/2919 , H01L2224/29339 , H01L2224/29347 , H01L2224/32245 , H01L2224/40245 , H01L2224/40247 , H01L2224/40249 , H01L2224/45124 , H01L2224/48091 , H01L2224/48247 , H01L2224/48472 , H01L2224/48724 , H01L2224/48747 , H01L2224/4903 , H01L2224/49051 , H01L2224/49171 , H01L2224/73265 , H01L2224/83192 , H01L2224/83439 , H01L2224/83801 , H01L2224/8384 , H01L2224/8385 , H01L2224/83855 , H01L2224/83856 , H01L2224/8392 , H01L2224/83951 , H01L2224/84801 , H01L2224/8485 , H01L2224/85447 , H01L2224/8592 , H01L2224/92 , H01L2224/92247 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/014 , H01L2924/0665 , H01L2924/0781 , H01L2924/10253 , H01L2924/12044 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/30105 , H01L2924/351 , H01L2924/05432 , H01L2224/78 , H01L2924/00 , H01L2924/00012 , H01L2924/01032 , H01L2924/3512 , H01L2224/48744
摘要： In a structure of a semiconductor device, a Si chip and a metal leadframe are jointed by metallic bond via a porous joint layer made of high conductive metal, having a three-dimensional network structure and using Ag as a bonding material, and a film containing Zn oxide or Al oxide is formed on a surface of a semiconductor assembly contacting to a polymer resin. In this manner, by the joint with the joint layer having the porous structure mainly made of Ag, thermal stress load of the Si chip can be reduced, and fatigue life of the joint layer itself can be improved. Besides, since adhesion of the polymer resin to the film can be enhanced by the anchor effect, occurrence of cracks in a bonding portion can be prevented, so that a highly-reliable Pb-free semiconductor device can be provided.
摘要翻译： 在半导体器件的结构中，Si芯片和金属引线框通过金属接合，通过具有三维网状结构的高导电性金属的多孔接合层，使用Ag作为接合材料，以及含有 在与聚合物树脂接触的半导体组件的表面上形成氧化锌或氧化铝。 以这种方式，通过与主要由Ag形成的多孔结构的接合层的接合，可以降低Si片的热应力负荷，并且可以提高接合层本身的疲劳寿命。 此外，由于通过锚固效应可以提高聚合物树脂对膜的粘附性，可以防止接合部发生裂纹，从而可以提供高可靠性的无铅半导体器件。
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8.发明申请公开(公告)号：US20110290863A1
公开(公告)日：2011-12-01
申请号：US13117361
申请日：2011-05-27
CPC分类号： H01B1/02 , B22F3/22 , B22F2998/00 , B22F2998/10 , B23K1/0016 , B23K1/206 , B23K2101/40 , C22C1/0466 , H01B1/22 , H01L23/49513 , H01L23/4952 , H01L23/49582 , H01L24/05 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/83 , H01L24/85 , H01L2224/04026 , H01L2224/04042 , H01L2224/05644 , H01L2224/0603 , H01L2224/27332 , H01L2224/29339 , H01L2224/32245 , H01L2224/45014 , H01L2224/45124 , H01L2224/48091 , H01L2224/48247 , H01L2224/48724 , H01L2224/48744 , H01L2224/73265 , H01L2224/83055 , H01L2224/83065 , H01L2224/83097 , H01L2224/83192 , H01L2224/83455 , H01L2224/8384 , H01L2224/8392 , H01L2224/83951 , H01L2224/83986 , H01L2224/85205 , H01L2224/92247 , H01L2924/00011 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01014 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/0665 , H01L2924/10253 , H01L2924/12044 , H01L2924/15747 , H01L2924/181 , H01L2924/00014 , B22F3/10 , B22F1/02 , H01L2924/00012 , H01L2924/00 , H01L2224/2919 , H01L2224/29101 , H01L2924/3512 , H01L2224/83205
摘要： An object of the present invention is to provide a composition of a sintering Ag paste which can metallically bond to a nonprecious metal member with high strength as well as to a precious metal member, in a sintering Ag paste which metallically bonds to a metal at a low temperature, and to provide a bonding method to obtain a joint part having high strength. The sintering Ag paste is a material containing a solution of an organic silver complex that is easily decomposed by heat regardless of an atmosphere. Furthermore, the bonding method includes: metallizing a face of a nonprecious metal with Ag in a non-oxidizing atmosphere in a step prior to sintering Ag particles; and then sintering the Ag particles in an oxidizing atmosphere.
摘要翻译： 本发明的目的是提供一种烧结Ag糊料的组合物，该组合物可以在与金属结合的烧结Ag糊料中金属结合到金属上，该组合物可以金属结合到具有高强度的非贵重金属构件以及贵金属构件 并且提供接合方法以获得具有高强度的接合部。 烧结Ag糊料是含有有机银络合物的溶液的材料，无论气氛如何，其易于被热分解。 此外，接合方法包括：在烧结Ag颗粒之前的步骤中，在非氧化性气氛中将Ag非金属金属的金属化金属化; 然后在氧化气氛中烧结Ag粒子。
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公开(公告)号：US11862601B2
公开(公告)日：2024-01-02
申请号：US17866915
申请日：2022-07-18
发明人： Min Sung Kim , Myong-Soo Oh , Jun O Song , Hee Jong Shin
IPC分类号： H01L23/00 , G02F1/1345 , H10K50/84 , G02F1/13 , H10K50/805 , H10K71/00
CPC分类号： H01L24/83 , G02F1/1309 , G02F1/13452 , H01L24/32 , H10K50/805 , H10K50/846 , H01L2224/32225 , H01L2224/8392 , H01L2224/83914 , H01L2224/83939 , H10K71/861
摘要： A method for manufacturing a display device includes checking a particle positioned between a display panel and a connecting member, irradiating a laser to an upper surface of the connecting member overlapping at least a part of the particle, removing the connecting member overlapping a region to which the laser is irradiated, removing the particle overlapping a region to which the laser is irradiated, and disposing a desiccant in a hole formed by removing the connecting member and the particle.
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公开(公告)号：US11842992B2
公开(公告)日：2023-12-12
申请号：US17748511
申请日：2022-05-19
发明人： Kuo-Ming Wu , Kuan-Liang Liu , Wen-De Wang , Yung-Lung Lin
CPC分类号： H01L25/50 , H01L23/585 , H01L24/29 , H01L24/66 , H01L24/69 , H01L24/83 , H01L24/89 , H01L23/3114 , H01L23/564 , H01L24/73 , H01L24/81 , H01L25/0657 , H01L25/18 , H01L2224/1145 , H01L2224/1161 , H01L2224/1162 , H01L2224/11462 , H01L2224/11845 , H01L2224/13147 , H01L2224/17517 , H01L2224/2745 , H01L2224/2761 , H01L2224/2762 , H01L2224/27462 , H01L2224/27845 , H01L2224/29011 , H01L2224/29012 , H01L2224/29015 , H01L2224/29019 , H01L2224/29035 , H01L2224/29147 , H01L2224/73103 , H01L2224/73203 , H01L2224/81193 , H01L2224/81815 , H01L2224/81895 , H01L2224/8392 , H01L2224/83193 , H01L2224/83815 , H01L2224/83895 , H01L2224/83935 , H01L2224/83951 , H01L2224/13147 , H01L2924/00014 , H01L2224/29147 , H01L2924/00014 , H01L2224/27462 , H01L2924/00014 , H01L2224/2745 , H01L2924/00014 , H01L2224/11462 , H01L2924/00014 , H01L2224/1145 , H01L2924/00014 , H01L2224/1161 , H01L2924/00014 , H01L2224/1162 , H01L2924/00014 , H01L2224/2761 , H01L2924/00014 , H01L2224/2762 , H01L2924/00014 , H01L2224/83815 , H01L2924/00014 , H01L2224/81895 , H01L2924/00014 , H01L2224/81815 , H01L2924/00014 , H01L2224/83935 , H01L2924/00012 , H01L2224/29012 , H01L2924/00012
摘要： Some embodiments relate to a three-dimensional (3D) integrated circuit (IC). The 3D IC includes a first IC die comprising a first semiconductor substrate, and a first interconnect structure over the first semiconductor substrate. The 3D IC also includes a second IC die comprising a second semiconductor substrate, and a second interconnect structure that separates the second semiconductor substrate from the first interconnect structure. A seal ring structure separates the first interconnect structure from the second interconnect structure and perimetrically surrounds a gas reservoir between the first IC die and second IC die. The seal ring structure includes a sidewall gas-vent opening structure configured to allow gas to pass between the gas reservoir and an ambient environment surrounding the 3D IC.
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