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Patent Agency Ranking
公开(公告)号：US20150084202A1
公开(公告)日：2015-03-26
申请号：US14038248
申请日：2013-09-26
Applicant: Georg Seidemann , Sven Albers , Teodora Ossiander , Michael Skinner , Hans-Joachim Barth , Harald Gossner , Reinhard Mahnkoph , Christian Mueller , Wolfgang Molzer
Inventor： Georg Seidemann , Sven Albers , Teodora Ossiander , Michael Skinner , Hans-Joachim Barth , Harald Gossner , Reinhard Mahnkoph , Christian Mueller , Wolfgang Molzer
IPC: H01L23/00 , H01L25/00 , H01L25/065
CPC classification number: H01L24/09 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/08 , H01L24/13 , H01L24/16 , H01L24/48 , H01L24/80 , H01L24/81 , H01L25/0655 , H01L25/50 , H01L2224/03444 , H01L2224/0346 , H01L2224/03602 , H01L2224/0401 , H01L2224/04042 , H01L2224/05009 , H01L2224/05013 , H01L2224/05014 , H01L2224/05015 , H01L2224/05016 , H01L2224/05553 , H01L2224/05556 , H01L2224/05571 , H01L2224/05573 , H01L2224/0558 , H01L2224/05644 , H01L2224/05655 , H01L2224/05664 , H01L2224/06135 , H01L2224/06155 , H01L2224/06183 , H01L2224/08054 , H01L2224/08056 , H01L2224/08057 , H01L2224/08121 , H01L2224/08137 , H01L2224/08225 , H01L2224/09135 , H01L2224/09183 , H01L2224/1134 , H01L2224/131 , H01L2224/16137 , H01L2224/48137 , H01L2224/80201 , H01L2224/80895 , H01L2224/81203 , H01L2224/94 , H01L2924/00014 , H01L2924/1434 , H01L2224/03 , H01L2924/014 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
Abstract: An apparatus comprises a first integrated circuit (IC) die that includes a top layer, a bottom surface, a sidewall surface extending from a top surface of the top layer to the bottom surface, and at least one multi-surface contact pad, a second IC die including a top layer, a bottom surface, a sidewall surface extending from a top surface of the top layer to the bottom surface, and at least one multi-surface contact pad, wherein the second IC die is arranged adjacent to the first IC die, and includes an electrically conductive bond in contact with at least one of the top surface or the side surface of the multi-surface contact pad of the first IC die and the top surface of the multi-surface contact pad of the second IC die.
Abstract translation: 一种装置包括第一集成电路（IC）芯片，其包括顶层，底表面，从顶层的顶表面延伸到底表面的侧壁表面，以及至少一个多表面接触垫，第二 IC芯片包括顶层，底面，从顶层的顶表面延伸到底表面的侧壁表面，以及至少一个多表面接触焊盘，其中第二IC管芯被布置为与第一IC 并且包括与第一IC管芯的多表面接触焊盘的顶表面或侧表面中的至少一个与第二IC管芯的多表面接触焊盘的顶表面接触的导电接合 。
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公开(公告)号：US20240112966A1
公开(公告)日：2024-04-04
申请号：US18478837
申请日：2023-09-29
Applicant: Azimuth Industrial Company, Inc.
Inventor： David Lee
CPC classification number: H01L23/13 , H01L24/08 , H01L24/09 , H01L24/16 , H01L24/81 , H01L2224/08238 , H01L2224/09181 , H01L2224/09183 , H01L2224/16168 , H01L2224/16227 , H01L2224/16238 , H01L2224/80895 , H01L2224/81191 , H01L2924/15153
Abstract: Implementations generally relate to a multisided integrated circuit assembly. In some implementations, an assembly includes an integrated circuit (IC) chip having IC contact terminals. The assembly further includes surface interfaces coupled to the IC chip, where at least one first surface interface and at least one second surface interface of the surface interfaces are configured to couple to a motherboard. The assembly further includes surface contact terminals on the surface interfaces, where the surface contact terminals couple to the IC contact terminals, and where at least one subset of the surface contact terminals also couples to at least one subset of motherboard contact terminals on the motherboard.
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公开(公告)号：US09209143B2
公开(公告)日：2015-12-08
申请号：US14038248
申请日：2013-09-26
Applicant: Intel IP Corporation
Inventor： Georg Seidemann , Sven Albers , Teodora Ossiander , Michael Skinner , Hans-Joachim Barth , Harald Gossner , Reinhard Mahnkopf , Christian Mueller , Wolfgang Molzer
CPC classification number: H01L24/09 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/08 , H01L24/13 , H01L24/16 , H01L24/48 , H01L24/80 , H01L24/81 , H01L25/0655 , H01L25/50 , H01L2224/03444 , H01L2224/0346 , H01L2224/03602 , H01L2224/0401 , H01L2224/04042 , H01L2224/05009 , H01L2224/05013 , H01L2224/05014 , H01L2224/05015 , H01L2224/05016 , H01L2224/05553 , H01L2224/05556 , H01L2224/05571 , H01L2224/05573 , H01L2224/0558 , H01L2224/05644 , H01L2224/05655 , H01L2224/05664 , H01L2224/06135 , H01L2224/06155 , H01L2224/06183 , H01L2224/08054 , H01L2224/08056 , H01L2224/08057 , H01L2224/08121 , H01L2224/08137 , H01L2224/08225 , H01L2224/09135 , H01L2224/09183 , H01L2224/1134 , H01L2224/131 , H01L2224/16137 , H01L2224/48137 , H01L2224/80201 , H01L2224/80895 , H01L2224/81203 , H01L2224/94 , H01L2924/00014 , H01L2924/1434 , H01L2224/03 , H01L2924/014 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
Abstract: An apparatus comprises a first integrated circuit (IC) die that includes a top layer, a bottom surface, a sidewall surface extending from a top surface of the top layer to the bottom surface, and at least one multi-surface contact pad, a second IC die including a top layer, a bottom surface, a sidewall surface extending from a top surface of the top layer to the bottom surface, and at least one multi-surface contact pad, wherein the second IC die is arranged adjacent to the first IC die, and includes an electrically conductive bond in contact with at least one of the top surface or the side surface of the multi-surface contact pad of the first IC die and the top surface of the multi-surface contact pad of the second IC die.
Abstract translation: 一种装置包括第一集成电路（IC）芯片，其包括顶层，底表面，从顶层的顶表面延伸到底表面的侧壁表面，以及至少一个多表面接触垫，第二 IC芯片包括顶层，底面，从顶层的顶表面延伸到底表面的侧壁表面，以及至少一个多表面接触焊盘，其中第二IC管芯被布置为与第一IC 并且包括与第一IC管芯的多表面接触焊盘的顶表面或侧表面中的至少一个与第二IC管芯的多表面接触焊盘的顶表面接触的导电接合 。
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公开(公告)号：US09287238B2
公开(公告)日：2016-03-15
申请号：US14094207
申请日：2013-12-02
Applicant: Infineon Technologies AG
Inventor： Soon Lock Goh , Swee Kah Lee
IPC: H01L23/00 , H01L23/495 , H01L23/31 , H01L21/56 , H01L21/48
CPC classification number: H01L24/97 , H01L21/4832 , H01L21/4842 , H01L21/561 , H01L23/3107 , H01L23/49513 , H01L23/49541 , H01L23/49582 , H01L24/03 , H01L24/09 , H01L24/48 , H01L24/83 , H01L24/85 , H01L2224/02215 , H01L2224/03019 , H01L2224/03464 , H01L2224/09183 , H01L2224/095 , H01L2224/40245 , H01L2224/48247 , H01L2224/83439 , H01L2224/83801 , H01L2224/84439 , H01L2224/97 , H01L2924/00014 , H01L2924/01028 , H01L2924/01046 , H01L2924/01047 , H01L2924/01079 , H01L2924/01103 , H01L2924/0133 , H01L2924/12042 , H01L2924/181 , H01L2924/37 , H01L2924/00 , H01L2224/45099 , H01L2224/37099 , H01L2224/83 , H01L2224/85 , H01L2924/00012
Abstract: A semiconductor package includes a plurality of bond pads having a first side and a second side opposing the first side, a coating covering the first side of the bond pads, semiconductor dies and electrical conductors attached to the second side of the bond pads, and a molding compound encasing the semiconductor dies and the electrical conductors at the second side of the bonds pads. The molding compound has a first side through which the bond pads protrude and a second side opposing the first side, the first side of the molding compound having a planar surface between adjacent ones of the bond pads. The package further includes a material plated on exposed sidewalls of the bonds pads uncovered by the molding compound and which is detectable by optical inspection. A corresponding method of manufacture is also provided.
Abstract translation: 半导体封装包括多个接合焊盘，其具有与第一侧相对的第一侧和第二侧，覆盖接合焊盘的第一侧的涂层，连接到接合焊盘的第二侧的半导体管芯和电导体，以及 封装半导体管芯的模制化合物和在键合焊盘的第二侧的电导体。 模塑料具有接合焊盘突出的第一侧和与第一侧相对的第二侧，模制化合物的第一侧在相邻的焊盘之间具有平坦表面。 该包装还包括镀在未被模制化合物覆盖的粘合垫的暴露的侧壁上的材料，并且其可通过光学检查来检测。 还提供了相应的制造方法。
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公开(公告)号：US20150155229A1
公开(公告)日：2015-06-04
申请号：US14094207
申请日：2013-12-02
Applicant: Infineon Technologies AG
Inventor： Soon Lock Goh , Swee Kah Lee
IPC: H01L23/498 , H01L23/00 , H01L21/56 , H01L21/48 , H01L23/495
CPC classification number: H01L24/97 , H01L21/4832 , H01L21/4842 , H01L21/561 , H01L23/3107 , H01L23/49513 , H01L23/49541 , H01L23/49582 , H01L24/03 , H01L24/09 , H01L24/48 , H01L24/83 , H01L24/85 , H01L2224/02215 , H01L2224/03019 , H01L2224/03464 , H01L2224/09183 , H01L2224/095 , H01L2224/40245 , H01L2224/48247 , H01L2224/83439 , H01L2224/83801 , H01L2224/84439 , H01L2224/97 , H01L2924/00014 , H01L2924/01028 , H01L2924/01046 , H01L2924/01047 , H01L2924/01079 , H01L2924/01103 , H01L2924/0133 , H01L2924/12042 , H01L2924/181 , H01L2924/37 , H01L2924/00 , H01L2224/45099 , H01L2224/37099 , H01L2224/83 , H01L2224/85 , H01L2924/00012
Abstract: A semiconductor package includes a plurality of bond pads having a first side and a second side opposing the first side, a coating covering the first side of the bond pads, semiconductor dies and electrical conductors attached to the second side of the bond pads, and a molding compound encasing the semiconductor dies and the electrical conductors at the second side of the bonds pads. The molding compound has a first side through which the bond pads protrude and a second side opposing the first side, the first side of the molding compound having a planar surface between adjacent ones of the bond pads. The package further includes a material plated on exposed sidewalls of the bonds pads uncovered by the molding compound and which is detectable by optical inspection. A corresponding method of manufacture is also provided.
Abstract translation: 半导体封装包括多个接合焊盘，其具有与第一侧相对的第一侧和第二侧，覆盖接合焊盘的第一侧的涂层，连接到接合焊盘的第二侧的半导体管芯和电导体，以及 封装半导体管芯的模制化合物和在键合焊盘的第二侧的电导体。 模塑料具有接合焊盘突出的第一侧和与第一侧相对的第二侧，模制化合物的第一侧在相邻的焊盘之间具有平坦表面。 该包装还包括镀在未被模制化合物覆盖的粘合垫的暴露的侧壁上的材料，并且其可通过光学检查来检测。 还提供了相应的制造方法。
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