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公开(公告)号：US10608335B2
公开(公告)日：2020-03-31
申请号：US15820476
申请日：2017-11-22
IPC分类号： H01Q3/24 , H01Q3/34 , H01P1/18 , H01Q3/36 , H01P5/04 , H01Q21/24 , H04B1/00 , H04B1/48 , H01Q25/00 , H04B1/44 , H03H11/24 , H03H7/18
摘要： An apparatus includes first and second electronically tunable transmission lines configured to receive a signal pair and provide a selected phase delay difference to the signal pair, a first shunting element connected to the first electronically tunable transmission line and a second shunting element connected to the second electronically tunable transmission line. The first and second shunting elements may each be configured to selectively shunt the electronically tunable transmission line to which they are connected according to one or more shunting control signals. A corresponding method is also disclosed herein.
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公开(公告)号：US08859300B2
公开(公告)日：2014-10-14
申请号：US13738367
申请日：2013-01-10
发明人： Hanyi Ding , Wayne H. Woods, Jr.
IPC分类号： H01L23/00 , H01L49/02 , G06F17/50 , H01L23/522 , H01L27/08
CPC分类号： H01L28/10 , G06F17/5068 , G06F17/5077 , H01L21/31053 , H01L21/76808 , H01L21/76826 , H01L23/5223 , H01L23/5227 , H01L27/08 , H01L29/432 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： A set of metal line structures including a signal transmission metal line and a capacitively-grounded inductively-signal-coupled metal line is embedded in a dielectric material layer. A capacitor is serially connected between the capacitively-grounded inductively-signal-coupled metal line and a local electrical ground, which may be on the input side or on the output side. The set of metal line structures and the capacitor collective provide a frequency dependent inductor. The Q factor of the frequency dependent inductor has multiple peaks that enable the operation of the frequency dependent inductor at multiple frequencies. Multiple capacitively-grounded inductively-signal-coupled metal lines may be provided in the frequency-dependent inductor, each of which is connected to the local electrical ground through a capacitor. By selecting different capacitance values for the capacitors, multiple values of the Q-factor may be obtained in the frequency dependent inductor at different signal frequencies.
摘要翻译： 包括信号传输金属线和电容接地感应信号耦合金属线的一组金属线结构被嵌入在电介质材料层中。 电容器串联连接在电容接地的感应信号耦合金属线路和可能在输入侧或输出侧的局部电接地之间。 金属线结构和电容集合提供了一个频率相关的电感。 频率依赖电感器的Q因子具有多个峰值，使得能够在多个频率下操作频率相关的电感器。 可以在频率相关电感器中提供多个电容耦合的感应信号耦合金属线路，每个电路通过电容器连接到本地电接地。 通过选择电容器的不同电容值，可以在不同信号频率的频率相关电感器中获得Q因子的多个值。
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公开(公告)号：US10680581B2
公开(公告)日：2020-06-09
申请号：US15820480
申请日：2017-11-22
摘要： An apparatus includes first and second electronically tunable transmission lines configured to transmit or receive a signal pair and provide a selected phase delay difference to the signal pair corresponding to a selected polarization, a first attenuation element connected to the first electronically tunable transmission line and a second attenuation element connected to the second electronically tunable transmission line. The first and second attenuation elements may each be configured to selectively attenuate signals carried on the electronically tunable transmission line to which they are connected according to a selected attenuation setting of a plurality of selectable attenuation settings provided by one or more attenuation control signals and thereby provide a selected attenuation to the signal pair that corresponds to the selected polarization. A corresponding method is also disclosed herein.
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公开(公告)号：US09595936B2
公开(公告)日：2017-03-14
申请号：US14285067
申请日：2014-05-22
摘要： A reconfigurable bandstop filter and methods of designing and reconfiguring the bandstop filter are disclosed. The reconfigurable bandstop filter includes a plurality of transmission lines each including a phase shifter. The reconfigurable bandstop filter further includes a signal input port having a phase shifter and a signal output port having a phase shifter. The signal input port and the signal output port is coupled to the plurality of transmission lines.
摘要翻译： 公开了一种可重构带阻滤波器以及设计和重新配置带阻滤波器的方法。 可重构带阻滤波器包括多个传输线，每条传输线包括移相器。 可重构带阻滤波器还包括具有移相器的信号输入端口和具有移相器的信号输出端口。 信号输入端口和信号输出端口耦合到多条传输线路。
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公开(公告)号：US09461612B2
公开(公告)日：2016-10-04
申请号：US14285145
申请日：2014-05-22
摘要： A reconfigurable rat race coupler and methods of designing and reconfiguring the rat race coupler are disclosed. The reconfigurable rat race coupler, includes a plurality of transmission lines. The plurality of transmission lines include: a first transmission line and a second transmission line each of which comprise a phase shifter; and a third transmission line and a fourth transmission line each of which comprise phase shifters. A signal input on port 1 is provided between the phase shifters on the third transmission line, which is split between ports 2 and 3, with port 4 being isolated and port 2 being between the phase shifters on the fourth transmission line.
摘要翻译： 公开了一种可重构的大鼠赛跑耦合器以及设计和重新配置大鼠赛跑耦合器的方法。 可重构的大鼠赛跑耦合器包括多条传输线。 多个传输线包括：第一传输线和第二传输线，每个传输线包括移相器; 以及包括移相器的第三传输线和第四传输线。 端口1上的信号输入设置在端口2和3之间的第三传输线上的移相器之间，端口4被隔离，端口2位于第四传输线上的移相器之间。
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6.发明授权Millimeter wave wafer level chip scale packaging (WLCSP) device and related method 有权毫米波晶片级芯片级封装（WLCSP）器件及相关方法公开(公告)号：US09159692B2
公开(公告)日：2015-10-13
申请号：US14519590
申请日：2014-10-21
发明人： Hanyi Ding , Richard S. Graf , Gary R. Hill , Wayne H. Woods, Jr.
IPC分类号： H01L23/492 , H01L23/00 , H01L23/498 , H01L23/522 , H01L23/66 , H01L21/66 , H01L23/31
CPC分类号： H01L24/17 , H01L22/12 , H01L22/14 , H01L23/3114 , H01L23/49811 , H01L23/49816 , H01L23/49838 , H01L23/5225 , H01L23/66 , H01L24/09 , H01L2224/0401 , H01L2224/16055 , H01L2224/16225 , H01L2224/16227 , H01L2224/1713 , H01L2924/0002 , H01L2924/1532 , H01L2924/2076 , H01L2924/00
摘要： Various embodiments include wafer level chip scale package (WLCSP) structures and methods of tuning such structures. In some embodiments, the WLCSP structure includes: a printed circuit board (PCB) trace connection including at least one PCB ground connection connected with a PCB ground plane; a set of ground solder balls each contacting the printed circuit board trace connection; a set of chip pads contacting each of the ground solder balls in the set of ground solder balls; a chip ground plane connecting the set of chip pads; and a signal interconnect interposed between two of the set of ground solder balls, the signal interconnect including: a signal trace connection electrically isolated from the PCB ground plane; a signal ball contacting the signal PCB trace connection; a chip pad contacting the signal ball, and a signal trace connection on a chip contacting the chip pad.
摘要翻译： 各种实施例包括晶片级芯片级封装（WLCSP）结构和调谐这种结构的方法。 在一些实施例中，WLCSP结构包括：印刷电路板（PCB）迹线连接，其包括与PCB接地平面连接的至少一个PCB接地连接; 一组接地焊球，每个接触印刷电路板跟踪连接; 与所述一组接地焊球中的所述接地焊球接触的一组芯片焊盘; 连接该组芯片焊盘的芯片接地平面; 以及插入在所述一组接地焊球中的两个之间的信号互连，所述信号互连包括：与所述PCB接地平面电隔离的信号迹线连接; 信号球接触信号PCB跟踪连接; 接触信号球的芯片焊盘和与芯片焊盘接触的芯片上的信号迹线连接。
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7.发明授权High performance on-chip vertical coaxial cable, method of manufacture and design structure 有权高性能片上垂直同轴电缆，制造方法和设计结构公开(公告)号：US09054157B2
公开(公告)日：2015-06-09
申请号：US14076656
申请日：2013-11-11
发明人： Essam Mina , Guoan Wang , Wayne H. Woods, Jr.
IPC分类号： H01L21/768 , H01L23/498 , G06F17/50
CPC分类号： H01L21/768 , G06F17/505 , H01L23/49827 , H01L2924/0002 , Y10T29/49123 , H01L2924/00
摘要： A high performance on-chip vertical coaxial cable structure, method of manufacturing and design structure thereof is provided. The coaxial cable structure includes an inner conductor and an insulating material that coaxially surrounds the inner conductor. The structure further includes an outer conductor which surrounds the insulating material. Both the inner and outer conductors comprise a plurality of metal layers formed on different wiring levels and interconnected between the different wiring levels by conductors. The coaxial cable structure is formed upon a surface of a semiconductor substrate and is oriented in substantially perpendicular alignment with the surface.
摘要翻译： 提供了一种高性能的片上垂直同轴电缆结构，其制造方法和设计结构。 同轴电缆结构包括同轴地围绕内导体的内导体和绝缘材料。 该结构还包括围绕绝缘材料的外导体。 内导体和外导体都包括形成在不同布线层上的多个金属层，并且通过导体在不同布线层之间互连。 同轴电缆结构形成在半导体衬底的表面上并且与表面基本上垂直对齐。
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公开(公告)号：US10284402B2
公开(公告)日：2019-05-07
申请号：US15996611
申请日：2018-06-04
IPC分类号： H04L27/22
摘要： An apparatus for decoding a data modulated signal includes a signal receiver that receives a data modulated signal that is encoded with phase-shift keying (PSK) and provides an amplified signal corresponding to the data modulated signal, a tunable phase shifter that receives a local reference signal and a selected phase shift, applies the selected phase shift to the local reference signal to produce a phase shifted reference signal, a summing unit that sums the amplified signal and the phase shifted reference signal to produce a summed signal, an amplitude detector that determines an amplitude of the summed signal, and a symbol detector that varies the selected phase shift and determines a current symbol within the data modulated signal based on the amplitude of the summed signal as the selected phase shift is varied. A corresponding method is also disclosed herein.
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公开(公告)号：US09800434B2
公开(公告)日：2017-10-24
申请号：US13867433
申请日：2013-04-22
CPC分类号： H04L25/0278 , G06F17/50 , H01P1/182 , H01P1/184 , H01R43/00 , H03K17/687 , H04L25/0272
摘要： Tunable phase shifters and methods for using the same include a signal line; one or more grounding lines; one or more crossing lines below the signal line in proximity to the signal line and substantially perpendicular to a longitudinal direction of the signal line, where the crossing lines conform to the shape of the signal line along at least three surfaces of the signal line and where the crossing lines have a tunable capacitance; and an inductance return line below the crossing lines substantially parallel to the longitudinal direction of the signal line, where the inductance return line provides a tunable inductance.
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10.发明授权Method, structure, and design structure for a through-silicon-via Wilkinson power divider 有权通过硅片通过威尔金森功率分配器的方法，结构和设计结构公开(公告)号：US09171121B2
公开(公告)日：2015-10-27
申请号：US13763136
申请日：2013-02-08
发明人： Hanyi Ding , Alvin J. Joseph , Wayne H. Woods, Jr.
CPC分类号： G06F17/5077 , H01L23/481 , H01L2924/0002 , H01L2924/3011 , H01P5/16 , H01P11/007 , H01L2924/00
摘要： A method, structure, and design structure for a through-silicon-via Wilkinson power divider. A method includes: forming an input on a first side of a substrate; forming a first leg comprising a first through-silicon-via formed in the substrate, wherein the first leg electrically connects the input and a first output; forming a second leg comprising a second through-silicon-via formed in the substrate, wherein the second leg electrically connects the input and a second output, and forming a resistor electrically connected between the first output and the second output.
摘要翻译： 一种通过硅通孔威尔金森功率分配器的方法，结构和设计结构。 一种方法包括：在基板的第一侧上形成输入; 形成包括在所述基板中形成的第一穿通硅通孔的第一支脚，其中所述第一支路电连接所述输入端和第一输出端; 形成包括形成在所述基板中的第二通硅通孔的第二支脚，其中所述第二支脚电连接所述输入端和第二输出端，以及形成电连接在所述第一输出端和所述第二输出端之间的电阻器。
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