摘要:
Methods of forming devices include forming a first electrically insulating layer having a metal interconnection therein, on a substrate and then forming a first electrically insulating barrier layer on an upper surface of the metal interconnection and on the first electrically insulating layer. The first electrically insulating barrier layer is exposed to a plasma that penetrates the first electrically insulating barrier and removes oxygen from an upper surface of the metal interconnection. The barrier layer may have a thickness in a range from about 5 Å to about 50 Å and the plasma may be a hydrogen-containing plasma that converts oxygen on the upper surface of the metal interconnection to water.
摘要:
Methods of forming integrated circuit device having electrical interconnects include forming an electrically insulating layer on a substrate and forming a hard mask on the electrically insulating layer. The hard mask and the electrically insulating layer are selectively etched in sequence using a mask to define an opening therein. This opening, which may be a via hole, exposes inner sidewalls of the hard mask and the electrically insulating layer. The inner sidewall of the hard mask is then recessed relative to the inner sidewall of the electrically insulating layer and a sacrificial reaction layer is formed on the inner sidewall of the electrically insulating layer. This reaction layer operates to recess the inner sidewall of the electrically insulating layer. The reaction layer is then removed to define a wider opening having relatively uniform sidewalls. This wider opening is then filled with an electrical interconnect.
摘要:
Methods of forming integrated circuit device having electrical interconnects include forming an electrically insulating layer on a substrate and forming a hard mask on the electrically insulating layer. The hard mask and the electrically insulating layer are selectively etched in sequence using a mask to define an opening therein. This opening, which may be a via hole, exposes inner sidewalls of the hard mask and the electrically insulating layer. The inner sidewall of the hard mask is then recessed relative to the inner sidewall of the electrically insulating layer and a sacrificial reaction layer is formed on the inner sidewall of the electrically insulating layer. This reaction layer operates to recess the inner sidewall of the electrically insulating layer. The reaction layer is then removed to define a wider opening having relatively uniform sidewalls. This wider opening is then filled with an electrical interconnect.
摘要:
Provided is a method of manufacturing a semiconductor device. The method employs multi-step removal on a plurality of different porogens included in a low dielectric layer both before and after metal lines are formed, thereby facilitating formation of an ultra low dielectric constant layer which is used as an insulation layer between metal lines of a semiconductor device. The method may include forming an interlayer dielectric layer on a substrate, forming a plurality of porogens in the interlayer dielectric layer, removing a portion of the plurality of porogens in the interlayer dielectric layer to form a plurality of first pores in the interlayer dielectric layer, forming a wiring pattern where the plurality of first pores are formed, and removing the remaining porogens of the plurality of porogens to form a plurality of second pores in the interlayer dielectric layer.
摘要:
Methods of fabricating dual damascene interconnections suitable for use in microelectronic devices and similar applications using a diffusion barrier layer to protect against base materials during processing are provided. The methods include the steps of: filling a via with a hydrogen silsesquioxane (HSQ)-based filler as expressed by the general chemical formula: (RSiO3/2)x(HSiO3/2)y, wherein x and y satisfy the relationships x+y=1 and 0
摘要翻译:提供了适用于微电子器件的双镶嵌互连的方法和使用扩散阻挡层在加工期间防止基底材料的类似应用。 所述方法包括以下步骤:用以通式(RSiO 3/2/2)x(HSiO 3/2/2)表示的氢倍半硅氧烷(HSQ))填充通孔 y,其中x和y满足关系x + y = 1和0
摘要:
A method of forming an interconnection line in a semiconductor device is provided. A first etching stopper is formed on a lower conductive layer which is formed on a semiconductor substrate. A first interlayer insulating layer is formed on the first etching stopper. A second etching stopper is formed on the first interlayer insulating layer. A second interlayer insulating layer is formed on the second etching stopper. The second interlayer insulating layer, the second etching stopper, and the first interlayer insulating layer are sequentially etched using the first etching stopper as an etching stopping point to form a via hole aligned with the lower conductive layer. A protective layer is formed to protect a portion of the first etching stopper exposed at the bottom of the via hole. A portion of the second interlayer insulating layer adjacent to the via hole is etched using the second etching stopper as an etching stopping point to form a trench connected to the via hole. The protective layer is removed. The portion of the first etching stopper positioned at the bottom of the via hole is removed. An upper conductive layer that fills the via hole and the trench and is electrically connected to the lower conductive layer is formed.
摘要:
A method and apparatus for displaying received data using a separate device that makes a user's receiving terminal, that has received only a unique code of data, transmit the unique code to a separate display device connected to the Internet, and which makes the display device access a server, in which the data is stored, and display the data corresponding to the unique code. The apparatus displays received data using a code generation unit for generating a first unique code that matches metadata received from a data server that stores the data and the metadata, a first communication unit for transmitting the first unique code to a receiving terminal, and a second communication unit for receiving a second unique code from a display device and transmitting the stored metadata that matches the first unique code to the display device if the first unique code corresponds to the second unique code.
摘要:
There is disclosed an azetidinone compound of the formula (I): wherein R is hydrogen, or a hydroxy protecting group, R1 and R2 are each independently alkyl of 1-15 carbon atoms, benzyl or cyclized together with the carbon atom to which they are attached to form a 5 or 6-membered cyclic hydrocarbon or a heterocyclic radical having one or two hetero ring atoms, said hetero ring atoms being selected from the group consisting of O and S; R3 is lower alkyl or —COO(lower alkyl) R4 is phenyl, or phenyl substituted with halogen, lower alkoxy or nitro which is useful as a synthetic intermediate to the 1′β-methylcarbapenem-type antibacterial agent.
摘要:
A method and apparatus for displaying received data using a separate device that makes a user's receiving terminal, that has received only a unique code of data, transmit the unique code to a separate display device connected to the Internet, and which makes the display device access a server, in which the data is stored, and display the data corresponding to the unique code. The apparatus displays received data using a code generation unit for generating a first unique code that matches metadata received from a data server that stores the data and the metadata, a first communication unit for transmitting the first unique code to a receiving terminal, and a second communication unit for receiving a second unique code from a display device and transmitting the stored metadata that matches the first unique code to the display device if the first unique code corresponds to the second unique code.
摘要:
Methods of fabricating dual damascene interconnections suitable for use in microelectronic devices and similar applications using a diffusion barrier layer to protect against base materials during processing are provided. The methods include the steps of: filling a via with a hydrogen silsesquioxane (HSQ)-based filler as expressed by the general chemical formula: (RSiO3/2)x(HSiO3/2)y, wherein x and y satisfy the relationships x+y=1 and 0
摘要翻译:提供了适用于微电子器件的双镶嵌互连的方法和使用扩散阻挡层在加工期间防止基底材料的类似应用。 所述方法包括以下步骤:用以通式(RSiO 3/2/2)x(HSiO 3/2/2)表示的氢倍半硅氧烷(HSQ))填料填充通孔 y,其中x和y满足关系x + y = 1和0