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    CAP FOR A MICROELECTROMECHANICAL SYSTEM DEVICE WITH ELECTROMAGNETIC SHIELDING, AND METHOD OF MANUFACTURE
    3.
    发明申请
    CAP FOR A MICROELECTROMECHANICAL SYSTEM DEVICE WITH ELECTROMAGNETIC SHIELDING, AND METHOD OF MANUFACTURE 有权
    具有电磁屏蔽的微电子电子系统装置的封装及其制造方法

    公开(公告)号：US20130322039A1

    公开(公告)日：2013-12-05

    申请号：US13485631

    申请日：2012-05-31

    申请人： Jerome Teysseyre ,  Glenn de los Reyes ,  Wee Chin Judy Lim

    发明人： Jerome Teysseyre ,  Glenn de los Reyes ,  Wee Chin Judy Lim

    IPC分类号： H05K5/02 ,  B05D5/12 ,  B32B37/10 ,  H05K9/00 ,  B32B37/02

    CPC分类号： H05K9/003

    摘要： A cap for a microelectromechanical system device includes a first layer of, e.g., Bismaleimide Triazine (BT) resin material in which a through-aperture is formed, laminated to a second layer of BT resin material that closes the aperture in the first layer, forming a cavity. The first and second layers are laminated with a thermosetting adhesive that is sufficiently thick to encapsulate particles that may remain from a routing operation for forming the apertures. The interior of the cavity, including exposed portions of the adhesive, and the exposed face of the first layer are coated with an electrically conductive paint. The cap is adhered to a substrate over the MEMS device using an electrically conductive adhesive, which couples the conductive paint layer to a ground plane of the substrate. The layer of conductive paint serves as a shield to prevent or reduce electromagnetic interference acting on the MEMS device.

    摘要翻译： 用于微机电系统装置的盖子包括第一层，例如其中形成有通孔的双马来酰亚胺三嗪（BT）树脂材料，层压到封闭第一层中的孔的第二层BT树脂材料上，形成 一个空腔。 第一层和第二层与热固性粘合剂层压，该热固性粘合剂足够厚以封装可以从用于形成孔的路由操作保留的颗粒。 空腔的内部，包括粘合剂的暴露部分和第一层的暴露表面涂覆有导电涂料。 使用导电粘合剂将盖子粘附到MEMS装置上的基板上，导电粘合剂将导电涂料层耦合到基板的接地平面。 导电涂料层用作屏蔽，以防止或减少作用在MEMS器件上的电磁干扰。

    Process for fabricating a semiconductor component and semiconductor component
    5.
    发明申请
    Process for fabricating a semiconductor component and semiconductor component 有权
    用于制造半导体部件和半导体部件的工艺

    公开(公告)号：US20050026417A1

    公开(公告)日：2005-02-03

    申请号：US10867382

    申请日：2004-06-14

    申请人： Jerome Teysseyre

    发明人： Jerome Teysseyre

    IPC分类号： H01L21/56 ,  H01L23/31 ,  H01L21/48

    CPC分类号： H01L23/3114 ,  H01L21/563 ,  H01L24/97 ,  H01L2224/16 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/97 ,  H01L2924/12043 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/19041 ,  H01L2224/83 ,  H01L2224/81 ,  H01L2924/00

    摘要： Process for fabricating semiconductor components, and semiconductor component, in which a support plate comprises, at various locations, portions provided with respective electrical connection means having electrical connection regions on a front face and having through-holes located in proximity or adjacently to the portions. An integrated-circuit chip is fastened to the front face of each portion of the support plate by means of electrical connection balls. On one side, the electrical connection balls are connected to electrical connection regions of the front face of this plate and, on the other side, to electrical connection pads on the rear face of this integrated-circuit chip, in positions such that one edge of the rear face of each integrated-circuit chip faces at least one through-hole. A curable liquid fill material is delivered in the through-holes so as to at least partly fills a space defined between this support plate and each integrated-circuit chip, respectively.

    摘要翻译： 用于制造半导体部件的工艺和半导体部件，其中支撑板在各个位置处包括设置有在前表面上具有电连接区域并且具有位于所述部分附近或相邻的通孔的各个电连接装置的部分。 集成电路芯片通过电连接球紧固到支撑板的每个部分的前表面。 在一侧，电连接球连接到该板的正面的电连接区域，另一侧连接到该集成电路芯片的背面上的电连接焊盘， 每个集成电路芯片的后表面面向至少一个通孔。 可固化液体填充材料在通孔中被输送，以分别至少部分地填充在该支撑板和每个集成电路芯片之间限定的空间。

    Top gate mold with particle trap
    6.
    发明授权
    Top gate mold with particle trap 有权
    顶门模具带有颗粒捕集器

    公开(公告)号：US09254596B2

    公开(公告)日：2016-02-09

    申请号：US13340319

    申请日：2011-12-29

    申请人： Jerome Teysseyre ,  Glenn de los Reyes

    发明人： Jerome Teysseyre ,  Glenn de los Reyes

    IPC分类号： B29C45/24 ,  B29C45/17 ,  B29C45/27

    CPC分类号： B29C45/17 ,  B29C45/1753 ,  B29C45/2701

    摘要： A top-gate molding system for encapsulating semiconductor devices includes a plurality of mold cavities formed between a middle plate and a bottom plate, and a runner system formed between an upper plate and the middle plate. The runner system includes a runner with a plurality of reservoirs along its length, with a gate extending from each of the reservoirs to one of the cavities. A particle trap is positioned on the bottom of the runner between a sprue and a first one of the reservoirs, to capture contaminating particles in a flow of molding compound before the particles enter any of the reservoirs. The particle trap can be, for example, a notch or a channel extending transversely across the bottom of the runner, or a dummy reservoir upstream of the first of the plurality of reservoirs.

    摘要翻译： 用于封装半导体器件的顶栅模制系统包括形成在中间板和底板之间的多个模腔，以及形成在上板和中板之间的浇道系统。 流道系统包括沿着其长度具有多个储存器的流道，门从每个储存器延伸到其中一个空腔。 颗粒捕集器位于浇道和第一储存器之间的流道底部，以在颗粒进入任何储存器之前捕获模制化合物流中的污染颗粒。 颗粒捕获器可以是例如横向延伸穿过流道的底部的凹口或通道，或者在多个储存器中的第一个的上游的虚拟储存器。

    TOP GATE MOLD WITH PARTICLE TRAP
    7.
    发明申请
    TOP GATE MOLD WITH PARTICLE TRAP 有权
    顶门模具与颗粒捕捉

    公开(公告)号：US20130168899A1

    公开(公告)日：2013-07-04

    申请号：US13340319

    申请日：2011-12-29

    申请人： Jerome Teysseyre ,  Glenn de los Reyes

    发明人： Jerome Teysseyre ,  Glenn de los Reyes

    IPC分类号： B29C45/24 ,  B29C45/26

    CPC分类号： B29C45/17 ,  B29C45/1753 ,  B29C45/2701

    摘要： A top-gate molding system for encapsulating semiconductor devices includes a plurality of mold cavities formed between a middle plate and a bottom plate, and a runner system formed between an upper plate and the middle plate. The runner system includes a runner with a plurality of reservoirs along its length, with a gate extending from each of the reservoirs to one of the cavities. A particle trap is positioned on the bottom of the runner between a sprue and a first one of the reservoirs, to capture contaminating particles in a flow of molding compound before the particles enter any of the reservoirs. The particle trap can be, for example, a notch or a channel extending transversely across the bottom of the runner, or a dummy reservoir upstream of the first of the plurality of reservoirs.

    摘要翻译： 用于封装半导体器件的顶栅模制系统包括形成在中间板和底板之间的多个模腔，以及形成在上板和中板之间的浇道系统。 流道系统包括沿着其长度具有多个储存器的流道，门从每个储存器延伸到其中一个空腔。 颗粒捕集器位于浇道和第一储存器之间的流道底部，以在颗粒进入任何储存器之前捕获模制化合物流中的污染颗粒。 颗粒捕获器可以是例如横向延伸穿过流道的底部的凹口或通道，或者在多个储存器中的第一个的上游的虚拟储存器。

    Cap for a microelectromechanical system device with electromagnetic shielding, and method of manufacture
    8.
    发明授权
    Cap for a microelectromechanical system device with electromagnetic shielding, and method of manufacture 有权
    用于具有电磁屏蔽的微机电系统装置及其制造方法

    公开(公告)号：US08987871B2

    公开(公告)日：2015-03-24

    申请号：US13485631

    申请日：2012-05-31

    申请人： Jerome Teysseyre ,  Glenn de los Reyes ,  Wee Chin Judy Lim

    发明人： Jerome Teysseyre ,  Glenn de los Reyes ,  Wee Chin Judy Lim

    IPC分类号： H01L23/60 ,  H05K9/00

    CPC分类号： H05K9/003

    摘要： A cap for a microelectromechanical system device includes a first layer of, e.g., Bismaleimide Triazine (BT) resin material in which a through-aperture is formed, laminated to a second layer of BT resin material that closes the aperture in the first layer, forming a cavity. The first and second layers are laminated with a thermosetting adhesive that is sufficiently thick to encapsulate particles that may remain from a routing operation for forming the apertures. The interior of the cavity, including exposed portions of the adhesive, and the exposed face of the first layer are coated with an electrically conductive paint. The cap is adhered to a substrate over the MEMS device using an electrically conductive adhesive, which couples the conductive paint layer to a ground plane of the substrate. The layer of conductive paint serves as a shield to prevent or reduce electromagnetic interference acting on the MEMS device.

    摘要翻译： 用于微机电系统装置的盖子包括第一层，例如其中形成有通孔的双马来酰亚胺三嗪（BT）树脂材料，层压到封闭第一层中的孔的第二层BT树脂材料上，形成 一个空腔。 第一层和第二层与热固性粘合剂层压，该热固性粘合剂足够厚以封装可以从用于形成孔的路由操作保留的颗粒。 空腔的内部，包括粘合剂的暴露部分和第一层的暴露表面涂覆有导电涂料。 使用导电粘合剂将盖子粘附到MEMS装置上的基板上，导电粘合剂将导电涂料层耦合到基板的接地平面。 导电涂料层用作屏蔽，以防止或减少作用在MEMS器件上的电磁干扰。