公开(公告)号：US5705224A

公开(公告)日：1998-01-06

申请号：US393821

申请日：1995-01-31

申请人： Junichi Murota ,  Shoichi Ono ,  Masao Sakuraba ,  Nobuo Mikoshiba ,  Harushige Kurokawa ,  Fumihide Ikeda

发明人： Junichi Murota ,  Shoichi Ono ,  Masao Sakuraba ,  Nobuo Mikoshiba ,  Harushige Kurokawa ,  Fumihide Ikeda

IPC分类号： C23C16/48 ,  C30B25/10 ,  C30B23/00 ,  C23C16/00

CPC分类号： C30B25/105 ,  C23C16/482 ,  C30B29/08

摘要： A vapor deposition apparatus and method in which pulse waveform light is applied to a sample sealed in a reaction chamber. The sample is exposed to gaseous material while the pulse waveform light is applied creating one or plural atomic layers. Alternate layers of plural substances or alternate multiple layers of plural substances can be formed by alternating the introduction of gaseous materials with the application of pulse waveform light.

摘要翻译： 一种气相沉积设备和方法，其中脉冲波形光被施加到密封在反应室中的样品。 样品暴露于气体材料，同时施加脉冲波形光产生一个或多个原子层。 可以通过施加脉冲波形光交替引入气态材料来形成多个物质的交替层或多个物质的交替多层。

公开(公告)号：US4503807A

公开(公告)日：1985-03-12

申请号：US614783

申请日：1984-05-29

申请人： Satoshi Nakayama ,  Hideaki Takeuchi ,  Junichi Murota ,  Tatuhiko Hurukado ,  Shigeru Takeda ,  Masuo Suzuki ,  Harushige Kurokawa ,  Humihide Ikeda

发明人： Satoshi Nakayama ,  Hideaki Takeuchi ,  Junichi Murota ,  Tatuhiko Hurukado ,  Shigeru Takeda ,  Masuo Suzuki ,  Harushige Kurokawa ,  Humihide Ikeda

IPC分类号： B65G49/07 ,  C23C16/455 ,  C23C16/54 ,  H01L21/205 ,  H01L21/31 ,  C23C13/10

CPC分类号： H01L21/02532 ,  C23C16/455 ,  C23C16/54 ,  H01L21/0262 ,  Y10S414/139 ,  Y10S414/141

摘要： A chemical vapor deposition apparatus has a reactor divided into a reaction space and a purging space by a susceptor for supporting a wafer and a loading chamber communicated through a gate with the reactor. Exhaust units are communicated with the reactor and loading chamber, respectively, so that the pressures in the reactor and loading chamber may be reduced. The susceptor has a plurality of recesses to aid placing or scooping the water. Through a transparent wall on the side of the purging space, the susceptor is heated by a lamp unit disposed outside the transparent wall. The loading chamber includes a wafer transport mechanism for charging a wafer into the reactor or discharging a processed wafer from the reactor. An unprocessed wafer is loaded to the loading chamber from a cassette and the processed wafer is unloaded to the cassette. One or a small number of wafers are processed at one time. A uniform film is deposited with a high reproducibility. The processing rate is high and the chemical vapor deposition apparatus is made compact in size.

摘要翻译： 化学气相沉积装置具有通过用于支撑晶片的基座分成反应空间和净化空间的反应器以及通过反应器与浇口连通的装载室。 排气单元分别与反应器和装载室连通，从而可以减少反应器和装载室中的压力。 基座具有多个凹槽以帮助放置或舀取水。 通过吹扫空间一侧的透明壁，基座被布置在透明壁外侧的灯单元加热。 装载室包括用于将晶片装入反应器或从反应器排出经处理的晶片的晶片传送机构。 未处理的晶片从盒装载到装载室，并且处理的晶片被卸载到盒中。 一次处理一个或少数晶圆。 以高重现性沉积均匀的膜。 处理速度高，化学气相沉积装置尺寸紧凑。

公开(公告)号：US06800544B2

公开(公告)日：2004-10-05

申请号：US10222777

申请日：2002-08-19

申请人： Junichi Murota ,  Yosuke Shimamune ,  Masao Sakuraba ,  Takashi Matsuura

发明人： Junichi Murota ,  Yosuke Shimamune ,  Masao Sakuraba ,  Takashi Matsuura

IPC分类号： H01L2128

CPC分类号： H01L21/02576 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/28525 ,  H01L21/28562 ,  H01L29/456

摘要： A metal-semiconductor junction comprising a wiring metal layer and a semiconductor layer. To reduce the contact resistance of the junction, a region doped with an n- or p-type impurity and having a high carrier concentration of 1021 cm−3 or more is provided in a near-surface part of the semiconductor layer (at a distance of 10 nm or less from the metal layer. The high-carrier concentration region is composed of n- or p-type impurity layers and IV-group semiconductor layers that have been alternately deposited upon another by means of, for example, vapor-phase growth.

摘要翻译： 一种包括布线金属层和半导体层的金属 - 半导体结。 为了降低结的接触电阻，在半导体的近表面部分提供掺杂有n型或p型杂质并且具有10,23或更大载流子浓度的区域 层（距离金属层10nm以下的距离），高载流子浓度区域由n或p型杂质层和IV族半导体层构成，这些层被交替地沉积在另一层上， 例如，气相生长。

公开(公告)号：US06621145B2

公开(公告)日：2003-09-16

申请号：US09866695

申请日：2001-05-30

申请人： Junichi Murota ,  Yosuke Shimamune ,  Masao Sakuraba ,  Takashi Matsuura

发明人： Junichi Murota ,  Yosuke Shimamune ,  Masao Sakuraba ,  Takashi Matsuura

IPC分类号： H01L29167

CPC分类号： H01L21/02576 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/28525 ,  H01L21/28562 ,  H01L29/456

摘要： A metal-semiconductor junction comprises a wiring metal layer and a semiconductor layer. To reduce the contact resistance of the junction, a region doped with an n- or p-type impurity and having a high carrier concentration of 1021 cm−3 or more is provided in a near-surface part of the semiconductor layer (at a distance of 10 nm or less from the metal layer. The high-carrier concentration region is composed of n- or p-type impurity layers and IV-group semiconductor layers that have been alternately deposited upon another by means of, for example, vapor-phase growth.

摘要翻译： 金属 - 半导体结包括布线金属层和半导体层。 为了降低结的接触电阻，在半导体层的近表面部分设置掺杂有n型或p型杂质且具有1021cm-3以上的高载流子浓度的区域 与金属层相比为10nm以下，高载流子浓度区域由n型或p型杂质层和IV族半导体层构成，这些层通过例如气相 成长。

公开(公告)号：US4074300A

公开(公告)日：1978-02-14

申请号：US657873

申请日：1976-02-13

申请人： Tetsushi Sakai ,  Yutaka Sakakibara ,  Junichi Murota ,  Tsutomu Wada

发明人： Tetsushi Sakai ,  Yutaka Sakakibara ,  Junichi Murota ,  Tsutomu Wada

IPC分类号： H01L21/28 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/336 ,  H01L29/423 ,  H01L29/78

CPC分类号： H01L29/6659 ,  H01L21/31111 ,  H01L21/32132 ,  H01L29/41783 ,  H01L29/42376 ,  H01L29/78 ,  Y10S148/122 ,  Y10S257/90

摘要： In an insulated gate type field effect transistor comprising spaced source and drain regions, an insulating film between the source and drain regions and a gate electrode mounted on the insulating film, an inverted frustum shaped polycrystalline semiconductor layer is formed on the insulating film and the gate electrode is mounted on the polycrystalline semiconductor layer.

公开(公告)号：US4146902A

公开(公告)日：1979-03-27

申请号：US917260

申请日：1978-06-20

申请人： Masafumi Tanimoto ,  Takashi Watanabe ,  Nobuaki Ieda ,  Junichi Murota

发明人： Masafumi Tanimoto ,  Takashi Watanabe ,  Nobuaki Ieda ,  Junichi Murota

IPC分类号： G11C17/00 ,  G11C11/35 ,  G11C17/12 ,  G11C17/16 ,  H01C7/10 ,  H01L21/02 ,  H01L21/3215 ,  H01L21/8246 ,  H01L23/525 ,  H01L27/24 ,  H01L29/68 ,  H01L45/00 ,  H01L49/02

CPC分类号： H01L27/11206 ,  G11C11/35 ,  G11C17/16 ,  H01C7/1013 ,  H01L21/3215 ,  H01L23/5252 ,  H01L27/2436 ,  H01L28/20 ,  H01L29/685 ,  H01L45/10 ,  H01L45/1233 ,  H01L45/148 ,  H01L45/1616 ,  H01L2924/0002

摘要： A semiconductor switching element comprised by a high resistivity polycrystalline silicon resistor whose resistance irreversibly decreases to a small value at a threshold voltage upon the voltage across the resistor reaching the threshold voltage. A semiconductor memory device is constituted by using the switching element as a memory cell and a semiconductor gate element for controlling the current flowing through the semiconductor switching element.

公开(公告)号：US06949474B2

公开(公告)日：2005-09-27

申请号：US10359127

申请日：2003-02-06

申请人： Atsushi Moriya ,  Yasuhiro Inokuchi ,  Yasuo Kunii ,  Junichi Murota

发明人： Atsushi Moriya ,  Yasuhiro Inokuchi ,  Yasuo Kunii ,  Junichi Murota

IPC分类号： C23C16/42 ,  C23C16/30 ,  C23C16/44 ,  C23C16/455 ,  C23C16/46 ,  C23C16/52 ,  C30B25/02 ,  C30B25/10 ,  C30B29/52 ,  H01L21/205 ,  H01L21/31

CPC分类号： C23C16/45523 ,  C23C16/30 ,  C23C16/46 ,  C23C16/52 ,  C30B25/02 ,  C30B25/10 ,  C30B29/52 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/0251 ,  H01L21/02532 ,  H01L21/0262

摘要： This invention makes it possible to make even films composed of at least silicon and germanium with gradient germanium ratio along a film thickness direction thereof for a short deposition time. A temperature controller 61 controls a heater 2 so that temperature of wafers W will be changed from low (e.g. 400° C.) to high (e.g. 700° C.) by alternately repeating temperature changing process to heat up the wafers W and temperature regulating process when temperature of the wafers W does not change as much as that of the temperature changing process for a specific amount of time. While a gas controller 62 provides a reactive gas into a reaction tube 1 during the temperature regulating process, it controls a valve 31 to stop it during the temperature changing process.

摘要翻译： 本发明使得可以在短的沉积时间内使其至少由硅和锗组成的平均膜沿其膜厚度方向具有梯度锗比。 温度控制器61控制加热器2，使得晶片W的温度将从低（例如400℃）变为高（例如700℃），通过交替重复温度变化过程以加热晶片W和温度调节 晶片W的温度在温度变化过程中的温度不变化一定时间的过程。 当气体控制器62在温度调节过程中向反应管1提供反应气体时，它控制阀31在温度变化过程中停止它。

公开(公告)号：US06770507B2

公开(公告)日：2004-08-03

申请号：US09926190

申请日：2001-09-20

申请人： Takao Abe ,  Takashi Matsuura ,  Junichi Murota

发明人： Takao Abe ,  Takashi Matsuura ,  Junichi Murota

IPC分类号： H01L2100

CPC分类号： H01L21/76243 ,  H01L21/76254

摘要： There is provided a novel bonded semiconductor wafer having a layered structure alternately stacked with semiconductor layers and insulator layers in two cycles or more and manufactured by means of a bonding process, wherein at least one of the insulator layers is formed with ion implanted oxygen, and a novel manufacturing process for a bonded semiconductor wafer in which an ion implantation separation process is adopted. The novel bonded semiconductor wafer is manufactured by means of a bonding process and has a layered structure alternately stacked with semiconductor layers and insulator layers in two cycles or more, wherein at least one of the insulator layers is formed with ion implanted oxygen.

摘要翻译： 提供了一种新颖的键合半导体晶片，其具有交替层叠的半导体层和绝缘体层的两层以上的层叠结构，并且通过接合工艺制造，其中至少一个绝缘体层由离子注入的氧形成，并且 用于其中采用离子注入分离工艺的接合半导体晶片的新颖制造方法。 新型键合半导体晶片通过接合工艺制造，并且具有在两个周期以上交替层叠的半导体层和绝缘体层的层叠结构，其中至少一个绝缘体层由离子注入的氧形成。

公开(公告)号：US4976815A

公开(公告)日：1990-12-11

申请号：US426208

申请日：1989-10-25

申请人： Yutaka Hiratsuka ,  Tadahiro Ohmi ,  Junichi Murota ,  Yoshio Fujisaki ,  Masato Noda ,  Yoshimitsu Kitada ,  Terutaka Sahara

发明人： Yutaka Hiratsuka ,  Tadahiro Ohmi ,  Junichi Murota ,  Yoshio Fujisaki ,  Masato Noda ,  Yoshimitsu Kitada ,  Terutaka Sahara

IPC分类号： B01L1/00 ,  H01L21/00 ,  H01L21/304 ,  H01L21/306

CPC分类号： H01L21/67023

摘要： A draft chamber is located within a clean room for sequentially immersing and processing carriers such as silicone wafers in a plurality of solution vessels provided in the draft chamber. In the draft chamber, a first air flow moves in a substantially horizontal direction from the front portion of the draft chamber toward the rear portion above the surfaces of solutions contained in chemical solution vessels which generate toxic gasses and a second air flow moves downward from the ceiling of the draft chamber. Thus, the toxic gasses generated from the chemical solution vessels are prevented from leaking into the clean room.

摘要翻译： 抽气室位于洁净室内，用于在设置在通风室中的多个溶液容器中顺序浸渍和处理诸如硅胶片的载体。 在通气室中，第一气流沿着大致水平的方向从引流室的前部朝向包含在产生有毒气体的化学溶液容器中的溶液表面上方的后部移动，并且第二气流从 起草室的天花板。 因此，防止从化学溶液容器产生的有毒气体泄漏到洁净室中。