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公开(公告)号:US08133532B2
公开(公告)日:2012-03-13
申请号:US12281820
申请日:2007-10-24
申请人: Kenny Chang , Patrick Loisy , Yvan Baudry
发明人: Kenny Chang , Patrick Loisy , Yvan Baudry
CPC分类号: C23C16/045 , C04B35/632 , C04B35/63424 , C04B35/6346 , C04B35/63488 , C04B35/65 , C04B35/83 , C04B2235/608 , C04B2235/614 , C04B2235/665 , C23C16/26
摘要: The present invention describes a method of CVI densification in which particular arrangements and mixtures of undensified porous substrates and partially densified porous substrates are arranged in particular ways in order to use the thermal characteristics of the partially densified porous substrates to better distribute heat throughout a CVI furnace and thereby improve densification.
摘要翻译: 本发明描述了一种CVI致密化方法,其中以特定方式布置未增稠多孔基材和部分致密多孔基材的特定布置和混合物,以便使用部分致密多孔基材的热特性以更好地在整个CVI炉中分配热量 从而改善致密化。
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公开(公告)号:US20090053413A1
公开(公告)日:2009-02-26
申请号:US12281820
申请日:2007-10-24
申请人: Kenny Chang , Patrick Loisy , Yvan Baudry
发明人: Kenny Chang , Patrick Loisy , Yvan Baudry
IPC分类号: C23C16/44
CPC分类号: C23C16/045 , C04B35/632 , C04B35/63424 , C04B35/6346 , C04B35/63488 , C04B35/65 , C04B35/83 , C04B2235/608 , C04B2235/614 , C04B2235/665 , C23C16/26
摘要: The present invention describes a method of CVI densification in which particular arrangements and mixtures of undensified porous substrates and partially densified porous substrates are arranged in particular ways in order to use the thermal characteristics of the partially densified porous substrates to better distribute heat throughout a CVI furnace and thereby improve densification.
摘要翻译: 本发明描述了一种CVI致密化方法,其中以特定方式布置未增稠多孔基材和部分致密多孔基材的特定布置和混合物,以便使用部分致密多孔基材的热特性以更好地在整个CVI炉中分配热量 从而改善致密化。
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公开(公告)号:US20060180085A1
公开(公告)日:2006-08-17
申请号:US10547688
申请日:2004-03-02
申请人: Kenny Chang
发明人: Kenny Chang
IPC分类号: C23C16/00
CPC分类号: C04B35/522 , C04B35/83 , C04B41/5059 , C04B41/87 , C04B2235/9623 , C23C16/045 , C23C16/4581 , C23C16/4583 , F16D69/023 , F27B5/04 , F27B5/14 , F27B5/16 , F27D7/00 , Y10T428/218 , Y10T428/2962 , Y10T442/102 , Y10T442/109 , Y10T442/3382 , Y10T442/339
摘要: A one-piece or otherwise unitary annular shim member made from a perforated metallic material is used to maintain a space between stacked annular preforms during a manufacturing process, such as densification. The metallic material used preferably can withstand at least the temperatures encountered during densification. The one-piece structure advantageously simplifies the arrangement of the preforms in a process chamber and causes less deformation in the preforms. In one example, the shim member is made from a metallic mesh and may utilize a crimped weave structure.
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公开(公告)号:US07145234B2
公开(公告)日:2006-12-05
申请号:US11036111
申请日:2005-01-14
申请人: Kenny Chang , Chi-Hsing Hsu
发明人: Kenny Chang , Chi-Hsing Hsu
CPC分类号: H01L23/49894 , H01L23/3128 , H01L24/48 , H01L25/162 , H01L2224/48091 , H01L2224/48227 , H01L2924/00014 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19105 , H01L2924/30107 , H05K1/111 , H05K3/284 , H05K3/3442 , H05K3/3452 , H05K2201/062 , H05K2201/0969 , H05K2201/0989 , H05K2201/10636 , H05K2203/048 , Y02P70/611 , Y02P70/613 , Y10S257/923 , Y10S257/924 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: A circuit carrier and a package structure thereof are provided. The circuit carrier comprises a substrate having a surface, a plurality of passive component electrode pads or a plurality of passive component electrode planes on the surface of the substrate for electrically connecting a passive component corresponding to the plurality of passive component electrode pads, and a solder mask layer covering the surface of the substrate and including at least a solder mask opening, that entirely exposing the passive component electrode pads or a portion of the surface of each the passive component electrode plane corresponding to the passive component. Because there is no solder mask layer between the bottom of the passive component and the substrate, the gap between the passive component and the substrate will become wider. Hence, remaining flux can be entirely removed in order to increase the yield rate of the subsequent high temperature process.
摘要翻译: 提供电路载体及其封装结构。 电路载体包括在基板的表面上具有表面的基板,多个无源部件电极焊盘或多个无源部件电极平面,用于电连接对应于多个无源部件电极焊盘的无源部件,以及焊料 掩模层覆盖基板的表面并且至少包括焊接掩模开口,其完全暴露无源部件电极焊盘或与被动部件对应的每个无源部件电极平面的表面的一部分。 由于在无源部件的底部和基板之间没有焊接掩模层,所以无源部件和基板之间的间隙将变宽。 因此,为了提高随后的高温过程的产率,可以完全除去剩余的通量。
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公开(公告)号:US06965169B2
公开(公告)日:2005-11-15
申请号:US10692589
申请日:2003-10-24
申请人: Shelton Lu , Kenny Chang
发明人: Shelton Lu , Kenny Chang
IPC分类号: H01L23/498 , H05K1/03 , H05K3/46 , H01L21/31
CPC分类号: H01L23/49822 , H01L23/49816 , H01L2224/16 , H01L2924/00014 , H01L2924/01078 , H01L2924/01087 , H01L2924/09701 , H01L2924/12044 , H01L2924/15311 , H05K1/0306 , H05K3/4605 , H05K2201/0154 , Y10T428/24917 , H01L2924/00 , H01L2224/0401
摘要: A hybrid integrated circuit (IC) package substrate at least comprising a plurality of patterned conductive layers stacked over each other. The outermost patterned conductive layer has a plurality of bonding pads thereon. The hybrid IC package substrate also has a plurality of dielectric layers respectively sandwiched between two neighboring patterned conductive layers. At least one of the dielectric layers is a ceramic dielectric layer and at least one of the remaining dielectric layers is an organic dielectric layer. There is also a plurality of vias passing through at least one of the dielectric layers for connecting at least two patterned conductive layers electrically.
摘要翻译: 一种混合集成电路(IC)封装衬底,其至少包括彼此堆叠的多个图案化导电层。 最外面的图案化导电层在其上具有多个接合焊盘。 混合IC封装基板还具有分别夹在两个相邻的图案化导电层之间的多个电介质层。 电介质层中的至少一个是陶瓷电介质层,并且剩余的电介质层中的至少一个是有机电介质层。 还有多个通孔穿过至少一个电介质层,用于电连接至少两个图案化的导电层。
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公开(公告)号:US20050167815A1
公开(公告)日:2005-08-04
申请号:US11036111
申请日:2005-01-14
申请人: Kenny Chang , Chi-Hsing Hsu
发明人: Kenny Chang , Chi-Hsing Hsu
CPC分类号: H01L23/49894 , H01L23/3128 , H01L24/48 , H01L25/162 , H01L2224/48091 , H01L2224/48227 , H01L2924/00014 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19105 , H01L2924/30107 , H05K1/111 , H05K3/284 , H05K3/3442 , H05K3/3452 , H05K2201/062 , H05K2201/0969 , H05K2201/0989 , H05K2201/10636 , H05K2203/048 , Y02P70/611 , Y02P70/613 , Y10S257/923 , Y10S257/924 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: A circuit carrier and a package structure thereof are provided. The circuit carrier comprises a substrate having a surface, a plurality of passive component electrode pads or a plurality of passive component electrode planes on the surface of the substrate for electrically connecting a passive component corresponding to the plurality of passive component electrode pads, and a solder mask layer covering the surface of the substrate and including at least a solder mask opening, that entirely exposing the passive component electrode pads or a portion of the surface of each the passive component electrode plane corresponding to the passive component. Because there is no solder mask layer between the bottom of the passive component and the substrate, the gap between the passive component and the substrate will become wider. Hence, remaining flux can be entirely removed in order to increase the yield rate of the subsequent high temperature process.
摘要翻译: 提供电路载体及其封装结构。 电路载体包括在基板的表面上具有表面的基板,多个无源部件电极焊盘或多个无源部件电极平面,用于电连接对应于多个无源部件电极焊盘的无源部件,以及焊料 掩模层覆盖基板的表面并且至少包括焊接掩模开口,其完全暴露无源部件电极焊盘或与被动部件对应的每个无源部件电极平面的表面的一部分。 由于在无源部件的底部和基板之间没有焊接掩模层,所以无源部件和基板之间的间隙将变宽。 因此,为了提高随后的高温过程的产率,可以完全除去剩余的通量。
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公开(公告)号:US20100297360A1
公开(公告)日:2010-11-25
申请号:US12376399
申请日:2007-08-07
申请人: Kenny Chang , Bruce Zimmerman , Arnaud Fillion
发明人: Kenny Chang , Bruce Zimmerman , Arnaud Fillion
CPC分类号: H05B6/108 , C04B35/571 , C04B35/591 , C04B35/806 , C04B35/83 , C04B2235/48 , C04B2235/483 , C04B2235/72 , F16D69/023 , H05B6/362 , Y10T29/4902
摘要: A method of densifying porous substrates, such as brake performs, using a liquid precursor, in which the rate at which “fresh” or “new” liquid precursor is consumed is reduced by maintaining the liquid precursor being used for the densification at a purity level that is less that pure but still chemically suitable for obtaining the desired densification product.
摘要翻译: 使用液体前体致密化多孔基材(例如制动器)的方法通过将用于致密化的液体前体保持在纯度水平来降低其中消耗“新鲜”或“新”液体前体的速率的液体前体 其纯度较低但仍然化学适合于获得所需的致密化产物。
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公开(公告)号:US20060188687A1
公开(公告)日:2006-08-24
申请号:US10548122
申请日:2004-03-02
申请人: Kenny Chang
发明人: Kenny Chang
CPC分类号: C04B35/522 , C04B35/83 , C04B41/5059 , C04B41/87 , C04B2235/9623 , C23C16/045 , C23C16/4581 , C23C16/4583 , F16D69/023 , F27B5/04 , F27B5/14 , F27B5/16 , F27D7/00 , Y10T428/218 , Y10T428/2962 , Y10T442/102 , Y10T442/109 , Y10T442/3382 , Y10T442/339
摘要: A one-piece or otherwise unitary annular shim member made from a carbon material is used to maintain a space between stacked annular preforms during a manufacturing process, such as densification. The one-piece structure advantageously simplifies the arrangement of the preforms in a process chamber and causes less deformation in the preforms. The carbon composition also provides beneficial thermal effects that improve the densification process. A debonding coating is provided on the annular shim member in order to facilitate separation of the annular preforms from the shim members.
摘要翻译: 使用由碳材料制成的单件或其它单一环形垫片构件在制造过程(例如致密化)期间保持堆叠的环形预制件之间的空间。 一体式结构有利地简化了处理室中预型件的布置,并且在预成型件中引起较小的变形。 碳组合物还提供有益的热效应,从而改善致密化过程。 在环形垫片构件上设置脱粘涂层,以便于环形预制件与垫片构件的分离。
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公开(公告)号:US07038309B2
公开(公告)日:2006-05-02
申请号:US10643788
申请日:2003-08-15
申请人: Chi-Hsing Hsu , Kenny Chang
发明人: Chi-Hsing Hsu , Kenny Chang
IPC分类号: H01L23/04
CPC分类号: H01L23/49816 , H01L23/15 , H01L23/3121 , H01L23/36 , H01L24/16 , H01L24/48 , H01L24/73 , H01L25/0655 , H01L2224/05571 , H01L2224/05573 , H01L2224/05599 , H01L2224/16225 , H01L2224/16227 , H01L2224/32225 , H01L2224/45099 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/85399 , H01L2924/00014 , H01L2924/10253 , H01L2924/15174 , H01L2924/15192 , H01L2924/15311 , H01L2924/15312 , H01L2924/15321 , H01L2924/15322 , H01L2924/15788 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
摘要: The present invention provides a chip package structure, comprising: a glass substrate having a substrate surface; a circuit layer on the substrate surface, wherein the circuit layer comprises an interconnection structure; at least a die on the circuit layer, wherein the die is coupled to the interconnection structure; and a plurality of contacts on the circuit layer, wherein the contacts are coupled to the interconnection structure.
摘要翻译: 本发明提供了一种芯片封装结构,包括:具有基板表面的玻璃基板; 基板表面上的电路层,其中所述电路层包括互连结构; 至少在所述电路层上的管芯,其中所述管芯耦合到所述互连结构; 以及电路层上的多个触点,其中触点耦合到互连结构。
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