公开(公告)号：US09716205B2

公开(公告)日：2017-07-25

申请号：US15197616

申请日：2016-06-29

申请人： Timothy Weidman ,  David D. Smith

发明人： Timothy Weidman ,  David D. Smith

IPC分类号： H01L31/18 ,  H01L31/0224 ,  H01L31/068 ,  H01L31/0352

CPC分类号： H01L31/182 ,  H01L31/022441 ,  H01L31/035272 ,  H01L31/0682 ,  H01L31/1864 ,  H01L31/1872 ,  H01L31/1876 ,  Y02E10/546 ,  Y02E10/547 ,  Y02P70/521

摘要： Methods of fabricating solar cell emitter regions using ion implantation, and resulting solar cells, are described. In an example, a method of fabricating alternating N-type and P-type emitter regions of a solar cell involves forming a silicon layer above a substrate. Dopant impurity atoms of a first conductivity type are implanted, through a first shadow mask, in the silicon layer to form first implanted regions and resulting in non-implanted regions of the silicon layer. Dopant impurity atoms of a second, opposite, conductivity type are implanted, through a second shadow mask, in portions of the non-implanted regions of the silicon layer to form second implanted regions and resulting in remaining non-implanted regions of the silicon layer. The remaining non-implanted regions of the silicon layer are removed with a selective etch process, while the first and second implanted regions of the silicon layer are annealed to form doped polycrystalline silicon emitter regions.

公开(公告)号：US20170162729A1

公开(公告)日：2017-06-08

申请号：US15436239

申请日：2017-02-17

申请人： Timothy Weidman

发明人： Timothy Weidman

IPC分类号： H01L31/0224 ,  H01L31/18 ,  H01L31/0368 ,  H01L31/04 ,  H01L31/0216 ,  H01L31/028

CPC分类号： H01L31/022433 ,  H01L31/02167 ,  H01L31/022441 ,  H01L31/028 ,  H01L31/035272 ,  H01L31/03682 ,  H01L31/04 ,  H01L31/068 ,  H01L31/182 ,  H01L31/1876 ,  Y02E10/546 ,  Y02E10/547 ,  Y02P70/521

摘要： Methods of fabricating solar cell emitter regions using self-aligned implant and cap, and the resulting solar cells, are described. In an example, a method of fabricating an emitter region of a solar cell involves forming a silicon layer above a substrate. The method also involves implanting, through a stencil mask, dopant impurity atoms in the silicon layer to form implanted regions of the silicon layer with adjacent non-implanted regions. The method also involves forming, through the stencil mask, a capping layer on and substantially in alignment with the implanted regions of the silicon layer. The method also involves removing the non-implanted regions of the silicon layer, wherein the capping layer protects the implanted regions of the silicon layer during the removing. The method also involves annealing the implanted regions of the silicon layer to form doped polycrystalline silicon emitter regions.

公开(公告)号：US20150162483A1

公开(公告)日：2015-06-11

申请号：US14562159

申请日：2014-12-05

申请人： Timothy Weidman ,  David D. Smith

发明人： Timothy Weidman ,  David D. Smith

IPC分类号： H01L31/18 ,  H01L31/0224 ,  H01L31/068 ,  H01L31/0368

CPC分类号： H01L31/182 ,  H01L31/022441 ,  H01L31/035272 ,  H01L31/0682 ,  H01L31/1864 ,  H01L31/1872 ,  H01L31/1876 ,  Y02E10/546 ,  Y02E10/547 ,  Y02P70/521

摘要： Methods of fabricating solar cell emitter regions using ion implantation, and resulting solar cells, are described. In an example, a method of fabricating alternating N-type and P-type emitter regions of a solar cell involves forming a silicon layer above a substrate. Dopant impurity atoms of a first conductivity type are implanted, through a first shadow mask, in the silicon layer to form first implanted regions and resulting in non-implanted regions of the silicon layer. Dopant impurity atoms of a second, opposite, conductivity type are implanted, through a second shadow mask, in portions of the non-implanted regions of the silicon layer to form second implanted regions and resulting in remaining non-implanted regions of the silicon layer. The remaining non-implanted regions of the silicon layer are removed with a selective etch process, while the first and second implanted regions of the silicon layer are annealed to form doped polycrystalline silicon emitter regions.

摘要翻译： 描述了使用离子注入制造太阳能电池发射极区域的方法，以及所得到的太阳能电池。 在一个示例中，制造太阳能电池的交替的N型和P型发射极区域的方法涉及在衬底上形成硅层。 第一导电类型的掺杂杂质原子通过第一阴影掩模在硅层中注入以形成第一注入区，并产生硅层的非注入区。 通过第二阴影掩模，在硅层的非注入区域的一部分中注入第二相对导电类型的掺杂杂质原子，以形成第二注入区，并产生硅层的剩余未注入区。 通过选择性蚀刻工艺去除硅层的其余非注入区域，同时对硅层的第一和第二注入区域进行退火以形成掺杂的多晶硅发射极区域。

公开(公告)号：US08152981B2

公开(公告)日：2012-04-10

申请号：US12015410

申请日：2008-01-16

申请人： Kapila P. Wijekoon ,  Timothy Weidman

发明人： Kapila P. Wijekoon ,  Timothy Weidman

IPC分类号： C25D13/10 ,  H01B1/02

CPC分类号： C09K19/36 ,  C25D13/00 ,  C25D13/12 ,  H01L31/02008 ,  H01L31/022425 ,  Y02E10/50

摘要： Embodiments of the invention generally provide methods and compositions that are used during electrophoretic deposition (EPD) processes. In one embodiment, a method for forming a metallization material during an EPD process is provided which includes positioning a substrate containing apertures disposed thereon, exposing the substrate to a flux agent to form a flux coating within the apertures, exposing the flux coating to an EPD mixture to form a particulate layer therein, and exposing the substrate to a reflow process to form a metallization layer within the apertures. Optionally, the particulate layer may be exposed to the flux agent prior to the reflow process. The EPD mixture generally contains a dielectric hydrocarbon fluid, metallic particles, and a liquid crystal material (LCM), such as a cholesteryl compound. In some embodiments, an abietic acid compound may be used as the flux agent, or alternatively, as the LCM.

摘要翻译： 本发明的实施方案通常提供在电泳沉积（EPD）方法期间使用的方法和组合物。 在一个实施例中，提供了一种在EPD工艺期间形成金属化材料的方法，其包括定位其上布置的孔的衬底，将衬底暴露于助焊剂以在孔内形成焊剂涂层，将焊剂涂层暴露于EPD 混合物以在其中形成颗粒层，并将基板暴露于回流工艺以在孔内形成金属化层。 任选地，颗粒层可以在回流工艺之前暴露于助焊剂。 EPD混合物通常包含介电烃流体，金属颗粒和液晶材料（LCM），例如胆固醇基化合物。 在一些实施方案中，松香酸化合物可以用作助熔剂，或者作为LCM使用。

公开(公告)号：US07431585B2

公开(公告)日：2008-10-07

申请号：US10278615

申请日：2002-10-22

申请人： Jun Zhao ,  David Quach ,  Timothy Weidman ,  Rick J. Roberts ,  Farhad Moghadam ,  Dan Maydan

发明人： Jun Zhao ,  David Quach ,  Timothy Weidman ,  Rick J. Roberts ,  Farhad Moghadam ,  Dan Maydan

IPC分类号： F27D3/00

CPC分类号： H01L21/67109 ,  Y10S414/139

摘要： An apparatus for processing substrates is disclosed. In one embodiment, the apparatus includes a housing and a plurality of stacked cell structures in the housing. An actuator is adapted to move the plurality of stacked cell structures inside of the housing while substrates in the stacked cell structures are being heated.

公开(公告)号：US20080119005A1

公开(公告)日：2008-05-22

申请号：US11562573

申请日：2006-11-22

申请人： Timothy Weidman ,  Li Xu ,  Peter G. Borden

发明人： Timothy Weidman ,  Li Xu ,  Peter G. Borden

IPC分类号： H01L31/0272

CPC分类号： H01L31/0749 ,  H01L31/03923 ,  H01L31/0465 ,  H01L31/18 ,  Y02E10/541

摘要： A processing method described herein provides a method of patterning a MoSe2 and/or Mo material, for example a layer of such material(s) in a thin-film structure. According to one aspect, the invention relates to etch solutions that can effectively etch through Mo and/or MoSe2. According to another aspect, the invention relates to etching such materials when such materials are processed with other materials in a thin film photovoltaic device. According to other aspects, the invention includes a process of etching Mo and/or MoSe2 with selectivity to a layer of CIGS material in an overall process flow. According to still further aspects, the invention relates to Mo and/or MoSe2 etch solutions that are useful in an overall photolithographic process for forming a photovoltaic cell and/or interconnects and test structures in a photovoltaic device.

摘要翻译： 本文所述的处理方法提供了一种图案化MoSe 2和/或Mo材料的方法，例如薄膜结构中的这种材料层。 根据一个方面，本发明涉及可以有效地蚀刻通过Mo和/或MoSe 2的蚀刻溶液。 根据另一方面，本发明涉及当这种材料在薄膜光伏器件中用其它材料加工时蚀刻这种材料。 根据其它方面，本发明包括在整个工艺流程中对具有选择性的CIGS材料的Mo和/或MoSe 2进行蚀刻的工艺。 根据另外的方面，本发明涉及可用于在光伏器件中形成光伏电池和/或互连和测试结构的整体光刻工艺中的Mo和/或MoSe 2 N 2蚀刻溶液。

公开(公告)号：US20080083673A1

公开(公告)日：2008-04-10

申请号：US11538467

申请日：2006-10-04

申请人： Josh H. Golden ,  Timothy Weidman ,  Peter Porshnev ,  Kalyan Sista ,  Nikhil Krishnan

发明人： Josh H. Golden ,  Timothy Weidman ,  Peter Porshnev ,  Kalyan Sista ,  Nikhil Krishnan

IPC分类号： C02F1/42

CPC分类号： C23C18/1617 ,  C02F1/42 ,  C25D21/22 ,  Y10S210/912

摘要： Embodiments herein provide waste abatement apparatuses and methods for treating waste solutions derived from depleted or used plating solutions, such as from an electroless deposition process or an electrochemical plating process. The waste abatement systems and processes may be used to treat the waste solutions by lowering the concentration of, if not completely removing, metal ions or reducing agents that are dissolved within the waste solution. In one embodiment of a demetallization process, a waste solution may be exposed to a heating element (e.g., copper coil) contained within an immersion tank. In another embodiment, the waste solution may be exposed to a catalyst having high surface area (e.g., steel wool or other metallic wool) within an immersion tank. In another embodiment, the waste solution may be flowed through a removable, catalytic conduit (e.g., copper tubing) having an internal catalytic surface.

公开(公告)号：US07273813B2

公开(公告)日：2007-09-25

申请号：US11053501

申请日：2005-02-08

申请人： Ramin Emami ,  Timothy Weidman ,  Sergey Lopatin ,  Hongbin Fang ,  Arulkumar Shanmugasundram

发明人： Ramin Emami ,  Timothy Weidman ,  Sergey Lopatin ,  Hongbin Fang ,  Arulkumar Shanmugasundram

IPC分类号： H01L21/44

CPC分类号： C23C18/1844 ,  C11D7/06 ,  C11D7/08 ,  C11D7/265 ,  C11D11/0047 ,  C23F1/18 ,  C23G1/103 ,  H01L21/02074 ,  H01L21/76826 ,  H01L21/76849 ,  H01L21/76877 ,  H01L21/76883

摘要： A method and cleaning solution that removes contaminants from a dielectric material and polished surfaces of copper interconnect structures prior to an electroless deposition of a capping layer without substantially adversely affecting the interconnect formed therefrom are disclosed. The cleaning solution includes combinations of a core mixture and sulfuric acid or sulfonic compounds such as sulfonic acids that include methanesulfonic acid. In one embodiment, the core mixture includes a citric acid solution and a pH adjuster such as tetra-methyl ammonium hydroxide or ammonia. One embodiment of the method includes providing a planarized substrate, applying the cleaning solution to the substrate to simultaneously clean at least one metal feature and a dielectric material of the substrate, and depositing the metal capping layer selectively on the at least one metal feature using electroless deposition.

摘要翻译： 公开了一种方法和清洁溶液，其在电绝缘沉积覆盖层之前从电介质材料和铜互连结构的抛光表面去除污染物，而基本上不利地影响由其形成的互连。 清洁溶液包括核混合物和硫酸或磺酸化合物如包括甲磺酸的磺酸的组合。 在一个实施方案中，核心混合物包括柠檬酸溶液和pH调节剂如四甲基氢氧化铵或氨。 该方法的一个实施例包括提供平坦化的基板，将清洁溶液施加到基板上以同时清洁基板的至少一个金属特征和介电材料，并且使用无电镀将金属覆盖层选择性地沉积在至少一个金属特征上 沉积

公开(公告)号：US20070128538A1

公开(公告)日：2007-06-07

申请号：US11673177

申请日：2007-02-09

申请人： KEVIN FAIRBAIRN ,  Michael Rice ,  Timothy Weidman ,  Christopher Ngai ,  Ian Latchford ,  Christopher Bencher ,  Yuxiang Wang

发明人： KEVIN FAIRBAIRN ,  Michael Rice ,  Timothy Weidman ,  Christopher Ngai ,  Ian Latchford ,  Christopher Bencher ,  Yuxiang Wang

IPC分类号： G03C8/00

CPC分类号： H01L21/76829 ,  C23C16/26 ,  H01L21/0276 ,  H01L21/28035 ,  H01L21/3081 ,  H01L21/3088 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/3146 ,  H01L21/31612 ,  H01L21/32137 ,  H01L21/76802 ,  H01L21/76807

摘要： A method of forming an integrated circuit using an amorphous carbon film. The amorphous carbon film is formed by thermally decomposing a gas mixture comprising a hydrocarbon compound and an inert gas. The amorphous carbon film is compatible with integrated circuit fabrication processes. In one integrated circuit fabrication process, the amorphous carbon film is used as a hardmask. In another integrated circuit fabrication process, the amorphous carbon film is an anti-reflective coating (ARC) for deep ultraviolet (DUV) lithography. In yet another integrated circuit fabrication process, a multi-layer amorphous carbon anti-reflective coating is used for DUV lithography.

摘要翻译： 一种使用无定形碳膜形成集成电路的方法。 无定形碳膜通过热分解包含烃化合物和惰性气体的气体混合物而形成。 无定形碳膜与集成电路制造工艺兼容。 在一个集成电路制造工艺中，非晶碳膜用作硬掩模。 在另一个集成电路制造工艺中，无定形碳膜是用于深紫外（DUV）光刻的抗反射涂层（ARC）。 在又一集成电路制造工艺中，多层无定形碳抗反射涂层用于DUV光刻。

公开(公告)号：US07226853B2

公开(公告)日：2007-06-05

申请号：US10197936

申请日：2002-07-16

申请人： Nikolaos Bekiaris ,  Timothy Weidman ,  Michael D. Armacost ,  Mehul B. Naik

发明人： Nikolaos Bekiaris ,  Timothy Weidman ,  Michael D. Armacost ,  Mehul B. Naik

IPC分类号： H01L21/4763

CPC分类号： H01L21/022 ,  H01L21/02115 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/0332 ,  H01L21/31144 ,  H01L21/312 ,  H01L21/3146 ,  H01L21/76811 ,  H01L21/76813 ,  H01L21/76829 ,  H01L21/76835

摘要： A method of forming a dual damascene structure on a substrate having a dielectric layer already formed thereon. In one embodiment the method includes depositing a first hard mask layer over the dielectric layer; depositing a second hard mask layer on the first hard mask layer; depositing a third hard mask layer on the second hard mask layer and completing formation of the dual damascene structure by etching a metal wiring pattern and a via pattern in the dielectric layer and filling the etched metal wiring pattern and via pattern with a conductive material. In one particular embodiment the second hard mask layer is an amorphous carbon layer and the third hard mask layer is a silicon-containing material.

摘要翻译： 在其上已经形成有电介质层的基板上形成双镶嵌结构的方法。 在一个实施例中，该方法包括在介电层上沉积第一硬掩模层; 在第一硬掩模层上沉积第二硬掩模层; 在第二硬掩模层上沉积第三硬掩模层，并通过蚀刻电介质层中的金属布线图案和通孔图案并用导电材料填充蚀刻的金属布线图案和通孔图案，完成双镶嵌结构的形成。 在一个特定实施例中，第二硬掩模层是无定形碳层，第三硬掩模层是含硅材料。