-
公开(公告)号：US07394090B2
公开(公告)日：2008-07-01
申请号：US11798364
申请日：2007-05-14
IPC分类号： H01L47/00
CPC分类号： G11C13/0004 , G11C14/009 , H01L27/1104 , H01L27/24 , H01L45/04 , H01L45/145
摘要： A non-volatile memory comprising: a first substrate (100) and a second substrate (110), the first substrate (100) having a plurality of switching elements (4) arranged in matrix, and a plurality of first electrodes (18) connected to the switching element (4), the second substrate (110) having a conductive film (32), and a recording layer (34) whose resistance value changes by application of an electric pulse, wherein the plurality of first electrodes (18) are integrally covered by the recording layer (34), the recording layer (34) thereby being held between the plurality of first electrodes (18) and the conductive film (32); the first substrate (100) further comprising a second electrode (22), the second electrode (22) being electrically connected to the conductive film (32), the voltage of which is maintained at a set level while applying current to the recording layer (34). This non-volatile memory achieves high integration at low cost.
摘要翻译： 一种非易失性存储器，包括：第一基板（100）和第二基板（110），所述第一基板（100）具有布置成矩阵的多个开关元件（4），并且多个第一电极（18）被连接 至所述开关元件（4），所述第二基板（110）具有导电膜（32）以及其电阻值通过施加电脉冲而改变的记录层（34），其中所述多个第一电极（18）为 由记录层（34）整体覆盖，记录层（34）由此保持在多个第一电极（18）和导电膜（32）之间; 所述第一基板（100）还包括第二电极（22），所述第二电极（22）电连接到所述导电膜（32），其电压保持在设定电平，同时向所述记录层施加电流（ 34）。 这种非易失性存储器以低成本实现高集成度。
-
公开(公告)号：US20070210362A1
公开(公告)日：2007-09-13
申请号：US11798364
申请日：2007-05-14
IPC分类号： H01L27/11
CPC分类号： G11C13/0004 , G11C14/009 , H01L27/1104 , H01L27/24 , H01L45/04 , H01L45/145
摘要： A non-volatile memory comprising: a first substrate (100) and a second substrate (110), the first substrate (100) having a plurality of switching elements (4) arranged in matrix, and a plurality of first electrodes (18) connected to the switching element (4), the second substrate (110) having a conductive film (32), and a recording layer (34) whose resistance value changes by application of an electric pulse, wherein the plurality of first electrodes (18) are integrally covered by the recording layer (34), the recording layer (34) thereby being held between the plurality of first electrodes (18) and the conductive film (32); the first substrate (100) further comprising a second electrode (22), the second electrode (22) being electrically connected to the conductive film (32), the voltage of which is maintained at a set level while applying current to the recording layer (34). This non-volatile memory achieves high integration at low cost.
摘要翻译： 一种非易失性存储器，包括：第一基板（100）和第二基板（110），所述第一基板（100）具有布置成矩阵的多个开关元件（4），并且多个第一电极（18）被连接 至所述开关元件（4），所述第二基板（110）具有导电膜（32）以及其电阻值通过施加电脉冲而改变的记录层（34），其中所述多个第一电极（18）为 由记录层（34）整体覆盖，记录层（34）由此保持在多个第一电极（18）和导电膜（32）之间; 所述第一基板（100）还包括第二电极（22），所述第二电极（22）电连接到所述导电膜（32），其电压保持在设定电平，同时向所述记录层施加电流（ 34）。 这种非易失性存储器以低成本实现高集成度。
-
公开(公告)号：US20050093043A1
公开(公告)日：2005-05-05
申请号：US10980309
申请日：2004-11-04
CPC分类号： G11C13/0004 , G11C14/009 , H01L27/1104 , H01L27/24 , H01L45/04 , H01L45/145
摘要： A non-volatile memory comprising: a first substrate (100) and a second substrate (110), the first substrate (100) having a plurality of switching elements (4) arranged in matrix, and a plurality of first electrodes (18) connected to the switching element (4), the second substrate (110) having a conductive film (32), and a recording layer (34) whose resistance value changes by application of an electric pulse, wherein the plurality of first electrodes (18) are integrally covered by the recording layer (34), the recording layer (34) thereby being held between the plurality of first electrodes (18) and the conductive film (32); the first substrate (100) further comprising a second electrode (22), the second electrode (22) being electrically connected to the conductive film (32), the voltage of which is maintained at a set level while applying current to the recording layer (34). This non-volatile memory achieves high integration at low cost.
摘要翻译： 一种非易失性存储器，包括：第一基板（100）和第二基板（110），所述第一基板（100）具有布置成矩阵的多个开关元件（4），并且多个第一电极（18）被连接 至所述开关元件（4），所述第二基板（110）具有导电膜（32）以及其电阻值通过施加电脉冲而改变的记录层（34），其中所述多个第一电极（18）为 由记录层（34）整体覆盖，记录层（34）由此保持在多个第一电极（18）和导电膜（32）之间; 所述第一基板（100）还包括第二电极（22），所述第二电极（22）电连接到所述导电膜（32），其电压保持在设定电平，同时向所述记录层施加电流（ 34）。 这种非易失性存储器以低成本实现高集成度。
-
公开(公告)号：US07232703B2
公开(公告)日：2007-06-19
申请号：US10980309
申请日：2004-11-04
IPC分类号： H01L21/06
CPC分类号： G11C13/0004 , G11C14/009 , H01L27/1104 , H01L27/24 , H01L45/04 , H01L45/145
摘要： A non-volatile memory comprising: a first substrate (100) and a second substrate (110), the first substrate (100) having a plurality of switching elements (4) arranged in matrix, and a plurality of first electrodes (18) connected to the switching element (4), the second substrate (110) having a conductive film (32), and a recording layer (34) whose resistance value changes by application of an electric pulse, wherein the plurality of first electrodes (18) are integrally covered by the recording layer (34), the recording layer (34) thereby being held between the plurality of first electrodes (18) and the conductive film (32); the first substrate (100) further comprising a second electrode (22), the second electrode (22) being electrically connected to the conductive film (32), the voltage of which is maintained at a set level while applying current to the recording layer (34).This non-volatile memory achieves high integration at low cost.
-
公开(公告)号：US07291857B2
公开(公告)日：2007-11-06
申请号：US10967222
申请日：2004-10-19
IPC分类号： H01L47/00
CPC分类号： H01L27/2463 , H01L45/06 , H01L45/1233 , H01L45/1273 , H01L45/144 , H01L45/16 , H01L45/1625
摘要： A non-volatile memory (1) which comprises an insulating substrate (11) having a plurality of first electrodes (15) extending therethrough from a front surface of the substrate to a rear surface thereof, a second electrode (12) formed on one surface side of the substrate (11), and a recording layer (14) held between the first electrodes (15) and the second electrode (12) and variable in resistance value by electric pulses applied across the first electrodes (15) and the second electrode (12), the plurality of first electrodes (15) being electrically connected to the recording layer (14) in a region constituting a single memory cell (MC). The non-volatile memory (1) can be reduced in power consumption and has great freedom of design and high reliability.
摘要翻译： 一种非易失性存储器（1），其包括绝缘基板（11），所述绝缘基板具有从所述基板的前表面延伸穿过其延伸到其后表面的多个第一电极（15），形成在一个表面上的第二电极 基板（11）的一侧，以及保持在第一电极（15）和第二电极（12）之间的记录层（14），并且通过施加在第一电极（15）和第二电极 （12），所述多个第一电极（15）在构成单个存储单元（MC）的区域中与记录层（14）电连接。 非易失性存储器（1）可以降低功耗，并具有很大的设计自由度和高可靠性。
-
公开(公告)号：US20050045864A1
公开(公告)日：2005-03-03
申请号：US10967222
申请日：2004-10-19
CPC分类号： H01L27/2463 , H01L45/06 , H01L45/1233 , H01L45/1273 , H01L45/144 , H01L45/16 , H01L45/1625
摘要： A non-volatile memory (1) which comprises an insulating substrate (11) having a plurality of first electrodes (15) extending therethrough from a front surface of the substrate to a rear surface thereof, a second electrode (12) formed on one surface side of the substrate (11), and a recording layer (14) held between the first electrodes (15) and the second electrode (12) and variable in resistance value by electric pulses applied across the first electrodes (15) and the second electrode (12), the plurality of first electrodes (15) being electrically connected to the recording layer (14) in a region constituting a single memory cell (MC). The non-volatile memory (1) can be reduced in power consumption and has great freedom of design and high reliability.
摘要翻译： 一种非易失性存储器（1），其包括绝缘基板（11），所述绝缘基板具有从所述基板的前表面延伸穿过其延伸到其后表面的多个第一电极（15），形成在一个表面上的第二电极 基板（11）的一侧，以及保持在第一电极（15）和第二电极（12）之间的记录层（14），并且通过施加在第一电极（15）和第二电极 （12），所述多个第一电极（15）在构成单个存储单元（MC）的区域中与记录层（14）电连接。 非易失性存储器（1）可以降低功耗，并具有很大的设计自由度和高可靠性。
-
公开(公告)号：US06844564B2
公开(公告)日：2005-01-18
申请号：US10608130
申请日：2003-06-30
CPC分类号： H01L27/2463 , H01L45/06 , H01L45/1233 , H01L45/1273 , H01L45/144 , H01L45/16 , H01L45/1625
摘要： A non-volatile memory (1) which comprises an insulating substrate (11) having a plurality of first electrodes (15) extending therethrough from a front surface of the substrate to a rear surface thereof, a second electrode (12) formed on one surface side of the substrate (11), and a recording layer (14) held between the first electrodes (15) and the second electrode (12) and variable in resistance value by electric pulses applied across the first electrodes (15) and the second electrode (12), the plurality of first electrodes (15) being electrically connected to the recording layer (14) in a region constituting a single memory cell (MC). The non-volatile memory (1) can be reduced in power consumption and has great freedom of design and high reliability.
-
8.发明授权Multilevel semiconductor memory device and method for driving the same as a neuron element in a neural network computer 有权多电平半导体存储器件及其在神经网络计算机中作为神经元元件驱动的方法公开(公告)号：US06940740B2
公开(公告)日：2005-09-06
申请号：US10428840
申请日：2003-05-05
申请人： Michihito Ueda , Takashi Ohtsuka , Kiyoyuki Morita
发明人： Michihito Ueda , Takashi Ohtsuka , Kiyoyuki Morita
IPC分类号： G11C11/22 , G11C11/56 , H01L21/8246 , H01L27/105 , H01L27/115 , H01L29/788
CPC分类号： H01L27/11502 , G11C11/22 , G11C11/223 , G11C11/54 , G11C11/5657 , H01L27/105 , H01L27/11507 , H01L29/7881
摘要： A semiconductor device includes: a control-voltage supply unit 110; an MOS transistor including a gate electrode 109 and drain and source regions 103a and 103b; a dielectric capacitor 104; and a resistor 106. The dielectric capacitor 104 and the resistor 106 are disposed in parallel and interposed between the gate electrode 109 and the control-voltage supply unit 110. With this structure, a charge is accumulated in each of an intermediate electrode of the dielectric capacitor 104 and the gate electrode 109 upon the application of a voltage, thereby varying a threshold value of the MOS transistor. In this manner, the history of input signals can be stored as a variation in a drain current in the MOS transistor, thus allowing multilevel information to be held.
摘要翻译： 半导体器件包括：控制电压提供单元110; 包括栅电极109和漏极和源极区103a和103b的MOS晶体管; 介质电容器104; 和电阻器106。 介质电容器104和电阻器106并联设置并插入在栅电极109和控制电压供给单元110之间。 利用这种结构，在施加电压时，介质电容器104和栅电极109的中间电极中的每一个中积累电荷，从而改变MOS晶体管的阈值。 以这种方式，可以将输入信号的历史存储为MOS晶体管中的漏极电流的变化，从而允许保持多电平信息。
-
9.发明授权Method for removing foreign matter, method for forming film, semiconductor device and film forming apparatus 失效异物去除方法，薄膜形成方法，半导体装置和成膜装置公开(公告)号：US06716663B2
公开(公告)日：2004-04-06
申请号：US10230258
申请日：2002-08-29
申请人： Kiyoyuki Morita , Takashi Ohtsuka , Michihito Ueda
发明人： Kiyoyuki Morita , Takashi Ohtsuka , Michihito Ueda
IPC分类号： H01L2100
CPC分类号： H01L29/513 , C23C16/409 , C23C16/4485 , H01L21/28167 , H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L21/28291 , H01L21/31691 , H01L29/516 , H01L29/517 , H01L29/518
摘要： A semiconductor substrate is placed within a housing. By supplying organometallic complexes and carbon dioxide in a supercritical state into the housing, a BST thin film is formed on a platinum thin film, while at the same time, carbon compounds, which are produced when the BST thin film is formed, are removed. The solubility of carbon compounds in the supercritical carbon dioxide is very high, and yet the viscosity of the supercritical carbon dioxide is low. Accordingly, the carbon compounds are removable efficiently from the BST thin film. An oxide or nitride film may also be formed by performing oxidation or nitriding at a low temperature using water in a supercritical or subcritical state, for example.
摘要翻译： 将半导体衬底放置在壳体内。 通过将超临界状态的有机金属配合物和二氧化碳供给到壳体中，在铂薄膜上形成BST薄膜，同时除去形成BST薄膜时产生的碳化合物。 碳化合物在超临界二氧化碳中的溶解度非常高，而超临界二氧化碳的粘度低。 因此，碳化合物可从BST薄膜有效地去除。 氧化物或氮化物膜也可以通过使用例如超临界或亚临界状态的水在低温下进行氧化或氮化来形成。
-
公开(公告)号：US06844582B2
公开(公告)日：2005-01-18
申请号：US10434358
申请日：2003-05-09
申请人： Michihito Ueda , Kenji Toyoda , Takashi Ohtsuka , Kiyoyuki Morita
发明人： Michihito Ueda , Kenji Toyoda , Takashi Ohtsuka , Kiyoyuki Morita
IPC分类号： G06N3/063 , G11C27/00 , H01L21/8246 , H01L21/8247 , H01L21/84 , H01L27/115 , H01L27/12 , H01L45/00 , H01L29/76 , H01L27/108 , G06F15/18 , G06G7/00
CPC分类号： H01L27/11502 , G06N3/0635 , G11C11/54 , G11C27/00 , H01L21/84 , H01L27/115 , H01L27/11507 , H01L27/11521 , H01L27/11585 , H01L27/1159 , H01L27/1203 , H01L45/06 , H01L45/1206 , H01L45/144
摘要： A learning method of a semiconductor device of the present invention comprises a neuro device having a multiplier as a synapse in which a weight varies according to an input weight voltage, and functioning as a neural network system that processes analog data, comprising a step A of inputting predetermined input data to the neuro device and calculating an error between a target value of an output of the neuro device with respect to the input data and an actual output, a step B of calculating variation amount in the error by varying a weight of the multiplier thereafter, and a step C of varying the weight of the multiplier based on the variation amount in the error, wherein in the steps B and C, after inputting a reset voltage for setting the weight to a substantially constant value to the multiplier as the weight voltage, the weight is varied by inputting the weight voltage corresponding to the weight to be varied.
摘要翻译： 本发明的半导体器件的学习方法包括具有倍增器作为突触的神经器件，其中重量根据输入重量电压而变化，并且用作处理模拟数据的神经网络系统，其包括步骤A的步骤A 向神经装置输入预定的输入数据并计算神经装置的输出的目标值相对于输入数据与实际输出之间的误差;步骤B，通过改变神经元的重量来计算误差的变化量; 之后的乘法器，以及基于误差变化量来改变乘法器的权重的步骤C，其中在步骤B和C中，在输入用于将权重设定为基本恒定值的复位电压之后， 重量电压，通过输入与要变化的重量相对应的重量电压来改变重量。
-
-
-
-
-
-
-
-
-
搜索结果
55 条记录 (耗时 0.025 秒)