公开(公告)号：US07486334B2

公开(公告)日：2009-02-03

申请号：US10897204

申请日：2004-07-23

申请人： Kouzou Masuda ,  Ikuya Arai ,  Sadao Tsuruga ,  Jiro Kawasaki ,  Tsuyoshi Sano ,  Tamotsu Nagabayashi ,  Ryuuichi Someya ,  Fumio Inoue ,  Kouji Kitou ,  Yasuhiro Imai ,  Masatoshi Hirose

发明人： Kouzou Masuda ,  Ikuya Arai ,  Sadao Tsuruga ,  Jiro Kawasaki ,  Tsuyoshi Sano ,  Tamotsu Nagabayashi ,  Ryuuichi Someya ,  Fumio Inoue ,  Kouji Kitou ,  Yasuhiro Imai ,  Masatoshi Hirose

IPC分类号： H04N5/445

CPC分类号： H04N5/126 ,  H04N5/44591 ,  H04N5/45 ,  H04N5/52 ,  H04N5/57 ,  H04N7/012 ,  H04N21/4113 ,  H04N21/4305 ,  H04N21/4316 ,  H04N21/4318 ,  H04N21/440218

摘要： An image display system includes a display device, an input section to which video signals of an interlace scanning system are inputted, a signal converter section which increases horizontal scanning lines of the inputted video signals in number by a factor of at least two, and which generates first and second fields, each of the fields including effective scanning lines used for displaying and ineffective scanning lines not used for displaying, with the effective and ineffective scanning lines being arranged alternately in each of the fields, and a display control section which controls the display device to display the first and second fields alternately. The display control section controls the display device such that positions of the effective scanning lines of the first fields correspond with those of the ineffective scanning lines of the second fields, and vice versa.

摘要翻译： 图像显示系统包括：显示装置，输入交错扫描系统的视频信号的输入部分;信号转换部，其将所输入的视频信号的水平扫描线数量增加至少2倍;以及哪个 产生第一和第二场，每个场包括用于显示的有效扫描线和不用于显示的无效扫描线，其中有效和无效扫描线交替地布置在每个场中;以及显示控制部分，其控制 显示装置交替地显示第一和第二场。 显示控制部控制显示装置，使得第一场的有效扫描线的位置与第二场无效扫描线的位置相对应，反之亦然。

公开(公告)号：US20050001932A1

公开(公告)日：2005-01-06

申请号：US10897204

申请日：2004-07-23

申请人： Kouzou Masuda ,  Ikuya Arai ,  Sadao Tsuruga ,  Jiro Kawasaki ,  Tsuyoshi Sano ,  Tamotsu Nagabayashi ,  Ryuuichi Someya ,  Fumio Inoue ,  Kouji Kitou ,  Yasuhiro Imai ,  Masatoshi Hirose

发明人： Kouzou Masuda ,  Ikuya Arai ,  Sadao Tsuruga ,  Jiro Kawasaki ,  Tsuyoshi Sano ,  Tamotsu Nagabayashi ,  Ryuuichi Someya ,  Fumio Inoue ,  Kouji Kitou ,  Yasuhiro Imai ,  Masatoshi Hirose

IPC分类号： H04N5/12 ,  H04N5/44 ,  H04N5/445 ,  H04N5/45 ,  H04N5/52 ,  H04N5/57 ,  H04N7/01

CPC分类号： H04N5/126 ,  H04N5/44591 ,  H04N5/45 ,  H04N5/52 ,  H04N5/57 ,  H04N7/012 ,  H04N21/4113 ,  H04N21/4305 ,  H04N21/4316 ,  H04N21/4318 ,  H04N21/440218

摘要： An image display system includes a memory for storing at least one scanning line of an inputted video signal of the interlace scanning system, and reading means for repeating to read the video signal of one scanning line from the memory at a speed which is n (n is an integer of 2 or more) times of the writing speed of the video signal for the memory for a horizontal scanning period which is 1/n of the writing period and to stop reading for a horizontal scanning period of the remaining (n−1)/n for each scanning line of one field which is sequentially inputted and reading each scanning line so that the continuous fields interpolate the period of stopping of reading from the memory each other.

摘要翻译： 图像显示系统包括：存储器，用于存储隔行扫描系统的输入视频信号的至少一条扫描线;以及读取装置，用于以n（n）的速度从存储器重复读取一条扫描线的视频信号 是写入周期的1 / n的水平扫描期间的存储器的视频信号的写入速度的2个以上的整数倍，并且在剩余的（n-1）的水平扫描期间停止读取 ）/ n，并且读取每条扫描线，使得连续的场内插从存储器中读取停止的周期。

公开(公告)号：US06791623B1

公开(公告)日：2004-09-14

申请号：US09432150

申请日：1999-11-02

申请人： Kouzou Masuda ,  Ikuya Arai ,  Sadao Tsuruga ,  Jiro Kawasaki ,  Tsuyoshi Sano ,  Tamotsu Nagabayashi ,  Ryuuichi Someya ,  Fumio Inoue ,  Kouji Kitou ,  Yasuhiro Imai ,  Masatoshi Hirose

发明人： Kouzou Masuda ,  Ikuya Arai ,  Sadao Tsuruga ,  Jiro Kawasaki ,  Tsuyoshi Sano ,  Tamotsu Nagabayashi ,  Ryuuichi Someya ,  Fumio Inoue ,  Kouji Kitou ,  Yasuhiro Imai ,  Masatoshi Hirose

IPC分类号： H04N5445

CPC分类号： H04N5/126 ,  H04N5/44591 ,  H04N5/45 ,  H04N5/52 ,  H04N5/57 ,  H04N7/012 ,  H04N21/4113 ,  H04N21/4305 ,  H04N21/4316 ,  H04N21/4318 ,  H04N21/440218

摘要： An image display system includes a memory for storing at least one scanning line of an inputted video signal of the interlace scanning system, and reading means for repeating to read the video signal of one scanning line from the memory at a speed which is n (n is an integer of 2 or more) times of the writing speed of the video signal for the memory for a horizontal scanning period which is 1/n of the writing period and to stop reading for a horizontal scanning period of the remaining (n−1)/n for each scanning line of one field which is sequentially inputted and reading each scanning line so that the continuous fields interpolate the period of stopping of reading from the memory each other.

摘要翻译： 图像显示系统包括：存储器，用于存储隔行扫描系统的输入视频信号的至少一条扫描线;以及读取装置，用于以n（n）的速度从存储器重复读取一条扫描线的视频信号 是写入周期的1 / n的水平扫描期间的存储器的视频信号的写入速度的2个以上的整数倍，并且在剩余的（n-1）的水平扫描期间停止读取 ）/ n，并且读取每条扫描线，使得连续的场内插从存储器中读取停止的周期。

公开(公告)号：US5978041A

公开(公告)日：1999-11-02

申请号：US547763

申请日：1995-10-24

申请人： Kouzou Masuda ,  Ikuya Arai ,  Sadao Tsuruga ,  Jiro Kawasaki ,  Tsuyoshi Sano ,  Tamotsu Nagabayashi ,  Ryuuichi Someya ,  Fumio Inoue ,  Kouji Kitou ,  Yasuhiro Imai ,  Masatoshi Hirose

发明人： Kouzou Masuda ,  Ikuya Arai ,  Sadao Tsuruga ,  Jiro Kawasaki ,  Tsuyoshi Sano ,  Tamotsu Nagabayashi ,  Ryuuichi Someya ,  Fumio Inoue ,  Kouji Kitou ,  Yasuhiro Imai ,  Masatoshi Hirose

IPC分类号： H04N5/12 ,  H04N5/44 ,  H04N5/445 ,  H04N5/45 ,  H04N5/52 ,  H04N5/57 ,  H04N5/18

CPC分类号： H04N5/126 ,  H04N5/44591 ,  H04N5/45 ,  H04N5/52 ,  H04N5/57 ,  H04N7/012

摘要： An image display system includes a display circuit which displays an image composed of a plurality of sub-images, an input circuit which inputs a certain image signal including at least one sub-image embedded in the certain image signal which is provided by at least one of fields and frames, a designating circuit which designates timings of composition positions of the sub-image on scan lines of the certain image, and one control circuit which controls at least one of an amplitude level and a DC level of image signals corresponding to an area of the sub-image detected by the timing designated by the designating circuit.

摘要翻译： 图像显示系统包括：显示由多个子图像构成的图像的显示电路;输入电路，其输入特定图像信号，所述输入电路包括嵌入在所述特定图像信号中的至少一个子图像，所述至少一个子图像由至少一个 指定电路，其指定该特定图像的扫描线上的子图像的合成位置的定时，以及一个控制电路，其控制对应于图像信号的图像信号的幅度电平和DC电平中的至少一个 由指定电路指定的定时检测到的子图像的区域。

公开(公告)号：US5396257A

公开(公告)日：1995-03-07

申请号：US889117

申请日：1992-05-26

申请人： Ryuuichi Someya ,  Fumio Inoue ,  Nobuaki Kabuto ,  Fumio Haruna ,  Takeshi Maruyama

发明人： Ryuuichi Someya ,  Fumio Inoue ,  Nobuaki Kabuto ,  Fumio Haruna ,  Takeshi Maruyama

IPC分类号： G06F3/153 ,  G09G5/395 ,  H04N5/57 ,  H04N9/12 ,  G09G1/00

CPC分类号： G09G5/395 ,  G06F3/153 ,  H04N5/57 ,  H04N9/12 ,  G09G2300/026 ,  G09G2320/0233 ,  G09G2320/0626

摘要： The present invention relates to a multiscreen display apparatus in which one large screen is formed by combining screens of a plurality of display units. The multiscreen display apparatus includes data converters respectively provided in the display units, the data converters receiving video signal data represented in a digital form and correcting the video signal data according to correction data obtained on the basis of display characteristics of the display units to make luminance or color shading of a plurality of divisional regions of the screen of each display unit uniform, and a control unit for controlling data correction operations of the plurality of data converters as a whole.

摘要翻译： 本发明涉及一种多画面显示装置，其中通过组合多个显示单元的屏幕形成一个大屏幕。 多画面显示装置包括分别设置在显示单元中的数据转换器，数据转换器接收以数字形式表示的视频信号数据，并根据基于显示单元的显示特性获得的校正数据校正视频信号数据，以使亮度 或每个显示单元的屏幕的多个分割区域的色彩均匀，以及用于整体控制多个数据转换器的数据校正操作的控制单元。

公开(公告)号：US09075043B2

公开(公告)日：2015-07-07

申请号：US14035541

申请日：2013-09-24

申请人： Toru Mizumoto ,  Fumio Inoue

发明人： Toru Mizumoto ,  Fumio Inoue

IPC分类号： G01N33/493 ,  G01N35/00 ,  G01N33/50

CPC分类号： G01N33/50 ,  G01N33/493 ,  G01N35/00603 ,  G01N35/00613 ,  G06F19/00 ,  G16H10/40

摘要： A sample analyzer includes: a first measurement part which performs measurement on a sample for a first measurement item; a second measurement part which performs a measurement on the sample for a second measurement item; an output section; and a controller configured to control the output section to output, when a time difference between a measurement on a sample performed by the first measurement part and a measurement on the sample performed by the second measurement part exceeds a predetermined time period, information based on an excess of the time difference.

摘要翻译： 样品分析器包括：对第一测量项目的样品进行测量的第一测量部件; 对第二测量项目的样本进行测量的第二测量部件; 输出部分; 以及控制器，其被配置为当所述第一测量部件执行的样本的测量与由所述第二测量部件执行的样本的测量之间的时间差超过预定时间段时，控制所述输出部分输出信息，所述信息基于 超时的时差。

公开(公告)号：US20080010819A1

公开(公告)日：2008-01-17

申请号：US11775294

申请日：2007-07-10

申请人： Hidehiro NAKAMURA ,  Akishi Nakaso ,  Shigeharu Arike ,  Fumio Inoue ,  Tetsuya Enomoto ,  Norio Moriike ,  Kousuke Hiroki

发明人： Hidehiro NAKAMURA ,  Akishi Nakaso ,  Shigeharu Arike ,  Fumio Inoue ,  Tetsuya Enomoto ,  Norio Moriike ,  Kousuke Hiroki

IPC分类号： H05K3/30

CPC分类号： H05K3/4617 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/3128 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/15183 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K3/0097 ,  H05K3/06 ,  H05K3/244 ,  H05K3/4038 ,  H05K3/4623 ,  H05K3/4632 ,  H05K3/4647 ,  H05K2201/0141 ,  H05K2201/0195 ,  H05K2201/0355 ,  H05K2201/0361 ,  H05K2201/096 ,  H05K2201/10378 ,  H05K2203/0152 ,  H05K2203/0156 ,  H05K2203/0384 ,  H05K2203/0733 ,  H05K2203/1536 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49165 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： The present invention provides a connection board that is formed by an insulating resin composition layer made of one layer or two or more layers and a connection conductor that is formed so as to pass through the insulating resin composition layer in its thickness direction at a position where a conductor circuit is connected, and a multi-layer wiring board, a substrate for semiconductor package and a semiconductor package using the connection board, and methods for manufacturing them.

摘要翻译： 本发明提供一种由一层或两层以上的绝缘树脂组合物层形成的连接板，以及形成为在其绝缘树脂组合物层的厚度方向上形成的连接导体， 连接导体电路，并且使用多层布线板，半导体封装用基板和使用该连接基板的半导体封装，以及其制造方法。

公开(公告)号：US07187072B2

公开(公告)日：2007-03-06

申请号：US10705706

申请日：2003-11-10

申请人： Naoki Fukutomi ,  Yoshiaki Tsubomatsu ,  Fumio Inoue ,  Toshio Yamazaki ,  Hirohito Ohhata ,  Shinsuke Hagiwara ,  Noriyuki Taguchi ,  Hiroshi Nomura

发明人： Naoki Fukutomi ,  Yoshiaki Tsubomatsu ,  Fumio Inoue ,  Toshio Yamazaki ,  Hirohito Ohhata ,  Shinsuke Hagiwara ,  Noriyuki Taguchi ,  Hiroshi Nomura

IPC分类号： H01L21/00

CPC分类号： H01L21/568 ,  H01L21/4803 ,  H01L21/56 ,  H01L21/561 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/4985 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/97 ,  H01L2221/68377 ,  H01L2224/16237 ,  H01L2224/2919 ,  H01L2224/32057 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/32503 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48247 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83001 ,  H01L2224/83102 ,  H01L2224/8319 ,  H01L2224/83385 ,  H01L2224/8381 ,  H01L2224/8385 ,  H01L2224/85001 ,  H01L2224/92125 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/07811 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15183 ,  H01L2924/15184 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/203 ,  H01L2924/351 ,  H05K3/20 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2224/83 ,  H01L2224/92247 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00015 ,  H01L2924/0002

摘要： A semiconductor package substrate is provided, which can meet the move toward high integration of semiconductors. A nickel layer is plated on an electroplated copper foil to form a wiring pattern. An LSI chip is mounted on the copper foil, and terminals of the LSI chip and the wiring pattern are connected by wire bonding, followed by sealing with a semiconductor-sealing epoxy resin. Only the copper foil is dissolved away with an alkali etchant to expose nickel. With a nickel stripper having low copper-dissolving power, the nickel layer is removed to expose the wiring pattern. A solder resist is coated, and a pattern is formed in such a way that connecting terminal portions are exposed. Solder balls are placed at the exposed portions of the wiring pattern and are then fused. The wiring pattern is connected to an external printed board via the solder balls.

摘要翻译： 提供了半导体封装基板，可以满足向半导体集成度高的趋势。 将镍层电镀在电镀铜箔上以形成布线图案。 将LSI芯片安装在铜箔上，通过引线接合连接LSI芯片和布线图案的端子，然后用半导体密封环氧树脂密封。 只有铜箔用碱蚀刻剂溶解掉才能暴露镍。 对于具有低铜溶力的镍剥离器，去除镍层以露出布线图案。 涂覆阻焊剂，并且以使连接端子部分露出的方式形成图案。 将焊球放置在布线图案的露出部分，然后熔合。 布线图案通过焊球与外部印刷电路板连接。

公开(公告)号：US07043860B2

公开(公告)日：2006-05-16

申请号：US10436106

申请日：2003-05-13

申请人： Fumio Inoue

发明人： Fumio Inoue

IPC分类号： A63F5/04

CPC分类号： G09F13/16

摘要： A symbol illuminator of game machines includes a wheel member having symbols at an outer circumferential surface thereof; a casing for the wheel member attached a printed circuit board having a plurality of illuminants; and a reflective frame member having enclosure walls expanding outwardly to a forward direction from a central part thereof, having a plurality of windows into which the illuminants are set, the illuminants being arranged so as to project inside a center part of the reflective frame member; and a projection part, having a reflective face, reflecting the light emitted by the illuminants toward at least the symbol from the inner side of the wheel member so that it can irradiate a reflex of a reflective frame member equally without spots to the symbol of wheel member and can reduce the number of the parts.

摘要翻译： 游戏机的符号照明器包括在其外周面具有符号的车轮构件; 用于车轮构件的壳体，其附接有具有多个发光体的印刷电路板; 以及反射框架构件，其具有从其中心部朝向前方向向外扩展的外壳壁，具有设置有所述发光体的多个窗口，所述发光体被布置成在所述反射框架构件的中心部分内突出; 以及具有反射面的突出部，其将由所述发光体发射的光朝向所述轮构件的内侧的至少符号反射，使得其可以将反射框架构件的反射相等地照射到轮的符号上 会员可以减少零件数量。

公开(公告)号：US06540227B2

公开(公告)日：2003-04-01

申请号：US09866618

申请日：2001-05-30

申请人： Fumio Inoue

发明人： Fumio Inoue

IPC分类号： A63B7100

CPC分类号： G07F17/3213 ,  Y10T29/53022 ,  Y10T29/53178 ,  Y10T74/19684

摘要： A case of a stepping motor is divided by a partition. One of divided portions of the case contains a rotor and a stator of the stepping motor. A small-sized drive gear is fixed to a drive shaft integrally rotated with the rotor. The drive gear is meshed with a larger gear of a transmission gear. This transmission gear includes a smaller gear integrally rotated with the larger gear. The smaller gear is meshed with a large-sized output gear fixed to an output shaft of the stepping motor. Two pairs of the reduction gear mechanisms transmit a rotation of the drive shaft to the output shaft in a reduced state.