Abstract:
Performance of the high resistance resistor, which is polysilicon, is improved by treating the surface of the polysilicon layer in mixed signal integrated circuits for ADSL (Asymmetric Digital Subscriber Line) broadband service application. This treated surface of the polysilicon layer will prevent ions in the resistor from out-diffusion when performing an annealing step after forming the resistor.
Abstract:
A method of fabricating shallow trench isolation. A silicon oxide layer is formed on a substrate. The silicon oxide layer is patterned and a portion of the substrate is removed to form a trench within the substrate. A liner oxide layer is formed on the sidewall of the trench. An insulating layer is formed on the substrate and filled in the trench. A portion of the insulating layer is removed by CMP to expose the silicon oxide layer. The silicon oxide layer is removed and the STI structure is completed.
Abstract:
The invention provides a chemical-mechanical polishing pad, which includes a plurality of annular grooves and a plurality of streamline grooves designed according to principles of the hydrodynamics. The streamline grooves of polishing pad are designed according to flow equations derived from source flow and vortex flow, and the streamline grooves of polishing pad uniformly distribute the slurry on the polishing pad. An angle and a depth of the streamline groove, which are calculated by boundary layer effect of the streamline groove function, are used to design an optimum structure for polishing pad.
Abstract:
A method for preventing the occurrence of poisoned trenches and vias in a dual damascene process that includes performing a densification process, such as an electron-beam process, on the surface of the exposed dielectric layer around the openings before the openings are filled with conductive material. The densified surface of the dielectric layer is able to efficiently prevent the occurrence of poisoned trenches and vias caused by the outgassing phenomena.
Abstract:
A chemical mechanical polishing machine and a fabrication process using the same. The chemical mechanical polishing machine comprises a retainer ring having a plurality of slurry passages at the bottom of the retainer ring. The retainer ring further comprises a circular path. By conducting the slurry through the slurry passages and the circular, a wafer is planarized within the chemical mechanical polishing machine.
Abstract:
A method for forming capacitor is proposed. The key point of the invention is that bottom plate and dielectric layer of capacitor are formed before metal interconnect is formed. Thus, thermal treatment of dielectric layer does not affect metal interconnect. Therefore, conventional fault that quality of dielectric layer is degraded by scant annealing is avoided, and then dielectric layer and metal interconnect can be optimized respectively. Obviously, the ultimate advantage of the proposed method is that not only breakdown voltage of dielectric layer is increased by annealing but also quality of metal interconnect is not affected by annealing. Therefore, an incidental advantage of the proposed method is that the method is beneficial to form both capacitor and metal interconnect.
Abstract:
A chemical mechanical polishing machine and a fabrication process using the same. The chemical mechanical polishing machine comprises a retainer ring having a plurality of slurry passages at the bottom of the retainer ring. The retainer ring further comprises a circular path. By conducting the slurry through the slurry passages and the circular, a wafer is planarized within the chemical mechanical polishing machine.
Abstract:
A method for effectively cleaning the slurry remnants left on a polishing pad after the completion of a chemical mechanical polish (CMP) process is provided. This method is able to substantially thoroughly clean away all of the slurry remnants left on the polishing pad. In the method of the invention, the first step is to prepare a cleaning agent which is a mixture of H.sub.2 O.sub.2, deionized water, an acid solution, and an alkaline solution mixed to a predetermined ratio. The cleaning agent is subsequently directed to a nozzle formed in the pad dresser. This allows the cleaning agent to be jetted forcibly onto the slurry remnants on the polishing pad so as to clean the slurry remnants away from the polishing pad. The cleaning agent can be provided with predetermined ratios for various kinds of slurries so that the cleaning agent can be adjusted to be either acid or alkaline in nature. This can allow an increase in the repellent force between the particles of the slurry remnants and the underlying polishing pad that is caused by the so-called zeta potential, thus allowing the slurry remnants to be more easily removed from the polishing pad.
Abstract:
A chemical-mechanical polishing process includes the steps of providing a semiconductor substrate having a first conductive line thereon, and then forming at least one dielectric layer over the substrate and the first conductive line. Next, a chemical-mechanical polishing method is used to polish the surface of the dielectric layer. Thereafter, a cap layer is formed over the polished dielectric layer. The method of forming the cap layer includes depositing silicon oxide using a chemical vapor deposition method with silicane (SiH4) or tetra-ethyl-ortho-silicate (TEOS) as the main reactive agent. Alternatively, the cap layer can be formed by depositing silicon nitride using a chemical vapor deposition method with silicane or silicon dichlorohydride (SiH2Cl2) as the main reactive agent. Finally, a via opening is formed through the dielectric layer and the cap layer, and a second conductive line that couples electrically with the first conductive line through the via opening.
Abstract:
A chemical-mechanical polishing process for forming a conductive interconnect includes the steps of providing a semiconductor substrate having a first conductive line thereon, and then forming at least one dielectric layer over the substrate and the first conductive line. Next, a chemical-mechanical polishing method is used to polish the surface of the dielectric layer. Thereafter, a cap layer is formed over the polished dielectric layer. The method of forming the cap layer includes depositing silicon oxide using a chemical vapor deposition method with silicane (SiH.sub.4) or tetra-ethyl-ortho-silicate (TEOS) as the main reactive agent. Alternatively, the cap layer can be formed by depositing silicon nitride using a chemical vapor deposition method with silicane or silicon dichlorohydride (SiH.sub.2Cl.sub.2) as the main reactive agent. Finally, a via opening is formed through the dielectric layer and the cap layer, and a second conductive line that couples electrically with the first conductive line through the via opening.