公开(公告)号：US07238576B2

公开(公告)日：2007-07-03

申请号：US10403122

申请日：2003-04-01

申请人： Masakazu Yamaguchi ,  Ichiro Omura ,  Wataru Saito ,  Takashi Shinohe ,  Hiromichi Ohashi

发明人： Masakazu Yamaguchi ,  Ichiro Omura ,  Wataru Saito ,  Takashi Shinohe ,  Hiromichi Ohashi

IPC分类号： H01L21/336

CPC分类号： H01L29/7803 ,  H01L29/0619 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/66712 ,  H01L29/7722 ,  H01L29/7802 ,  H01L29/7805 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7824

摘要： A semiconductor device comprises a drain layer of first conductivity type, drift layers of first and second conductivity types on the drain layer, an insulating film between the drift layers and contacting the drift layers, a first base layer of second conductivity type on a surface of the drift layer of first conductivity type, a source layer of first conductivity type selectively provided on a surface of the first base layer of second conductivity type, a gate insulating film on the first base layer of second conductivity type between the source layer and the drift layer, a gate electrode on the gate insulating film, a second base layer of second conductivity type on a surface of the drift layer, a first main electrode on the drain layer, and a second main electrode on the source layer, the first base layer and the second base layer.

摘要翻译： 半导体器件包括第一导电类型的漏极层，漏极层上的第一和第二导电类型的漂移层，漂移层之间的绝缘膜和与漂移层接触的第二导电类型的第一基底层， 第一导电类型的漂移层，选择性地设置在第二导电类型的第一基极层的表面上的第一导电类型的源极层，在源极层和漂移体之间的第二导电类型的第一基极层上的栅极绝缘膜 栅极绝缘膜上的栅电极，漂移层的表面上的第二导电类型的第二基极层，漏极层上的第一主电极和源极层上的第二主电极，第一基极层 和第二基层。

公开(公告)号：US5793065A

公开(公告)日：1998-08-11

申请号：US483325

申请日：1995-06-07

申请人： Takashi Shinohe ,  Kazuya Nakayama ,  Minami Takeuchi ,  Masakazu Yamaguchi ,  Mitsuhiko Kitagawa ,  Ichiro Omura ,  Akio Nakagawa

发明人： Takashi Shinohe ,  Kazuya Nakayama ,  Minami Takeuchi ,  Masakazu Yamaguchi ,  Mitsuhiko Kitagawa ,  Ichiro Omura ,  Akio Nakagawa

IPC分类号： H01L29/423 ,  H01L29/745 ,  H01L29/749 ,  H01L29/74 ,  H01L31/111

CPC分类号： H01L29/7455 ,  H01L29/42308 ,  H01L29/749

摘要： Disclosed herein is an insulated-gate thyristor comprising a base layer of a first conductivity type, having first and second major surfaces, a first main-electrode region of the first conductivity type, formed in the first major surface of the base layer, a second main-electrode region of a second conductivity type, formed in the second major surface of the base layer, at least a pair of grooves extending from the first main-electrode region into the base layer, and opposing each other and spaced apart by a predetermined distance, insulated gate electrodes formed within the grooves, and a turn-off insulated-gate transistor structure for releasing carriers of the second conductivity type from the base layer.

公开(公告)号：US06236069B1

公开(公告)日：2001-05-22

申请号：US09102360

申请日：1998-06-23

申请人： Takashi Shinohe ,  Kazuya Nakayama ,  Minami Takeuchi ,  Masakazu Yamaguchi ,  Mitsuhiko Kitagawa ,  Ichiro Omura ,  Akio Nakagawa

发明人： Takashi Shinohe ,  Kazuya Nakayama ,  Minami Takeuchi ,  Masakazu Yamaguchi ,  Mitsuhiko Kitagawa ,  Ichiro Omura ,  Akio Nakagawa

IPC分类号： H01L2974

CPC分类号： H01L29/7455 ,  H01L29/42308 ,  H01L29/749

摘要： Disclosed herein is an insulated-gate thyristor comprising a base layer of a first conductivity type, having first and second major surfaces, a first main-electrode region of the first conductivity type, formed in the first major surface of the base layer, a second main-electrode region of a second conductivity type, formed in the second major surface of the base layer, at least a pair of grooves extending from the first main-electrode region into the base layer, and opposing each other and spaced apart by a predetermined distance, insulated gate electrodes formed within the grooves, and a turn-off insulated-gate transistor structure for releasing carriers of the second conductivity type from the base layer.

摘要翻译： 本文公开了一种绝缘栅极晶闸管，其包括第一导电类型的基极层，具有第一和第二主表面，形成在基底层的第一主表面中的第一导电类型的第一主电极区域，第二导电类型的第二主表面 形成在基底层的第二主表面的第二导电类型的主电极区域，至少一对从第一主电极区域延伸到基底层中并且彼此相对并间隔开预定的凹槽 距离，形成在沟槽内的绝缘栅电极，以及用于从基层释放第二导电类型的载流子的关断绝缘栅晶体管结构。

公开(公告)号：US5464994A

公开(公告)日：1995-11-07

申请号：US291754

申请日：1994-08-16

申请人： Takashi Shinohe ,  Kazuya Nakayama ,  Minami Takeuchi ,  Masakazu Yamaguchi ,  Mitsuhiko Kitagawa ,  Ichiro Omura ,  Akio Nakagawa

发明人： Takashi Shinohe ,  Kazuya Nakayama ,  Minami Takeuchi ,  Masakazu Yamaguchi ,  Mitsuhiko Kitagawa ,  Ichiro Omura ,  Akio Nakagawa

IPC分类号： H01L29/423 ,  H01L29/745 ,  H01L29/749 ,  H01L29/74

CPC分类号： H01L29/7455 ,  H01L29/42308 ,  H01L29/749

摘要： Disclosed herein is an insulated-gate thyristor comprising a base layer of a first conductivity type, having first and second major surfaces, a first main-electrode region of the first conductivity type, formed in the first major surface of the base layer, a second main-electrode region of a second conductivity type, formed in the second major surface of the base layer, at least a pair of grooves extending from the first main-electrode region into the base layer, and opposing each other and spaced apart by a predetermined distance, insulated gate electrodes formed within the grooves, and a turn-off insulated-gate transistor structure for releasing carriers of the second conductivity type from the base layer.

摘要翻译： 本文公开了一种绝缘栅极晶闸管，其包括第一导电类型的基极层，具有第一和第二主表面，形成在基底层的第一主表面中的第一导电类型的第一主电极区域，第二导电类型的第二主表面 形成在基底层的第二主表面的第二导电类型的主电极区域，至少一对从第一主电极区域延伸到基底层中并且彼此相对并间隔开预定的凹槽 距离，形成在沟槽内的绝缘栅电极，以及用于从基层释放第二导电类型的载流子的关断绝缘栅晶体管结构。

公开(公告)号：US5381026A

公开(公告)日：1995-01-10

申请号：US760344

申请日：1991-09-16

申请人： Takashi Shinohe ,  Kazuya Nakayama ,  Minami Takeuchi ,  Masakazu Yamaguchi ,  Mitsuhiko Kitagawa ,  Ichiro Omura ,  Akio Nakagawa

发明人： Takashi Shinohe ,  Kazuya Nakayama ,  Minami Takeuchi ,  Masakazu Yamaguchi ,  Mitsuhiko Kitagawa ,  Ichiro Omura ,  Akio Nakagawa

IPC分类号： H01L29/423 ,  H01L29/745 ,  H01L29/749 ,  H01L27/08 ,  H01L29/74

CPC分类号： H01L29/7455 ,  H01L29/42308 ,  H01L29/749

摘要： Disclosed herein is an insulated-gate thyristor comprising a base layer of a first conductivity type, having first and second major surfaces, a first main-electrode region of the first conductivity type, formed in the first major surface of the base layer, a second main-electrode region of a second conductivity type, formed in the second major surface of the base layer, at least a pair of grooves extending from the first main-electrode region into the base layer, and opposing each other and spaced apart by a predetermined distance, insulated gate electrodes formed within the grooves, and a turn-off insulated-gate transistor structure for releasing carriers of the second conductivity type from the base layer.

公开(公告)号：US5962893A

公开(公告)日：1999-10-05

申请号：US586277

申请日：1996-01-16

申请人： Ichiro Omura ,  Takashi Shinohe

发明人： Ichiro Omura ,  Takashi Shinohe

IPC分类号： H01L21/04 ,  H01L29/24 ,  H01L29/417 ,  H01L29/739 ,  H01L29/772 ,  H01L29/78 ,  H01L29/786 ,  H01L31/108 ,  H01L31/113 ,  H01L29/47

CPC分类号： H01L29/66068 ,  H01L21/046 ,  H01L29/41741 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/7722 ,  H01L29/7802 ,  H01L29/7827 ,  H01L29/7839 ,  H01L29/78618 ,  H01L31/108 ,  H01L31/113 ,  H01L29/1608 ,  Y10S257/902

摘要： An n-semiconductor layer is arranged on a low-resistance n-substrate. A drain electrode is in ohmic contact with the n-substrate. A source electrode forms a Schottky junction with the n-semiconductor layer. A gate electrode is arranged adjacent to the source electrode on the n-semiconductor layer through a gate insulating film. When a voltage is applied to the gate electrode to lower the Schottky barrier height at the interface between the source electrode and the n-semiconductor layer, electrons are injected from the source electrode into the n-semiconductor layer, and a current flows in the semiconductor device. A diffusion layer which prevents a decrease in manufacturing time is not required to form in the n-semiconductor layer, and a channel which causes an increase in ON state voltage is not present.

摘要翻译： 在低电阻n衬底上设置n半导体层。 漏电极与n衬底欧姆接触。 源电极与n半导体层形成肖特基结。 栅极通过栅极绝缘膜与n型半导体层上的源电极相邻设置。 当向栅电极施加电压以降低源电极和n半导体层之间的界面处的肖特基势垒高度时，电子从源电极注入到n半导体层中，并且电流在半导体 设备。 不需要在n半导体层中形成防止制造时间的降低的扩散层，并且不存在导致ON状态电压增加的沟道。

公开(公告)号：US4791470A

公开(公告)日：1988-12-13

申请号：US63752

申请日：1987-06-22

申请人： Takashi Shinohe ,  Katsuhiko Takigami ,  Hiromichi Ohashi ,  Tsuneo Ogura ,  Masayuki Asaka

发明人： Takashi Shinohe ,  Katsuhiko Takigami ,  Hiromichi Ohashi ,  Tsuneo Ogura ,  Masayuki Asaka

IPC分类号： H01L29/423 ,  H01L29/74

CPC分类号： H01L29/7416 ,  H01L29/42308

摘要： A reverse conducting gate turn-off thyristor device in which a gate turn-off thyristor and a reverse conduction diode are integrally formed in the same semiconductor wafer is constituted in such a manner that a part of a gate electrode is arranged in an isolation region that is sandwiched by the gate turn-off thyristor section and the reverse conduction diode section.

摘要翻译： 在相同的半导体晶片中一体地形成栅极截止晶闸管和反向导通二极管的反向导通栅极截止晶闸管器件以这样的方式构成：栅电极的一部分被布置在隔离区 被栅极截止晶闸管部分和反向导通二极管部分夹在中间。

公开(公告)号：US4717940A

公开(公告)日：1988-01-05

申请号：US14608

申请日：1987-02-13

申请人： Takashi Shinohe ,  Katsuhiko Takigami ,  Hiromichi Ohashi ,  Akio Nakagawa

发明人： Takashi Shinohe ,  Katsuhiko Takigami ,  Hiromichi Ohashi ,  Akio Nakagawa

IPC分类号： H01L29/08 ,  H01L29/10 ,  H01L29/745 ,  H01L29/74

CPC分类号： H01L29/0839 ,  H01L29/102 ,  H01L29/7455

摘要： An MIS controlled gate turn-off thyristor includes a pnpn structure comprised of a first emitter layer, a first base layer, a second base layer and a second emitter layer, and a turn-off MIS transistor for short-circuiting the second base layer to the second emitter layer. A low impurity concentration layer is formed on the second base layer and the second emitter layer is so formed that it extends, through the low impurity concentration layer, into the second base layer. The MIS transistor is formed on the surface portion of said low impurity concentration layer.

摘要翻译： MIS控制栅极截止晶闸管包括由第一发射极层，第一基极层，第二基极层和第二发射极层构成的pnpn结构，以及用于将第二基极层短路的关断MIS晶体管 第二发射极层。 在第二基极层上形成低杂质浓度层，第二发射极层形成为通过低杂质浓度层延伸到第二基极层。 MIS晶体管形成在所述低杂质浓度层的表面部分上。

公开(公告)号：US5969400A

公开(公告)日：1999-10-19

申请号：US614340

申请日：1996-03-12

申请人： Takashi Shinohe ,  Yoshihiro Minami ,  Ichiro Omura

发明人： Takashi Shinohe ,  Yoshihiro Minami ,  Ichiro Omura

IPC分类号： H01L27/07 ,  H01L29/06 ,  H01L29/08 ,  H01L29/739 ,  H01L29/861 ,  H01L23/58

CPC分类号： H01L27/0761 ,  H01L29/0615 ,  H01L29/0834 ,  H01L29/7394 ,  H01L29/7395 ,  H01L29/8611 ,  H01L2924/0002

摘要： A semiconductor device includes a first semiconductor layer of a first conductivity type having first and second main surfaces, a second semiconductor layer of a second conductivity type selectively formed on the first main surface of the first semiconductor layer, the second semiconductor layer including a first region having a relatively high injection efficiency and a second region having a relatively low injection efficiency and the first region being surrounded by the second region, a third semiconductor layer of the first conductivity type formed on the second main surface of the first semiconductor layer, a first electrode selectively formed on the second semiconductor layer of the second conductivity type and connected to at least the first region, and a second electrode formed on the third semiconductor layer of the first conductivity type.

摘要翻译： 半导体器件包括具有第一和第二主表面的第一导电类型的第一半导体层，选择性地形成在第一半导体层的第一主表面上的第二导电类型的第二半导体层，第二半导体层包括第一区域 具有相对较高的注入效率和具有相对低的注入效率的第二区域，并且第一区域被第二区域包围，形成在第一半导体层的第二主表面上的第一导电类型的第三半导体层，第一 电极选择性地形成在第二导电类型的第二半导体层上并连接到至少第一区域，第二电极形成在第一导电类型的第三半导体层上。

公开(公告)号：US5910738A

公开(公告)日：1999-06-08

申请号：US628515

申请日：1996-04-05

申请人： Takashi Shinohe ,  Masakazu Yamaguchi ,  Kimihiro Hoshi

发明人： Takashi Shinohe ,  Masakazu Yamaguchi ,  Kimihiro Hoshi

IPC分类号： H03K17/042 ,  H03K17/687 ,  H03K17/785 ,  H03K3/00

CPC分类号： H03K17/785 ,  H03K17/04206

摘要： A semiconductor device includes a voltage-driven switching element having a cathode and an anode, in which a voltage is to be applied between the cathode and anode, a power-supply circuit connected between the cathode and anode of the voltage-driven switching element and comprising capacitors, resistors and a reverse current-low preventing diode, for generating an intermediate voltage, a charging switching element for charging a gate of the voltage-driven switching element, using the intermediate voltage generated by the power-supply circuit, a discharging switching element for discharging the gate of the voltage-driven switching element, and a photovoltaic element for generating a photovoltaic power to control to drive the charging switching element and the discharging switching element.

摘要翻译： 半导体器件包括具有阴极和阳极的电压驱动开关元件，其中在阴极和阳极之间施加电压，连接在电压驱动的开关元件的阴极和阳极之间的电源电路和 包括用于产生中间电压的电容器，电阻器和反向电流低阻抗二极管，使用由电源电路产生的中间电压对电压驱动的开关元件的栅极进行充电的充电开关元件，放电开关 用于对电压驱动的开关元件的栅极进行放电的元件，以及用于产生光伏功率以控制驱动充电开关元件和放电开关元件的光电元件。