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    Flat shaped semiconductor encapsulation
    4.
    发明授权
    Flat shaped semiconductor encapsulation 失效
    平面半导体封装

    公开(公告)号：US4300153A

    公开(公告)日：1981-11-10

    申请号：US190744

    申请日：1980-09-25

    申请人： Masao Hayakawa ,  Takamichi Maeda ,  Masao Kumura

    发明人： Masao Hayakawa ,  Takamichi Maeda ,  Masao Kumura

    IPC分类号： H01L21/56 ,  H01L23/31 ,  H01L23/28 ,  H01L23/02 ,  H01L39/02

    CPC分类号： H01L23/3121 ,  H01L21/56 ,  H01L2224/16

    摘要： Electrodes are formed on one major surface of a semiconductor chip and electrically connected to lead electrodes carried by a support substrate. A cover plate is fixed to the opposing major surface of the semiconductor chip to determine one major surface of semiconductor device. Remaining surfaces of the semiconductor chip are encapsulated by a resin mold. The cover plate comprises a flexible glass cloth impregnated with half cured epoxy resin.

    摘要翻译： 电极形成在半导体芯片的一个主表面上并电连接到由支撑衬底承载的引线电极。 盖板固定到半导体芯片的相对主表面以确定半导体器件的一个主表面。 半导体芯片的剩余表面被树脂模具封装。 盖板包括浸渍有半固化环氧树脂的柔性玻璃布。

    Multi-lead frame member with means for limiting mold spread
    5.
    发明授权
    Multi-lead frame member with means for limiting mold spread 失效
    多引线框架构件，用于限制模具扩展

    公开(公告)号：US4280132A

    公开(公告)日：1981-07-21

    申请号：US84542

    申请日：1979-10-15

    申请人： Masao Hayakawa ,  Takamichi Maeda ,  Masao Kumura

    发明人： Masao Hayakawa ,  Takamichi Maeda ,  Masao Kumura

    IPC分类号： H01L23/28 ,  H01L21/60 ,  H01L23/31 ,  H01L23/495 ,  H01L23/498 ,  H01L23/48 ,  H01L29/44 ,  H01L29/60

    CPC分类号： H01L23/3157 ,  H01L23/49541 ,  H01L23/49558 ,  H01L23/49838 ,  H01L2224/16 ,  Y10T29/49121

    摘要： Blocking members are provided for limiting mold spread over a desirable area while a semiconductor is molded. The blocking members are composed within a metallic layer together with metallic leads by photoetching techniques. The blocking members are positioned at four corners of an aperture in a predetermined pattern of generally radial fingers extending cantilever-wise inwardly beyond the periphery of the aperture. The semiconductor is adapted to engage bumps on the semiconductor to the metallic leads by wire bonding methods. Extended portions of the metallic leads may also function as the blocking members, with the metallic leads being positioned at the four corners of the aperture.

    摘要翻译： 提供了阻挡构件，用于在模制半导体时限制模具在所需区域上的扩展。 阻挡构件通过光刻技术与金属引线一起组成金属层。 阻挡构件定位在孔径的四个角部处，其以大致径向指状物的预定图案延伸，向内延伸超过孔的周边。 半导体适于通过引线接合方法将半导体上的凸块接合到金属引线。 金属引线的延伸部分也可以用作阻挡构件，金属引线位于孔的四个角处。

    Tape carrier semiconductor device
    7.
    发明授权
    Tape carrier semiconductor device 失效
    磁带载体半导体器件

    公开(公告)号：US5506444A

    公开(公告)日：1996-04-09

    申请号：US212786

    申请日：1994-03-15

    申请人： Yasunori Chikawa ,  Yoshiaki Honda ,  Katsunobu Mori ,  Naoyuki Tajima ,  Takaaki Tsuda ,  Takamichi Maeda ,  Mitsuaki Osono

    发明人： Yasunori Chikawa ,  Yoshiaki Honda ,  Katsunobu Mori ,  Naoyuki Tajima ,  Takaaki Tsuda ,  Takamichi Maeda ,  Mitsuaki Osono

    IPC分类号： H01L21/56 ,  H01L23/29 ,  H01L23/31 ,  H01L23/495 ,  H01L23/28

    CPC分类号： H01L21/56 ,  H01L23/293 ,  H01L23/3121 ,  H01L2924/0002

    摘要： In a semiconductor device of a tape carrier package type, the gap width between inner leads connected with a first edge side of a semiconductor chip set within a device mounting hole provided in the tape carrier is larger than the gap width between leads connected with a second edge side opposite to the first edge side of the semiconductor chip, and the gap length of device mounting hole between the first edge of the semiconductor chip and the first edge of the device mounting hole corresponding to the first edge of the semiconductor chip is smaller than the gap length between the second edge of the semiconductor chip and the second edge of the device mounting hole corresponding to the second edge of the semiconductor chip. Such structure enables an encapsulation resin to fill uniformly the device mounting hole, and the encapsulation resin after encapsulation has a shape of a designed dimension.

    摘要翻译： 在载带封装型的半导体器件中，与设置在带载体中的器件安装孔内的半导体芯片的与第一边缘侧连接的内部引线之间的间隙宽度大于与第二引线连接的引线之间的间隙宽度 边缘侧与半导体芯片的第一边缘侧相对，并且半导体芯片的第一边缘与对应于半导体芯片的第一边缘的器件安装孔的第一边缘之间的器件安装孔的间隙长度小于 半导体芯片的第二边缘与器件安装孔的与半导体芯片的第二边缘对应的第二边缘之间的间隙长度。 这样的结构能够使封装树脂均匀地填充装置安装孔，并且封装后的封装树脂具有设计尺寸的形状。