Reverse conducting thyristor with a planar-gate, buried-gate, or
recessed-gate structure
    7.
    发明授权
    Reverse conducting thyristor with a planar-gate, buried-gate, or recessed-gate structure 失效
    具有平面栅极,掩埋栅极或凹入栅极结构的反向导通晶闸管

    公开(公告)号:US5682044A

    公开(公告)日:1997-10-28

    申请号:US591420

    申请日:1996-01-19

    IPC分类号: H01L29/74 H01L31/111

    CPC分类号: H01L29/7416

    摘要: The present invention provides a reverse conducting (RC) thyristor of a planar-gate structure for low-and-medium power use which is relatively simple in construction because of employing a planar structure for each of thyristor and diode regions, permits simultaneous formation of the both region and have high-speed performance and a RC thyristor of a buried-gate or recessed-gate structure which has a high breakdown voltage by the use of a buried-gate or recessed-gate structure, permits simultaneous formation of thyristor and diode regions and high-speed, high current switching performance, and the RC thyristor of the planar-gate structure has a construction which comprises an SI thyristor or miniaturized GTO of a planar-gate structure in the thyristor region and an SI diode of a planar structure in the diode region, the diode region having at its cathode side a Schottky contact between n emitters or diode cathode shorted region and the thyristor region having at its anode side an SI anode shorted structure formed by p.sup.+ anode layers, wave-shaped anode layers or anode n.sup.+ layers; in the case of a high breakdown device, an n buffer layer is added; similarly the RC thyristor of the buried-gate or recessed-gate structure has a construction which comprises an SI thyristor of a buried-gate or recessed-gate structure at the thyristor region and an SI diode of the buried or recessed structure.

    摘要翻译: 本发明提供了一种用于中低功率使用的平面栅极结构的反向导通(RC)晶闸管,由于采用晶体管和二极管区域中的每一个的平面结构,其结构相对简单,允许同时形成 具有高速性能和通过使用掩埋栅极或凹入栅极结构具有高击穿电压的掩埋栅极或凹入栅极结构的RC晶闸管,允许同时形成晶闸管和二极管区域 和高速,高电流开关性能,并且平面栅极结构的RC晶闸管具有在晶闸管区域中包括SI晶闸管或平面栅极结构的小型化GTO以及平面结构的SI二极管的结构 二极管区域,二极管区域在其阴极侧具有n个发射极或二极管阴极短路区域之间的肖特基接触,并且在其阳极侧具有SI a的晶闸管区域 由p +阳极层,波形阳极层或阳极n +层形成的短路结构; 在高击穿装置的情况下,添加n缓冲层; 类似地,埋入栅极或凹入栅极结构的RC晶闸管具有包括在晶闸管区域处的掩埋栅极或凹入栅极结构的SI晶闸管和埋入或凹陷结构的SI二极管的结构。

    Semiconductor device
    10.
    发明授权
    Semiconductor device 失效
    半导体器件

    公开(公告)号:US06426521B1

    公开(公告)日:2002-07-30

    申请号:US09614274

    申请日:2000-07-12

    申请人: Masashi Yura

    发明人: Masashi Yura

    IPC分类号: H01L2974

    CPC分类号: H01L29/7392 H01L29/42312

    摘要: In a semiconductor device of self-extinguish type, in which a channel constituting a current path is controlled by a control voltage applied to a gate electrode, the channel is constructed between an n type cathode region 12 formed in one major surface of n silicon substrate 11 and p type anode region 15 formed in the other major surface of the silicon substrate is opened and closed by the control voltage applied to a gate region 14 as well as a guard region. The guard region is formed by p+ type guard regions 18 and 19 provided adjacent to the channels, and a p type auxiliary guard region 20 formed between the p+ type guard regions 18 and 19 and having a lower impurity concentration than that of the guard regions 18 and 19. During the conduction state, electrons are hardly diffuse laterally underneath the guard region, and therefore upon the turn-off operation, electrons can be taken out at a high speed. Since electrons are taken out uniformly, the electrical field is not concentrated and the semiconductor device is effectively prevented from being broken.

    摘要翻译: 在自熄灭型的半导体器件中,其中构成电流路径的沟道由施加到栅电极的控制电压控制,该沟道被构造在形成在n个硅衬底的一个主表面中的n型阴极区12之间 形成在硅衬底的另一个主表面中的p型阳极区域15被施加到栅极区域14的防护电压以及保护区域而被打开和闭合。 保护区域由与通道相邻设置的p +型保护区域18和19形成,并且形成在p +型保护区域18和19之间并且具有比防护区域18和19的杂质浓度低的p型辅助保护区域20。 在导通状态期间,电子几乎不在保护区域的下方横向扩散,因此在关断操作时,可以高速地取出电子。 由于均匀地取出电子,所以电场不集中,有效地防止了半导体器件的破损。