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    Nonvolatile memory with pedestals
    1.
    发明授权
    Nonvolatile memory with pedestals 有权
    具有基座的非易失性存储器

    公开(公告)号：US06787415B1

    公开(公告)日：2004-09-07

    申请号：US10402698

    申请日：2003-03-28

    申请人： Mei-Hua Chung ,  Ching-Hwa Chen ,  Vei-Han Chan

    发明人： Mei-Hua Chung ,  Ching-Hwa Chen ,  Vei-Han Chan

    IPC分类号： H01L21336

    CPC分类号： H01L27/11526 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11531

    摘要： Nonvolatile memory wordlines (160) are formed as sidewall spacers on sidewalls of row structures (280). Each row structure may contain floating and control gates (120, 140), or some other elements. Pedestals (340) are formed adjacent to the row structures before the conductive layer (160) for the wordlines is deposited. The pedestals are formed in the area of the contact openings (330.1) that will be etched in an overlying dielectric (310) to form contacts to the wordlines. The pedestals raise the top surface of the wordline layer near the contact openings, so the contact opening etch can be made shorter. The pedestals also increase the minimum thickness of the wordline layer near the contact openings, so the loss of the wordline layer during the etch of the contact openings becomes less critical, and the photolithographic tolerances required for patterning the contact openings can be relaxed. The pedestals can be dummy structures (they may have no electrical functionality).

    摘要翻译： 非易失性存储字字（160）形成为在行结构（280）的侧壁上的侧壁间隔物。 每个行结构可以包含浮动和控制门（120,140）或一些其它元件。 在放置用于字线的导电层（160）之前，与行结构相邻地形成基座（340）。 基座形成在接触开口（330.1）的将在上覆电介质（310）中被蚀刻以形成与字线的接触的区域中。 基座使接触开口附近的字线层的上表面升高，因此可以使接触开口蚀刻更短。 基座也增加了接触开口附近的字线层的最小厚度，因此在接触开口的蚀刻期间字线层的损失变得不那么关键，并且可以放宽图形化接触开口所需的光刻公差。 基座可以是虚拟结构（它们可能没有电气功能）。

    Method of forming ONO-type sidewall with reduced bird's beak
    3.
    发明申请
    Method of forming ONO-type sidewall with reduced bird's beak 有权
    用鸟喙形成ONO型侧壁的方法

    公开(公告)号：US20050227437A1

    公开(公告)日：2005-10-13

    申请号：US10821100

    申请日：2004-04-07

    申请人： Zhong Dong ,  Chuck Jang ,  Ching-Hwa Chen ,  Chunchieh Huang ,  Jin-Ho Kim ,  Vei-Han Chan ,  Chung Leung ,  Chia-Shun Hsiao ,  George Kovall ,  Steven Yang

    发明人： Zhong Dong ,  Chuck Jang ,  Ching-Hwa Chen ,  Chunchieh Huang ,  Jin-Ho Kim ,  Vei-Han Chan ,  Chung Leung ,  Chia-Shun Hsiao ,  George Kovall ,  Steven Yang

    IPC分类号： H01L21/28 ,  H01L21/336 ,  H01L29/423 ,  H01L29/51 ,  H01L29/788

    CPC分类号： H01L21/28273 ,  H01L29/42328 ,  H01L29/513 ,  H01L29/7881

    摘要： Conventional fabrication of sidewall oxide around an ONO-type memory cell stack usually produces Bird's Beak because prior to the fabrication, there is an exposed sidewall of the ONO-type memory cell stack that exposes side parts of a plurality of material layers respectively composed of different materials. Certain materials in the stack such as silicon nitrides are more difficult to oxidize than other materials in the stack such polysilicon. As a result oxidation does not proceed uniformly along the multi-layered height of the sidewall. The present disclosure shows how radical-based fabrication of sidewall dielectric can help to reduce the Bird's Beak formation. More specifically, it is indicated that short-lived oxidizing agents (e.g., atomic oxygen) are able to better oxidize difficult to oxidize materials such as silicon nitride and the it is indicated that the short-lived oxidizing agents alternatively or additionally do not diffuse as deeply through already oxidized layers of the sidewall such as silicon oxide layers. As a result, a more uniform sidewall dielectric can be fabricated with more uniform breakdown voltages along it height.

    摘要翻译： 通常在ONO型存储单元堆叠周围制造侧壁氧化物通常产生鸟喙，因为在制造之前，存在ONO型存储单元堆叠的暴露的侧壁，其暴露分别由不同的多个材料层组成的多个材料层的侧面部分 材料 堆叠中的某些材料如氮化硅比堆叠中的其它材料更难以氧化，这样的多晶硅。 结果，氧化不沿着侧壁的多层高度均匀地进行。 本公开显示了基于侧壁电介质的基于基础的制造有助于减少鸟喙形成。 更具体地，表明短寿命氧化剂（例如原子氧）能够更好地氧化难以氧化的材料如氮化硅，并且表明短寿命氧化剂交替地或另外不扩散为 深深地通过侧壁的已氧化层，例如氧化硅层。 结果，可以制造更均匀的侧壁电介质，沿其高度具有更均匀的击穿电压。

    Method of forming ONO-type sidewall with reduced bird's beak
    4.
    发明授权
    Method of forming ONO-type sidewall with reduced bird's beak 有权
    用鸟喙形成ONO型侧壁的方法

    公开(公告)号：US07910429B2

    公开(公告)日：2011-03-22

    申请号：US10821100

    申请日：2004-04-07

    申请人： Zhong Dong ,  Chuck Jang ,  Ching-Hwa Chen ,  Chunchieh Huang ,  Jin-Ho Kim ,  Vei-Han Chan ,  Chung Wai Leung ,  Chia-Shun Hsiao ,  George Kovall ,  Steven Ming Yang

    发明人： Zhong Dong ,  Chuck Jang ,  Ching-Hwa Chen ,  Chunchieh Huang ,  Jin-Ho Kim ,  Vei-Han Chan ,  Chung Wai Leung ,  Chia-Shun Hsiao ,  George Kovall ,  Steven Ming Yang

    IPC分类号： H01L21/336

    CPC分类号： H01L21/28273 ,  H01L29/42328 ,  H01L29/513 ,  H01L29/7881

    摘要： Conventional fabrication of sidewall oxide around an ONO-type memory cell stack usually produces Bird's Beak because prior to the fabrication, there is an exposed sidewall of the ONO-type memory cell stack that exposes side parts of a plurality of material layers respectively composed of different materials. Certain materials in the stack such as silicon nitrides are more difficult to oxidize than other materials in the stack such polysilicon. As a result oxidation does not proceed uniformly along the multi-layered height of the sidewall. The present disclosure shows how radical-based fabrication of sidewall dielectric can help to reduce the Bird's Beak formation. More specifically, it is indicated that short-lived oxidizing agents (e.g., atomic oxygen) are able to better oxidize difficult to oxidize materials such as silicon nitride and the it is indicated that the short-lived oxidizing agents alternatively or additionally do not diffuse as deeply through already oxidized layers of the sidewall such as silicon oxide layers. As a result, a more uniform sidewall dielectric can be fabricated with more uniform breakdown voltages along it height.

    摘要翻译： 通常在ONO型存储单元堆叠周围制造侧壁氧化物通常产生鸟喙，因为在制造之前，存在ONO型存储单元堆叠的暴露的侧壁，其暴露分别由不同的多个材料层组成的多个材料层的侧面部分 材料 堆叠中的某些材料如氮化硅比堆叠中的其它材料更难以氧化，这样的多晶硅。 结果，氧化不沿着侧壁的多层高度均匀地进行。 本公开显示了基于侧壁电介质的基于基础的制造有助于减少鸟喙形成。 更具体地，表明短寿命氧化剂（例如原子氧）能够更好地氧化难以氧化的材料如氮化硅，并且表明短寿命氧化剂交替地或另外不扩散为 深深地通过侧壁的已氧化层，例如氧化硅层。 结果，可以制造更均匀的侧壁电介质，沿其高度具有更均匀的击穿电压。

    Method of repairing deep subsurface defects in a silicon substrate that includes diffusing negatively charged ions into the substrate from a sacrificial oxide layer
    6.
    发明授权
    Method of repairing deep subsurface defects in a silicon substrate that includes diffusing negatively charged ions into the substrate from a sacrificial oxide layer 有权
    修复硅衬底中的深层地下缺陷的方法，其包括从牺牲氧化物层将带负电荷的离子扩散到衬底中

    公开(公告)号：US07851339B2

    公开(公告)日：2010-12-14

    申请号：US12128996

    申请日：2008-05-29

    申请人： Zhong Dong ,  Ching-Hwa Chen

    发明人： Zhong Dong ,  Ching-Hwa Chen

    IPC分类号： H01L21/225

    CPC分类号： H01L21/324 ,  H01L21/28167 ,  H01L21/28238 ,  H01L29/78

    摘要： Performance of field effect transistors and other channel dependent devices formed on a monocrystalline substrate is improved by carrying out a high temperature anneal in a nitrogen releasing atmosphere while the substrate is coated by a sacrificial oxide coating containing easily diffusible atoms that can form negatively charged ions and can diffuse deep into the substrate. In one embodiment, the easily diffusible atoms comprise at least 5% by atomic concentration of chlorine atoms in the sacrificial oxide coating and the nitrogen releasing atmosphere includes NO. The high temperature anneal is carried out for less than 10 hours at a temperature less than 1100° C.

    摘要翻译： 通过在氮气释放气氛中进行高温退火，同时通过包含容易扩散的原子的牺牲氧化物涂层涂覆基底，从而改善在单晶衬底上形成的场效应晶体管和其它通道相关器件的性能，所述牺牲氧化物涂层可形成带负电荷的离子， 可以深层扩散到底物中。 在一个实施方案中，容易扩散的原子在牺牲氧化物涂层中包含至少5％的原子浓度的氯原子，并且氮气释放气氛包括NO。 高温退火在低于1100℃的温度下进行少于10小时。

    Clean chemistry low-k organic polymer etch
    8.
    发明授权
    Clean chemistry low-k organic polymer etch 有权
    清洁化学低k有机聚合物蚀刻

    公开(公告)号：US06337277B1

    公开(公告)日：2002-01-08

    申请号：US09606842

    申请日：2000-06-28

    申请人： Wen-Ben Chou ,  Rajinder Dhindsa ,  Ching-Hwa Chen

    发明人： Wen-Ben Chou ,  Rajinder Dhindsa ,  Ching-Hwa Chen

    IPC分类号： H01L21302

    CPC分类号： H01L21/31138

    摘要： A method of cleanly etching an organic polymer layer disposed over a substrate is disclosed. The invention is particularly useful in damascene processing where openings are etched in the organic polymer layer to form interconnects. The method includes lowering the temperature of the substrate. The method also includes flowing H2O vapor over the organic polymer layer and condensing (or freezing) the H2O vapor on the organic polymer layer. The method additionally includes etching through the organic polymer layer and the condensed H2O vapor to form an opening having a side wall. The condensed (or frozen) H2O vapor is arranged to form a passivating film (of ice) along the side wall of the opening to protect the side wall from etching.

    摘要翻译： 公开了一种干净地蚀刻位于衬底上的有机聚合物层的方法。 本发明特别适用于在有机聚合物层中蚀刻开口以形成互连的镶嵌加工中。 该方法包括降低基板的温度。 该方法还包括将H 2 O蒸气流过有机聚合物层并将H 2 O蒸气冷凝（或冷冻）在有机聚合物层上。 该方法还包括通过有机聚合物层和冷凝的H 2 O蒸气蚀刻以形成具有侧壁的开口。 冷凝（或冷冻的）H 2 O蒸气被布置成沿着开口的侧壁形成钝化膜（冰），以保护侧壁免受蚀刻。

    Fabrication of integrated circuits with isolation trenches
    9.
    发明授权
    Fabrication of integrated circuits with isolation trenches 有权
    具有隔离沟槽的集成电路制造

    公开(公告)号：US07807577B2

    公开(公告)日：2010-10-05

    申请号：US12196067

    申请日：2008-08-21

    申请人： Zhong Dong ,  Ching-Hwa Chen

    发明人： Zhong Dong ,  Ching-Hwa Chen

    IPC分类号： H01L21/311

    CPC分类号： H01L21/76224 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7881 ,  H01L29/792

    摘要： After forming a stack of layers (130, 140, 310) for a transistor or a charge-trapping memory over an active area (110), and before etching isolation trenches (160) in the semiconductor substrate (120) with the stack as a mask, spacers (610) are formed on the stack's sidewalls. The trench etch may include a lateral component, so the top edges of the trenches may be laterally recessed to a position under the spacers or the stack. After the etch, the spacers are removed to facilitate filling the trenches with the dielectric (to eliminate voids at the recessed top edges of the trenches). Other embodiments are also provided.

    摘要翻译： 在有源区（110）上形成用于晶体管或电荷俘获存储器的层叠层（130,140,​​310）之后，以及在将堆叠中的隔离沟槽（160）刻蚀为半导体衬底 掩模，间隔物（610）形成在堆叠的侧壁上。 沟槽蚀刻可以包括侧向部件，因此沟槽的顶部边缘可以横向凹入到间隔件或堆叠下的位置。 在蚀刻之后，去除间隔物以便于用电介质填充沟槽（以消除沟槽的凹陷顶部边缘处的空隙）。 还提供了其他实施例。

    PHOTOLITHOGRAPHIC PATTERNING OF ARRAYS OF PILLARS HAVING WIDTHS AND LENGTHS BELOW THE EXPOSURE WAVELENGTHS
    10.
    发明申请
    PHOTOLITHOGRAPHIC PATTERNING OF ARRAYS OF PILLARS HAVING WIDTHS AND LENGTHS BELOW THE EXPOSURE WAVELENGTHS 审中-公开
    具有宽度和长度的支柱阵列的平面图的曝光波长

    公开(公告)号：US20100068658A1

    公开(公告)日：2010-03-18

    申请号：US12233298

    申请日：2008-09-18

    申请人： Fenghong Zhang ,  Jian Xu ,  Xinyu Zhang ,  Ching-Hwa Chen ,  Leu Mei

    发明人： Fenghong Zhang ,  Jian Xu ,  Xinyu Zhang ,  Ching-Hwa Chen ,  Leu Mei

    IPC分类号： G03F7/20

    CPC分类号： G03F1/00 ,  G03F7/70558

    摘要： A pillar array is printed in positive photoresist using an optical mask (108) having an array of features (310) corresponding to the pillars. The pillars' width/length dimensions are below the exposure wavelength. Superior results can be achieved (less peeling off of the pillars and less overexposure at the center of each pillar) if the mask features (310) are downsized relative to the pillars' target sizes, and the exposure energy is reduced. Negative photoresist (with a dark field mask) can be used, and can provide good results (in terms of pillars peeling-off) if the combined area of the features (410) corresponding to the pillars is smaller than the area between the features (410).

    摘要翻译： 使用具有对应于柱的特征阵列（310）的光学掩模（108）将柱阵列印刷在正性光致抗蚀剂中。 支柱的宽度/长度尺寸低于曝光波长。 如果掩模特征（310）相对于柱体的目标尺寸减小，并且曝光能量减小，则可以实现优异的结果（较少的柱的剥离和在每个柱的中心处较少的过度曝光）。 如果与柱相对应的特征（410）的组合面积小于特征之间的面积，则可以使用负光致抗蚀剂（具有暗场掩模），并且可以提供良好的结果（在柱子剥离方面） 410）。