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    Semiconductor integrated circuits including optoelectronic device for changing optical phase
    2.
    发明授权
    Semiconductor integrated circuits including optoelectronic device for changing optical phase 有权
    包括用于改变光学相位的光电器件的半导体集成电路

    公开(公告)号：US08422834B2

    公开(公告)日：2013-04-16

    申请号：US12746167

    申请日：2008-06-03

    Applicant: Jeong-Woo Park ,  Gyung-Ock Kim ,  Mi-Ran Park ,  Jong-Bum You

    Inventor： Jeong-Woo Park ,  Gyung-Ock Kim ,  Mi-Ran Park ,  Jong-Bum You

    IPC: G02F1/035 ,  G02F1/295 ,  G02B6/10 ,  G02B6/12

    CPC classification number: G02F1/218 ,  G02F2001/212 ,  G02F2201/302

    Abstract: Provided is a semiconductor integrated circuit. The semiconductor integrated circuit includes a semiconductor pattern disposed on a substrate and including an optical waveguide part and a pair of recessed portions. The optical waveguide part has a thickness ranging from about 0.05 μm to about 0.5 μm. The recessed portions are disposed on both sides of the optical waveguide part and have a thinner thickness than the optical waveguide part. A first doped region and a second doped region are disposed in the recessed portions, respectively. The first and second doped regions are doped with a first conductive type dopant and a second conductive type dopant, respectively. An intrinsic region is formed in at least the optical waveguide part to contact the first and second doped regions.

    Abstract translation: 提供了一种半导体集成电路。 半导体集成电路包括设置在基板上并且包括光波导部分和一对凹部的半导体图案。 光波导部分的厚度范围为约0.05μm至约0.5μm。 凹部设置在光波导部分的两侧，并且具有比光波导部分更薄的厚度。 第一掺杂区域和第二掺杂区域分别设置在凹部中。 第一和第二掺杂区域分别掺杂有第一导电型掺杂剂和第二导电型掺杂剂。 在至少光波导部分中形成本征区域以接触第一和第二掺杂区域。

    SEMICONDUCTOR INTEGRATED CIRCUITS INCLUDING OPTOELECTRONIC DEVICE FOR CHANGING OPTICAL PHASE
    3.
    发明申请
    SEMICONDUCTOR INTEGRATED CIRCUITS INCLUDING OPTOELECTRONIC DEVICE FOR CHANGING OPTICAL PHASE 有权
    半导体集成电路，包括用于改变光学相位的光电器件

    公开(公告)号：US20100278477A1

    公开(公告)日：2010-11-04

    申请号：US12746167

    申请日：2008-06-03

    Applicant: Jeong-Woo Park ,  Gyung-Ock Kim ,  Mi-Ran Park ,  Jong-Bum You

    Inventor： Jeong-Woo Park ,  Gyung-Ock Kim ,  Mi-Ran Park ,  Jong-Bum You

    IPC: G02B6/12 ,  G02B6/34

    CPC classification number: G02F1/218 ,  G02F2001/212 ,  G02F2201/302

    Abstract: Provided is a semiconductor integrated circuit. The semiconductor integrated circuit includes a semiconductor pattern disposed on a substrate and including an optical waveguide part and a pair of recessed portions. The optical waveguide part has a thickness ranging from about 0.05 m to about 0.5 μm. The recessed portions are disposed on both sides of the optical waveguide part and have a thinner thickness than the optical waveguide part. A first doped region and a second doped region are disposed in the recessed portions, respectively. The first and second doped regions are doped with a first conductive type dopant and a second conductive type dopant, respectively. An intrinsic region is formed in at least the optical waveguide part to contact the first and second doped regions.

    Abstract translation: 提供了一种半导体集成电路。 半导体集成电路包括设置在基板上并且包括光波导部分和一对凹部的半导体图案。 光波导部分的厚度范围为约0.05μm至约0.5μm。 凹部设置在光波导部分的两侧，并且具有比光波导部分更薄的厚度。 第一掺杂区域和第二掺杂区域分别设置在凹部中。 第一和第二掺杂区域分别掺杂有第一导电型掺杂剂和第二导电型掺杂剂。 在至少光波导部分中形成本征区域以接触第一和第二掺杂区域。

    SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME
    4.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME 有权
    半导体器件及其形成方法

    公开(公告)号：US20100301448A1

    公开(公告)日：2010-12-02

    申请号：US12847974

    申请日：2010-07-30

    Applicant: O-Kyun KWON ,  Dong-Woo Suh ,  Junghyung Pyo ,  Gyung-Ock Kim

    Inventor： O-Kyun KWON ,  Dong-Woo Suh ,  Junghyung Pyo ,  Gyung-Ock Kim

    IPC: H01L27/12

    CPC classification number: H01L21/76267 ,  H01L21/76283

    Abstract: Provided is a semiconductor and a method for forming the same. The method includes forming a buried insulating layer locally in a substrate. The substrate is etched to form an opening exposing the buried insulating layer, and a silicon pattern spaced in at least one direction from the substrate is formed on the buried insulating layer. A first insulating layer is formed to enclose the silicon pattern.

    Abstract translation: 提供半导体及其形成方法。 该方法包括在衬底中局部形成掩埋绝缘层。 蚀刻衬底以形成露出掩埋绝缘层的开口，并且在掩埋绝缘层上形成从衬底至少一个方向间隔开的硅图案。 形成第一绝缘层以包围硅图案。

    Waveguide structure
    5.
    发明授权
    Waveguide structure 失效
    波导结构

    公开(公告)号：US07693384B2

    公开(公告)日：2010-04-06

    申请号：US12111884

    申请日：2008-04-29

    Applicant: Jong-Moo Lee ,  Duk-Jun Kim ,  O-Kyun Kwon ,  Gyung-Ock Kim

    Inventor： Jong-Moo Lee ,  Duk-Jun Kim ,  O-Kyun Kwon ,  Gyung-Ock Kim

    IPC: G02B6/10

    CPC classification number: G02B6/12007

    Abstract: A waveguide structure is provided. The waveguide structure includes: a slot channel waveguide including first and second patterns, which are spaced apart from each other to define a slot; a first upper layer covering at least a portion of the slot channel waveguide; and a second upper layer covering the remaining portion of the slot channel waveguide. A thermo-optic coefficient (TOC) of the channel waveguide times a TOC of the second upper layer is a negative number.

    Abstract translation: 提供了一种波导结构。 波导结构包括：缝隙通道波导，包括第一和第二图案，它们彼此间隔开以限定狭槽; 覆盖所述槽道波导的至少一部分的第一上层; 以及覆盖槽道波导的剩余部分的第二上层。 通道波导的热光系数（TOC）乘以第二上层的TOC是负数。

    Semiconductor device and method for forming the same
    9.
    发明授权
    Semiconductor device and method for forming the same 有权
    半导体装置及其形成方法

    公开(公告)号：US08183633B2

    公开(公告)日：2012-05-22

    申请号：US12847974

    申请日：2010-07-30

    Applicant: O-Kyun Kwon ,  Dong-Woo Suh ,  Jung-Hyung Pyo ,  Gyung-Ock Kim

    Inventor： O-Kyun Kwon ,  Dong-Woo Suh ,  Jung-Hyung Pyo ,  Gyung-Ock Kim

    IPC: H01L27/12

    CPC classification number: H01L21/76267 ,  H01L21/76283

    Abstract: Provided is a semiconductor and a method for forming the same. The method includes forming a buried insulating layer locally in a substrate. The substrate is etched to form an opening exposing the buried insulating layer, and a silicon pattern spaced in at least one direction from the substrate is formed on the buried insulating layer. A first insulating layer is formed to enclose the silicon pattern.

    Abstract translation: 提供半导体及其形成方法。 该方法包括在衬底中局部形成掩埋绝缘层。 蚀刻衬底以形成露出掩埋绝缘层的开口，并且在掩埋绝缘层上形成从衬底至少一个方向间隔开的硅图案。 形成第一绝缘层以包围硅图案。

    Semiconductor integrated circuits including grating coupler for optical communication and methods of forming the same
    10.
    发明授权
    Semiconductor integrated circuits including grating coupler for optical communication and methods of forming the same 有权
    包括用于光通信的光栅耦合器的半导体集成电路及其形成方法

    公开(公告)号：US08165437B2

    公开(公告)日：2012-04-24

    申请号：US12684677

    申请日：2010-01-08

    Applicant: Jung-Hyung Pyo ,  O-Kyun Kwon ,  Gyung-Ock Kim

    Inventor： Jung-Hyung Pyo ,  O-Kyun Kwon ,  Gyung-Ock Kim

    IPC: G02B6/34 ,  G02B6/42

    CPC classification number: G02B6/34 ,  G02B6/124 ,  G02B6/30

    Abstract: Provided are semiconductor integrated circuits including a grating coupler for optical communication and methods of forming the same. The semiconductor integrated circuit includes: a cladding layer disposed on a semiconductor substrate; a grating coupler including an optical waveguide on the cladding layer and a grating on the optical waveguide; and at least one reflector formed in the cladding layer below the grating.

    Abstract translation: 提供了包括用于光通信的光栅耦合器的半导体集成电路及其形成方法。 半导体集成电路包括：设置在半导体衬底上的覆层; 包括在所述包层上的光波导的光栅耦合器和所述光波导上的光栅; 以及形成在光栅下方的包覆层中的至少一个反射器。

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