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    Semiconductor assemblies with flow controller to mitigate ingression of mold material
    3.
    发明授权
    Semiconductor assemblies with flow controller to mitigate ingression of mold material 有权

    公开(公告)号：US11515222B2

    公开(公告)日：2022-11-29

    申请号：US17139073

    申请日：2020-12-31

    申请人： Micron Technology, Inc.

    发明人： Lu Fu Lin ,  Yung Sheng Zou ,  Chong Leong Gan ,  Li Jao ,  Min Hua Chung

    IPC分类号： H01L25/00 ,  H01L23/24 ,  H01L25/065 ,  H01L25/18 ,  H01L21/56

    摘要： Semiconductor devices having flow controllers configured to reduce mitigation of mold material between stacked layers, and associated systems and methods, are disclosed herein. In some embodiments, the semiconductor device includes a package substrate that has first and second surfaces. First and second die stacks are formed on the first surface and are adjacent to each other. A portion of the first surface extends between the first and second die stacks. A layer of material is adhered to top surfaces of the first and second die stacks and extends at a distance above the package substrate to form a tunnel between the layer of material, opposing sidewalls of the die stacks, and the package substrate. The semiconductor device further includes a flow controller that is adhered to at least a portion of the first surface inside the tunnel that reduces a cross-sectional surface area of at least a portion of the tunnel.

    RADIATION PROTECTION FOR SEMICONDUCTOR DEVICES AND ASSOCIATED SYSTEMS AND METHODS
    4.
    发明申请
    RADIATION PROTECTION FOR SEMICONDUCTOR DEVICES AND ASSOCIATED SYSTEMS AND METHODS 有权

    公开(公告)号：US20230062160A1

    公开(公告)日：2023-03-02

    申请号：US17718140

    申请日：2022-04-11

    申请人： Micron Technology, Inc.

    发明人： Chong Leong Gan ,  Min Hua Chung ,  Yung Sheng Zou ,  Lu Fu Lin ,  Li Jao

    IPC分类号： H01L23/552 ,  H01L23/06 ,  H01L25/065

    摘要： Semiconductor devices and associated systems and methods are disclosed herein. In some embodiments, the semiconductor devices include a package substrate, a stack of dies carried by the package substrate, and one or more radiation shields configured to absorb neutrons from neutron radiation incident on the semiconductor device. The radiation shields can include one or more walls attached to a perimeter portion of the package substrate at least partially surrounding the stack of dies and/or a lid carried over the stack of dies. Each of the radiation shields can include hydrocarbon materials, boron, lithium, gadolinium, cadmium, and like materials that effectively absorb neutrons from neutron radiation. In some embodiments, the semiconductor devices also include a molding material over the stack of dies and the radiation shields, and a hydrocarbon coating over an external surface of the mold material.

    SEMICONDUCTOR ASSEMBLIES WITH FLOW CONTROLLER TO MITIGATE INGRESSION OF MOLD MATERIAL
    5.
    发明申请
    SEMICONDUCTOR ASSEMBLIES WITH FLOW CONTROLLER TO MITIGATE INGRESSION OF MOLD MATERIAL 有权

    公开(公告)号：US20220208625A1

    公开(公告)日：2022-06-30

    申请号：US17139073

    申请日：2020-12-31

    申请人： Micron Technology, Inc.

    发明人： Lu Fu Lin ,  Yung Sheng Zou ,  Chong Leong Gan ,  Li Jao ,  Min Hua Chung

    IPC分类号： H01L23/24 ,  H01L25/065 ,  H01L25/18 ,  H01L25/00 ,  H01L21/56

    摘要： Semiconductor devices having flow controllers configured to reduce mitigation of mold material between stacked layers, and associated systems and methods, are disclosed herein. In some embodiments, the semiconductor device includes a package substrate that has first and second surfaces. First and second die stacks are formed on the first surface and are adjacent to each other. A portion of the first surface extends between the first and second die stacks. A layer of material is adhered to top surfaces of the first and second die stacks and extends at a distance above the package substrate to form a tunnel between the layer of material, opposing sidewalls of the die stacks, and the package substrate. The semiconductor device further includes a flow controller that is adhered to at least a portion of the first surface inside the tunnel that reduces a cross-sectional surface area of at least a portion of the tunnel.