公开(公告)号：US20150023117A1

公开(公告)日：2015-01-22

申请号：US14507452

申请日：2014-10-06

Applicant: Micron Technology, Inc.

Inventor： Russel J. Baker

IPC: G11C7/16

CPC classification number: G11C7/22 ,  G11C5/147 ,  G11C7/065 ,  G11C7/16 ,  G11C8/08 ,  G11C11/5642 ,  G11C11/5678 ,  G11C13/0004 ,  G11C2211/5634 ,  G11C2211/5644 ,  H03M3/43 ,  H03M3/456

Abstract: A memory device that, in certain embodiments, includes a plurality of memory elements connected to a bit-line and a delta-sigma modulator with a digital output and an analog input, which may be connected to the bit-line. In some embodiments, the delta-sigma modulator includes a circuit with first and second inputs and an output. The circuit is configured to combine (add or subtract) input signals. The first input may be connected to the analog input. The delta-sigma modulator may also include an integrator connected to the output of the circuit, an analog-to-digital converter with an input connected to an output of the integrator and an output connected to the digital output, and a digital-to-analog converter with an input connected to the output of the analog-to-digital converter and an output connected to the second input of the circuit.

Abstract translation: 在某些实施例中，存储器件包括连接到位线的多个存储器元件和可以连接到位线的具有数字输出和模拟输入的Δ-Σ调制器。 在一些实施例中，Δ-Σ调制器包括具有第一和第二输入和输出的电路。 该电路被配置为组合（加或减）输入信号。 第一个输入可以连接到模拟输入。 Δ-Σ调制器还可以包括连接到电路的输出的积分器，具有连接到积分器的输出的输入和连接到数字输出的输出的模数转换器，以及数模转换器， 模拟转换器，其输入连接到模数转换器的输出端，输出端连接到电路的第二输入端。

公开(公告)号：US08879327B2

公开(公告)日：2014-11-04

申请号：US14215660

申请日：2014-03-17

Applicant: Micron Technology, Inc.

Inventor： Russel J. Baker

IPC: G11C11/34 ,  G11C7/02 ,  G11C7/04

CPC classification number: G11C16/06 ,  G11C5/147 ,  G11C7/02 ,  G11C7/067 ,  G11C7/1006 ,  G11C7/1051 ,  G11C7/106 ,  G11C7/1069 ,  G11C13/0004 ,  G11C13/004 ,  H03M3/39 ,  H03M3/456 ,  H04N5/357 ,  H04N5/376

Abstract: Systems, methods, and devices are disclosed, including an electronic device that includes a first data location, a quantizing circuit, and a reference current source, all coupled to an electrical conductor. The reference current source may include a current mirror with a side coupled to the electrical conductor and a second data location coupled to another side of the current mirror.

公开(公告)号：US09641193B2

公开(公告)日：2017-05-02

申请号：US14849280

申请日：2015-09-09

Applicant: Micron Technology, Inc.

Inventor： Russel J. Baker

IPC: G11C7/06 ,  H03M3/00 ,  G11C7/02 ,  G11C7/04 ,  G11C7/16 ,  G11C8/08 ,  G11C8/10 ,  G11C11/56 ,  G11C13/00 ,  G11C27/00 ,  H04N5/378 ,  G11C16/28

CPC classification number: H03M3/456 ,  G11C7/02 ,  G11C7/04 ,  G11C7/06 ,  G11C7/065 ,  G11C7/16 ,  G11C8/08 ,  G11C8/10 ,  G11C11/5642 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0028 ,  G11C13/004 ,  G11C16/28 ,  G11C27/005 ,  G11C2013/0054 ,  G11C2211/5645 ,  H03M3/39 ,  H03M3/43 ,  H04N5/378

Abstract: Methods, systems and devices are disclosed, such as an electronic device that includes a plurality of data locations and a delta-sigma modulator. In some embodiments, the delta-sigma modulator includes a preamplifier coupled to the data locations and a latch coupled to the preamplifier.

公开(公告)号：US09449664B2

公开(公告)日：2016-09-20

申请号：US15074759

申请日：2016-03-18

Applicant: Micron Technology, Inc.

Inventor： Russel J. Baker

IPC: G11C5/14 ,  G11C7/22

CPC classification number: G11C7/22 ,  G11C5/147 ,  G11C7/065 ,  G11C7/16 ,  G11C8/08 ,  G11C11/5642 ,  G11C11/5678 ,  G11C13/0004 ,  G11C2211/5634 ,  G11C2211/5644 ,  H03M3/43 ,  H03M3/456

Abstract: A system including a processor and a memory device. The memory device includes a memory array having a plurality of memory elements connected to a bit-line and a quantizing circuit. The quantizing circuit includes a combination circuit configured to combine an analog input signal with an analog feedback signal to produce a delta signal. The quantizing circuit also includes an integrator configured to receive and integrate the delta signal to produce a sigma signal. The quantizing circuit also includes an analog-to-digital converter configured to receive the sigma signal and compare the sigma signal with a reference signal to produce a digital output signal.

Abstract translation: 一种包括处理器和存储器件的系统。 存储器件包括具有连接到位线和量化电路的多个存储元件的存储器阵列。 量化电路包括组合电路，其被配置为将模拟输入信号与模拟反馈信号组合以产生增量信号。 量化电路还包括被配置为接收和积分增量信号以产生Σ信号的积分器。 量化电路还包括配置成接收西格玛信号并将西格玛信号与参考信号进行比较以产生数字输出信号的模拟 - 数字转换器。

公开(公告)号：US09299405B2

公开(公告)日：2016-03-29

申请号：US14507452

申请日：2014-10-06

Applicant: Micron Technology, Inc.

Inventor： Russel J. Baker

IPC: G11C5/14 ,  G11C7/16 ,  G11C11/56 ,  G11C13/00 ,  H03M3/00

CPC classification number: G11C7/22 ,  G11C5/147 ,  G11C7/065 ,  G11C7/16 ,  G11C8/08 ,  G11C11/5642 ,  G11C11/5678 ,  G11C13/0004 ,  G11C2211/5634 ,  G11C2211/5644 ,  H03M3/43 ,  H03M3/456

Abstract: A memory device that, in certain embodiments, includes a plurality of memory elements connected to a bit-line and a delta-sigma modulator with a digital output and an analog input, which may be connected to the bit-line. In some embodiments, the delta-sigma modulator includes a circuit with first and second inputs and an output. The circuit is configured to combine (add or subtract) input signals. The first input may be connected to the analog input. The delta-sigma modulator may also include an integrator connected to the output of the circuit, an analog-to-digital converter with an input connected to an output of the integrator and an output connected to the digital output, and a digital-to-analog converter with an input connected to the output of the analog-to-digital converter and an output connected to the second input of the circuit.

公开(公告)号：US08854899B2

公开(公告)日：2014-10-07

申请号：US14076908

申请日：2013-11-11

Applicant: Micron Technology Inc.

Inventor： Russel J. Baker

IPC: G11C5/14 ,  G11C11/56 ,  G11C7/16 ,  G11C13/00 ,  H03M3/00

CPC classification number: G11C7/22 ,  G11C5/147 ,  G11C7/065 ,  G11C7/16 ,  G11C8/08 ,  G11C11/5642 ,  G11C11/5678 ,  G11C13/0004 ,  G11C2211/5634 ,  G11C2211/5644 ,  H03M3/43 ,  H03M3/456

Abstract: A memory device that, in certain embodiments, includes a plurality of memory elements connected to a bit-line and a delta-sigma modulator with a digital output and an analog input, which may be connected to the bit-line. In some embodiments, the delta-sigma modulator includes a circuit with first and second inputs and an output. The circuit is configured to combine (add or subtract) input signals. The first input may be connected to the analog input. The delta-sigma modulator may also include an integrator connected to the output of the circuit, an analog-to-digital converter with an input connected to an output of the integrator and an output connected to the digital output, and a digital-to-analog converter with an input connected to the output of the analog-to-digital converter and an output connected to the second input of the circuit.

Abstract translation: 在某些实施例中，存储器件包括连接到位线的多个存储器元件和可以连接到位线的具有数字输出和模拟输入的Δ-Σ调制器。 在一些实施例中，Δ-Σ调制器包括具有第一和第二输入和输出的电路。 该电路被配置为组合（加或减）输入信号。 第一个输入可以连接到模拟输入。 Δ-Σ调制器还可以包括连接到电路的输出的积分器，具有连接到积分器的输出的输入和连接到数字输出的输出的模数转换器，以及数模转换器， 模拟转换器，其输入连接到模数转换器的输出端，输出端连接到电路的第二输入端。

公开(公告)号：US20170069363A1

公开(公告)日：2017-03-09

申请号：US15269418

申请日：2016-09-19

Applicant: Micron Technology, Inc.

Inventor： Russel J. Baker

IPC: G11C7/22 ,  G11C7/16 ,  G11C5/14 ,  G11C7/06 ,  G11C8/08

CPC classification number: G11C7/22 ,  G11C5/147 ,  G11C7/065 ,  G11C7/16 ,  G11C8/08 ,  G11C11/5642 ,  G11C11/5678 ,  G11C13/0004 ,  G11C2211/5634 ,  G11C2211/5644 ,  H03M3/43 ,  H03M3/456

Abstract: A system including a processor and a memory device. The memory device includes a memory array having a plurality of memory elements connected to a bit-line and a quantizing circuit. The quantizing circuit includes a combination circuit configured to combine an analog input signal with an analog feedback signal to produce a delta signal. The quantizing circuit also includes an integrator configured to receive and integrate the delta signal to produce a sigma signal. The quantizing circuit also includes an analog-to-digital converter configured to receive the sigma signal and compare the sigma signal with a reference signal to produce a digital output signal.

Abstract translation: 一种包括处理器和存储器件的系统。 存储器件包括具有连接到位线和量化电路的多个存储元件的存储器阵列。 量化电路包括组合电路，其被配置为将模拟输入信号与模拟反馈信号组合以产生增量信号。 量化电路还包括被配置为接收和积分增量信号以产生Σ信号的积分器。 量化电路还包括配置成接收西格玛信号并将西格玛信号与参考信号进行比较以产生数字输出信号的模拟 - 数字转换器。

公开(公告)号：US20150262654A1

公开(公告)日：2015-09-17

申请号：US14724491

申请日：2015-05-28

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Russel J. Baker

IPC: G11C11/419

CPC classification number: G11C11/417 ,  G11C7/02 ,  G11C7/067 ,  G11C7/1006 ,  G11C7/1051 ,  G11C7/106 ,  G11C7/1069 ,  G11C11/419 ,  G11C11/56 ,  G11C11/5642 ,  G11C11/5678 ,  G11C13/0004 ,  G11C16/04 ,  G11C16/26 ,  G11C29/02 ,  G11C29/023 ,  G11C29/028 ,  G11C2211/5634

Abstract: A memory device that, in certain embodiments, includes a memory element coupled to a bit-line and a quantizing circuit coupled to the memory element via the bit-line. In some embodiments, the quantizing circuit includes an analog-to-digital converter having an input and output and a digital filter that includes memory. The input of the analog-to-digital converter may be coupled to the bit-line, and the output of the analog-to-digital converter may be coupled to the digital filter.

Abstract translation: 在某些实施例中，存储器件包括耦合到位线的存储器元件和经由位线耦合到存储元件的量化电路。 在一些实施例中，量化电路包括具有输入和输出的模数转换器和包括存储器的数字滤波器。 模拟 - 数字转换器的输入可以耦合到位线，并且模数转换器的输出可以耦合到数字滤波器。

公开(公告)号：US20190096456A1

公开(公告)日：2019-03-28

申请号：US16184798

申请日：2018-11-08

Applicant: Micron Technology, Inc.

Inventor： Russel J. Baker

IPC: G11C7/22 ,  G11C11/56 ,  G11C8/08 ,  G11C7/06 ,  G11C5/14 ,  G11C7/16 ,  H03M3/00 ,  G11C13/00

CPC classification number: G11C7/22 ,  G11C5/147 ,  G11C7/065 ,  G11C7/16 ,  G11C8/08 ,  G11C11/5642 ,  G11C11/5678 ,  G11C13/0004 ,  G11C2211/5634 ,  G11C2211/5644 ,  H03M3/43 ,  H03M3/456

Abstract: A system including a processor and a memory device. The memory device includes a memory array having a plurality of memory elements connected to a bit-line and a quantizing circuit. The quantizing circuit includes a combination circuit configured to combine an analog input signal with an analog feedback signal to produce a delta signal. The quantizing circuit also includes an integrator configured to receive and integrate the delta signal to produce a sigma signal. The quantizing circuit also includes an analog-to-digital converter configured to receive the sigma signal and compare the sigma signal with a reference signal to produce a digital output signal.

公开(公告)号：US20160203850A1

公开(公告)日：2016-07-14

申请号：US15074759

申请日：2016-03-18

Applicant: Micron Technology, Inc.

Inventor： Russel J. Baker

IPC: G11C7/22

CPC classification number: G11C7/22 ,  G11C5/147 ,  G11C7/065 ,  G11C7/16 ,  G11C8/08 ,  G11C11/5642 ,  G11C11/5678 ,  G11C13/0004 ,  G11C2211/5634 ,  G11C2211/5644 ,  H03M3/43 ,  H03M3/456

Abstract: A system including a processor and a memory device. The memory device includes a memory array having a plurality of memory elements connected to a bit-line and a quantizing circuit. The quantizing circuit includes a combination circuit configured to combine an analog input signal with an analog feedback signal to produce a delta signal. The quantizing circuit also includes an integrator configured to receive and integrate the delta signal to produce a sigma signal. The quantizing circuit also includes an analog-to-digital converter configured to receive the sigma signal and compare the sigma signal with a reference signal to produce a digital output signal.

Abstract translation: 一种包括处理器和存储器件的系统。 存储器件包括具有连接到位线和量化电路的多个存储元件的存储器阵列。 量化电路包括组合电路，其被配置为将模拟输入信号与模拟反馈信号组合以产生增量信号。 量化电路还包括被配置为接收和积分增量信号以产生Σ信号的积分器。 量化电路还包括配置成接收西格玛信号并将西格玛信号与参考信号进行比较以产生数字输出信号的模拟 - 数字转换器。