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8 条记录 (耗时 0.017 秒)

    Multi-chip cooling module and method
    1.
    发明授权
    Multi-chip cooling module and method 失效
    多芯片散热模块及方法

    公开(公告)号：US5380956A

    公开(公告)日：1995-01-10

    申请号：US87950

    申请日：1993-07-06

    申请人： Mike C. Loo ,  Marlin R. Vogel

    发明人： Mike C. Loo ,  Marlin R. Vogel

    IPC分类号： H01L23/473 ,  H05K7/20 ,  H05K1/00

    CPC分类号： H01L23/473 ,  H01L2924/0002

    摘要： A liquid cooling module for semiconductor chips is disclosed. The module includes a plurality of substrates, each containing at least one chip. The substrates are arranged in the module so that when coolant flows through the module, the coolant is exposed to the top and bottom surfaces of the chips. A gasket is used between each substrate. The gasket is made if a Z-axis elastromeric material that is impervious to liquid and therefore directs the flow of the coolant in the module and makes the module liquid tight. The material also is conductive in the Z direction, but not the X or Y direction, thereby making electrical communication between the chips on different substrate levels possible. The module is intended to be attached to a circuit board, thus simplifying the layout of liquid cooled chips on the board.

    摘要翻译： 公开了一种用于半导体芯片的液体冷却模块。 该模块包括多个基板，每个基板至少包含一个芯片。 衬底布置在模块中，使得当冷却剂流过模块时，冷却剂暴露于芯片的顶部和底部表面。 在每个基板之间使用垫圈。 如果使用不透液体的Z轴弹性体材料制造垫圈，因此引导冷却剂在模块中的流动，并使模块液体密封。 该材料也在Z方向上导电，而不是X或Y方向，从而使得在不同衬底层上的芯片之间的电连通成为可能。 该模块旨在连接到电路板，从而简化了板上液体冷却芯片的布局。

    Upgradable multi-chip module
    2.
    发明授权
    Upgradable multi-chip module 失效
    可升级的多芯片模块

    公开(公告)号：US5648890A

    公开(公告)日：1997-07-15

    申请号：US532950

    申请日：1995-09-22

    申请人： Mike C. Loo ,  Alfred S. Conte

    发明人： Mike C. Loo ,  Alfred S. Conte

    IPC分类号： H01L23/40 ,  H01L25/065 ,  H05K7/20

    CPC分类号： H01L23/4006 ,  H01L25/0655 ,  H01L2023/4043 ,  H01L2023/4062 ,  H01L2023/4081 ,  H01L2224/16 ,  H01L2924/09701

    摘要： A substrate, an alignment plate, a heat sink, a back plate, a plurality of spacers, and a plurality of nuts are used to removably package one or more semiconductor package into a single module. The semiconductor dies are packaged with tape automated bonding (TAB) packages having land grid array (LGA) outer lead bumps. The substrate comprises a number of land patterns, a number of alignment cavities, and a number of join cavities. The alignment plate is fabricated with a number of alignment pins, a number of housing cavities, and a number of join cavities. The heat sink is fabricated with a number of stems and a number of join cavities. The back plate is fabricated with a number of extrusions having threaded ends. The spacers are fabricated with flanged openings at both ends, and each spacer is loaded with a number of spring washers. The nuts are fabricated with stepped heads. The extrusions, the land patterns and the alignment and join cavities of the substrate, the alignment pins and the housing and join cavities of the alignment plate, the stems and the join cavities of the heat sink, the spring washer loaded spacers, and the stepped head nuts are coordinated in their numbers, sizes and geometric locations, as a result, the semiconductor packages may be easily replaced at a later time with enhanced versions, and the replaced semiconductor packages are salvageable. In some embodiments, a biasing member, such as a leaf spring, is provided in each housing cavity (aperture) of the alignment plate for biasing the semiconductor packages against one or more walls of each aperture.

    摘要翻译： 使用基板，对准板，散热器，背板，多个间隔件和多个螺母来将一个或多个半导体封装可拆卸地封装到单个模块中。 半导体管芯与具有焊盘栅极阵列（LGA）外部引线凸块的带状自动焊接（TAB）封装一起封装。 衬底包括多个焊盘图案，多个对准空腔和多个连接腔。 对准板由多个对准销，多个壳体腔和多个连接腔构成。 散热器由许多杆和多个连接腔制成。 背板制造有许多具有螺纹端部的挤压件。 间隔件在两端制造为带凸缘的开口，每个隔离件装载有多个弹簧垫圈。 螺母是用阶梯头制造的。 挤压件，焊盘图案以及基板的对准和连接腔，对准销和定位板的壳体和连接腔，散热片的杆和连接腔，弹簧垫圈加载的间隔件以及台阶 头螺母的数量，尺寸和几何位置协调一致，结果，可以在稍后的时间内容易地更换半导体封装，增强版本，替代的半导体封装是可抢救的。 在一些实施例中，偏置构件（例如板簧）设置在对准板的每个壳体腔（孔）中，用于将半导体封装偏压到每个孔的一个或多个壁上。

    Upgradable multi-chip module
    5.
    发明授权
    Upgradable multi-chip module 失效
    可升级的多芯片模块

    公开(公告)号：US5648893A

    公开(公告)日：1997-07-15

    申请号：US310136

    申请日：1994-09-21

    申请人： Mike C. Loo ,  Alfred S. Conte

    发明人： Mike C. Loo ,  Alfred S. Conte

    IPC分类号： B23P21/00 ,  H01L23/40 ,  H01L25/065 ,  H05K1/14 ,  H05K1/18 ,  H05K3/36 ,  H05K7/20 ,  H05K7/00

    CPC分类号： H01L23/4006 ,  H01L25/0655 ,  H01L2023/4043 ,  H01L2023/4062 ,  H01L2023/4081 ,  H01L2023/4087 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/09701

    摘要： A substrate, an alignment plate, a heat sink, a back plate, a plurality of spacers, and a plurality of nuts are used to removably package one or more semiconductor package into a single module. The semiconductor dies are packaged with tape automated bonding (TAB) packages having land grid array (LGA) outer lead bumps. The substrate comprises a number of land patterns, a number of alignment cavities, and a number of join cavities. The alignment plate is fabricated with a number of alignment pins, a number of housing cavities, and a number of join cavities. The heat sink is fabricated with a number of stems and a number of join cavities. The back plate is fabricated with a number of extrusions having threaded ends. The spacers are fabricated with ranged openings at both ends, and each spacer is loaded with a number of spring washers. The nuts are fabricated with stepped heads. The extrusions, the land patterns and the alignment and join cavities of the substrate, the alignment pins and the housing and join cavities of the alignment plate, the stems and the join cavities of the heat sink, the spring washer loaded spacers, and the stepped head nuts are coordinated in their numbers, sizes and geometric locations, as a result, the semiconductor packages may be easily replaced at a later time with enhanced versions, and the replaced semiconductor packages are salvageable. In some embodiments, a biasing member, such as a leaf spring, is provided in each housing cavity (aperture) of the alignment plate for biasing the semiconductor packages against one or more walls of each aperture.

    摘要翻译： 使用基板，对准板，散热器，背板，多个间隔件和多个螺母来将一个或多个半导体封装可拆卸地封装到单个模块中。 半导体管芯与具有焊盘栅极阵列（LGA）外部引线凸块的带状自动焊接（TAB）封装一起封装。 衬底包括多个焊盘图案，多个对准空腔和多个连接腔。 对准板由多个对准销，多个壳体腔和多个连接腔构成。 散热器由许多杆和多个连接腔制成。 背板制造有许多具有螺纹端部的挤压件。 间隔件在两端制造有远程开口，每个隔离件装有若干弹簧垫圈。 螺母是用阶梯头制造的。 挤压件，焊盘图案以及基板的对准和连接腔，对准销和定位板的壳体和连接腔，散热片的杆和连接腔，弹簧垫圈加载的间隔件以及台阶 头螺母的数量，尺寸和几何位置协调一致，结果，可以在稍后的时间内容易地更换半导体封装，增强版本，替代的半导体封装是可抢救的。 在一些实施例中，偏置构件（例如板簧）设置在对准板的每个壳体腔（孔）中，用于将半导体封装偏压到每个孔的一个或多个壁上。

    Tab semiconductor package with cushioned land grid array outer lead bumps
    8.
    发明授权
    Tab semiconductor package with cushioned land grid array outer lead bumps 失效
    贴片半导体封装，带衬垫的焊盘阵列外引线凸块

    公开(公告)号：US5394009A

    公开(公告)日：1995-02-28

    申请号：US99617

    申请日：1993-07-30

    申请人： Mike C. Loo

    发明人： Mike C. Loo

    IPC分类号： H01L21/56 ,  H01L23/16 ,  H01L23/31 ,  H01L23/48 ,  H01L29/44 ,  H01L29/52 ,  H01L29/60

    CPC分类号： H01L21/56 ,  H01L23/16 ,  H01L23/3121 ,  H01L2924/0002

    摘要： A film of elastomeric material is used to laminate the tape with LGA outer lead bumps to the stiffner plate of the semiconductor package. The elastomeric material has the necessary physical and electrical characteristics to provide the required firmness to maintain good electrical contact between the outer lead bumps and the corresponding contacting pads on a socket, ceramic substrate or PWB, and at the same time, to provide the required resilience to accommodate differences in heights between the outer lead bumps. The stiffner plate is fabricated with a cavity at its center for accommodating the VLSI die, and slots along the outer edges of its underside for storing the excess elastomeric material squeezed out when laminating the tape to the stiffner plate, thereby preventing the excess squeezed out elastomeric material from building up at the outer edges of the semiconductor package to a height in excess of the outer lead bumps. As a result, the land pattern on the socket, ceramic substrate or PWB is not required to address the differences in heights between the outer lead bumps.

    摘要翻译： 使用弹性体材料膜将带与LGA外引线凸块的带层压到半导体封装的加强板上。 弹性体材料具有必要的物理和电学特性，以提供所需的坚固度以在外部引线凸块和插座，陶瓷基板或PWB上的对应接触垫之间保持良好的电接触，并且同时提供所需的弹性 以适应外部引线凸块之间的高度差异。 加强板在其中心处具有用于容纳VLSI模具的空腔和沿着其下侧的外边缘的槽，用于存储当将带材层压到加强板时挤出的多余的弹性体材料，从而防止多余的挤出弹性体 材料在半导体封装的外边缘处建立到超过外引线凸块的高度。 结果，插座，陶瓷基板或PWB上的焊盘图案不需要解决外引线凸块之间的高度差。