公开(公告)号：US20190243245A1

公开(公告)日：2019-08-08

申请号：US16179150

申请日：2018-11-02

Applicant: Mitsubishi Electric Corporation

Inventor： Hiroyuki NAKAMURA ,  Shinya SONEDA ,  Shoichi KUGA

IPC: G03F7/09 ,  H01L23/544 ,  H01L21/027 ,  G03F7/20 ,  G03F7/26 ,  G03F1/42

CPC classification number: G03F7/09 ,  G03F1/42 ,  G03F7/20 ,  G03F7/26 ,  H01L21/0274 ,  H01L23/544 ,  H01L2223/5442 ,  H01L2223/54426

Abstract: A film resist is a member for being bonded to a main surface of a substrate, which main surface is provided with a mark. The film resist includes a cutout for the mark to be checked.

公开(公告)号：US20180024437A1

公开(公告)日：2018-01-25

申请号：US15541636

申请日：2015-01-28

Applicant: Mitsubishi Electric Corporation

Inventor： Naoyuki TAKEDA ,  Shoichi KUGA

IPC: G03F7/20 ,  H01L21/67

CPC classification number: G03F7/70825 ,  G03F7/2028 ,  G03F7/7015 ,  G03F7/70266 ,  G03F7/70308 ,  G03F7/70433 ,  G03F7/708 ,  G03F7/70808 ,  H01L21/67259

Abstract: An edge exposure apparatus for exposure of an outer circumferential portion of a semiconductor substrate to light includes a light source provided to be able to emit light to the outer circumferential portion and a mirror having a reflection surface arranged to extend in a direction intersecting with an optical axis of light emitted from the light source. The mirror is provided between the outer circumferential portion and a center of the semiconductor substrate in a radial direction of the semiconductor substrate in exposure of the outer circumferential portion of the semiconductor substrate to light.

公开(公告)号：US20200058733A1

公开(公告)日：2020-02-20

申请号：US16092409

申请日：2017-04-24

Applicant: Mitsubishi Electric Corporation

Inventor： Tetsu NEGISHI ,  Shoichi KUGA

IPC: H01L29/06 ,  H01L23/29 ,  H01L23/31 ,  H01L29/739

Abstract: A semiconductor apparatus includes a power semiconductor device, a resin film and a sealing insulating material. The power semiconductor device includes: a first electrode covering a first region on one main surface of the semiconductor substrate; a second electrode formed on the other main surface of the semiconductor substrate; a guard ring formed in a second region outer than the first region; and a non-conductive inorganic film located in the second region and covering the guard ring. The resin film overlaps the guard ring in a plan view, and the resin film on the non-conductive inorganic film has a thickness of 35 μm or more. The resin film is a film of a single layer, and the resin film has an outermost edge in the form of a downwardly spreading fillet. The outermost edge of the resin film is inner than an outermost edge of the semiconductor substrate.

公开(公告)号：US20180254228A1

公开(公告)日：2018-09-06

申请号：US15790088

申请日：2017-10-23

Applicant: Mitsubishi Electric Corporation

Inventor： Shoichi KUGA

IPC: H01L23/08 ,  H01L23/057 ,  H01L23/13 ,  H01L23/00 ,  H01L21/48 ,  H02M7/00

Abstract: A semiconductor power module includes: an insulating substrate including a concave portion provided on a top surface of the insulating substrate; a substrate electrode embedded in the concave portion; a semiconductor device bonded onto the substrate electrode; and an insulating resin covering a top end part of the substrate electrode.

公开(公告)号：US20170207080A1

公开(公告)日：2017-07-20

申请号：US15102329

申请日：2014-02-13

Applicant: Mitsubishi Electric Corporation

Inventor： Shoichi KUGA

IPC: H01L21/027 ,  G03F7/16 ,  H01L21/02 ,  H01L21/67 ,  H01L23/544 ,  H01L21/3105

CPC classification number: G03F7/168 ,  G03F7/162 ,  H01L21/0206 ,  H01L21/02087 ,  H01L21/0209 ,  H01L21/0273 ,  H01L21/31058 ,  H01L21/31133 ,  H01L21/67051 ,  H01L21/6708 ,  H01L21/67103 ,  H01L21/6715 ,  H01L2223/54493

Abstract: A semiconductor device manufacturing method of the present invention includes a coating step of coating a front surface of a wafer with a material containing a solvent, a volatilization step of volatilizing the solvent by heating the material, and a rinse step of jetting an edge rinse solution for removing the material from a first nozzle to a peripheral portion of the front surface of the wafer while rotating the wafer.

公开(公告)号：US20170178860A1

公开(公告)日：2017-06-22

申请号：US15206331

申请日：2016-07-11

Applicant: Mitsubishi Electric Corporation

Inventor： Shoichi KUGA

IPC: H01J37/317 ,  H01J37/30 ,  H01J37/08

CPC classification number: H01J37/3171 ,  H01J37/08 ,  H01J37/3002 ,  H01J2237/0206 ,  H01J2237/31701

Abstract: A technique disclosed in the present specification relates to an ion implanter capable of preventing a semiconductor substrate from being damaged by an abnormal electric discharge through a simple method. The ion implanter of this technique includes an ion irradiation unit configured to irradiate a surface of a semiconductor substrate with ions. The ion implanter also includes at least one electrode (needle electrode, annular electrode) disposed in a position in the vicinity of at least one of back and side surfaces of an end of the semiconductor substrate. The position is dischargeable to and from the semiconductor substrate. The at least one electrode (needle electrode, annular electrode) is spaced apart from the semiconductor substrate.