中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

10 records (took 0.03 seconds)

    ELECTRONIC COMPONENT MOUNTING STRUCTURE AND METHOD FOR MANUFACTURING SAME
    1.
    发明公开
    ELECTRONIC COMPONENT MOUNTING STRUCTURE AND METHOD FOR MANUFACTURING SAME 审中-公开

    公开(公告)号：US20230328895A1

    公开(公告)日：2023-10-12

    申请号：US18335383

    申请日：2023-06-15

    Applicant: Murata Manufacturing Co., Ltd.

    Inventor： Takashi KITAHARA ,  Kensuke OTAKE ,  Kyo SHIN

    IPC: H05K3/34 ,  H05K1/18

    CPC classification number: H05K3/3436 ,  H05K3/3463 ,  H05K1/181

    Abstract: The present disclosure is directed to an electronic component mounting structure including: a circuit board provided on a surface thereof with a first electrode containing Cu as a main component; and an electronic component mounted on the circuit board, the electronic component including a second electrode on a surface thereof; wherein the second electrode includes a first plating containing Ni as a main component and a second plating containing Sn as a main component formed on a surface of the first plating, and an intermediate bonding layer is provided between the first plating and the first electrode, and the intermediate bonding layer includes a first region containing an alloy of Cu and Sn as a main component and a second region containing Sn as a main component.

    CIRCUIT BOARD AND CIRCUIT MODULE
    2.
    发明公开
    CIRCUIT BOARD AND CIRCUIT MODULE 审中-公开

    公开(公告)号：US20230337359A1

    公开(公告)日：2023-10-19

    申请号：US18338439

    申请日：2023-06-21

    Applicant: Murata Manufacturing Co., Ltd.

    Inventor： Takashi KITAHARA

    IPC: H05K1/11 ,  H05K1/18

    CPC classification number: H05K1/111 ,  H05K1/181 ,  H05K2201/09409 ,  H05K2201/093

    Abstract: A circuit board includes a grounding land conductor that is provided on a first main surface of a base material, and overlaps with a region in which an electronic component of a bump connection type is mounted, when viewed in a direction perpendicular to the first main surface. The grounding land conductor includes a mounting pad portion on which a bump of the electronic component is mounted, a common portion that overlaps with the electronic component, when viewed in the direction perpendicular to the main surface, and a connecting portion that connects the mounting pad portion and the common portion and is smaller in width than the mounting pad portion.

    COMPOUND SEMICONDUCTOR DEVICE
    3.
    发明申请
    COMPOUND SEMICONDUCTOR DEVICE 有权
    化合物半导体器件

    公开(公告)号：US20160155830A1

    公开(公告)日：2016-06-02

    申请号：US14932497

    申请日：2015-11-04

    Applicant: MURATA MANUFACTURING CO., LTD.

    Inventor： Kenji SASAKI ,  Kingo KUROTANI ,  Takashi KITAHARA

    IPC: H01L29/737 ,  H03F3/21 ,  H03F3/19 ,  H01L25/065 ,  H01L23/66

    CPC classification number: H01L29/7371 ,  H01L23/4824 ,  H01L23/535 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L27/0823 ,  H01L29/0692 ,  H01L29/40 ,  H01L29/41708 ,  H01L2224/0401 ,  H01L2224/13013 ,  H01L2224/1302 ,  H01L2224/16227 ,  H01L2924/13051 ,  H03F3/19 ,  H03F2200/408 ,  H03F2200/451 ,  H01L2924/00012

    Abstract: A compound semiconductor device includes a heterojunction bipolar transistor and a bump. The heterojunction bipolar transistor includes a plurality of unit transistors. The bump is electrically connected to emitters of the plurality of unit transistors. The plurality of unit transistors are arranged in a first direction. The bump is disposed above the emitters of the plurality of unit transistors while extending in the first direction. The emitter of at least one of the plurality of unit transistors is displaced from a center line of the bump in the first direction toward a first side of a second direction which is perpendicular to the first direction. The emitter of at least another one of the plurality of unit transistors is displaced from the center line of the bump in the first direction toward a second side of the second direction.

    Abstract translation: 复合半导体器件包括异质结双极晶体管和凸块。 异质结双极晶体管包括多个单位晶体管。 凸块电连接到多个单位晶体管的发射极。 多个单位晶体管沿第一方向布置。 所述突起设置在所述多个单位晶体管的发射极之上，同时在所述第一方向上延伸。 多个单位晶体管中的至少一个的发射极从第一方向上的凸块的中心线向垂直于第一方向的第二方向的第一侧移位。 所述多个单位晶体管中的至少另一个的发射极在所述第一方向上朝向所述第二方向的第二侧从所述凸块的中心线偏移。

    COMPOUND SEMICONDUCTOR DEVICE
    4.
    发明申请
    COMPOUND SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20210367066A1

    公开(公告)日：2021-11-25

    申请号：US17398909

    申请日：2021-08-10

    Applicant: Murata Manufacturing Co., Ltd.

    Inventor： Kenji SASAKI ,  Kingo KUROTANI ,  Takashi KITAHARA ,  Shigeki KOYA

    IPC: H01L29/737 ,  H01L23/00 ,  H01L23/482 ,  H01L29/417 ,  H01L29/06 ,  H01L23/535 ,  H01L27/082 ,  H01L29/40 ,  H03F3/19

    Abstract: A compound semiconductor device comprises a heterojunction bipolar transistor including a plurality of unit transistors, a capacitor electrically connected between a RF input wire and a base wire for each unit transistor of the unit transistors, and a bump electrically connected to emitters of the unit transistors. The unit transistors are arranged in a first direction. The bump is disposed above the emitters of the unit transistors while extending in the first direction. The transistors include first and second unit transistors, the respective emitters of the first and second unit transistors being disposed on first and second sides, respectively, of a second direction, perpendicular to the first direction, with respect to a center line of the bump extending in the first direction. The capacitor is not covered by the bump, and respective lengths of the respective base wires connected respectively to the first and second unit transistors are different.

    COMPOUND SEMICONDUCTOR DEVICE
    5.
    发明申请
    COMPOUND SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20210066479A1

    公开(公告)日：2021-03-04

    申请号：US17097937

    申请日：2020-11-13

    Applicant: Murata Manufacturing Co., Ltd.

    Inventor： Kenji SASAKI ,  Kingo KUROTANI ,  Takashi KITAHARA ,  Shigeki KOYA

    IPC: H01L29/737 ,  H03F3/19 ,  H01L23/00 ,  H01L23/482 ,  H01L29/417 ,  H01L29/06 ,  H01L23/535 ,  H01L27/082 ,  H01L29/40

    Abstract: A compound semiconductor device comprises a heterojunction bipolar transistor including a plurality of unit transistors, a capacitor electrically connected between a RF input wire and a base wire for each unit transistor of the unit transistors, and a bump electrically connected to emitters of the unit transistors. The unit transistors are arranged in a first direction. The bump is disposed above the emitters of the unit transistors while extending in the first direction. The transistors include first and second unit transistors, the respective emitters of the first and second unit transistors being disposed on first and second sides, respectively, of a second direction, perpendicular to the first direction, with respect to a center line of the bump extending in the first direction. The capacitor is not covered by the bump, and respective lengths of the respective base wires connected respectively to the first and second unit transistors are different.

    COMPOUND SEMICONDUCTOR DEVICE
    7.
    发明申请
    COMPOUND SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20200006536A1

    公开(公告)日：2020-01-02

    申请号：US16568154

    申请日：2019-09-11

    Applicant: Murata Manufacturing Co., Ltd.

    Inventor： Kenji SASAKI ,  Kingo KUROTANI ,  Takashi KITAHARA ,  Shigeki KOYA

    IPC: H01L29/737 ,  H03F3/19 ,  H01L23/00 ,  H01L23/482 ,  H01L29/417 ,  H01L29/06 ,  H01L23/535 ,  H01L27/082 ,  H01L29/40

    Abstract: A semiconductor device includes a heterojunction bipolar transistor and a bump. The heterojunction bipolar transistor (HBT) includes a plurality of unit transistors. The bump is electrically connected to emitters of the plurality of unit transistors through respective overlying conductor filled via openings that overlap in a plan view with a width portion of the bump. The semiconductor device reduces heat resistance in an HBT cell by satisfying two conditions, the first of which is related to specific sizing and positioning of a width portion of the overlying via opening relative to the width portion of the bump, and the second of which is related to positioning the base electrode entirely within a specific region of the width portion of the overlapping overlying via opening.

Patent Agency Ranking