Apparatus and method for a wafer level chip scale package heat sink
    4.
    发明授权
    Apparatus and method for a wafer level chip scale package heat sink 有权
    晶圆级芯片级封装散热片的装置及方法

    公开(公告)号:US06916688B1

    公开(公告)日:2005-07-12

    申请号:US10313434

    申请日:2002-12-05

    摘要: A flip chip semiconductor package with an integral heat sink is disclosed as well as a technique for creating individual heat sinks by applying a conductive layer to the back surface of a wafer containing integrated circuitry before singulation. According to one aspect of the invention, an adhesive layer is applied to the back surface of a semiconductor wafer. A layer of conductive material such as copper is then attached to the back surface of the wafer using the previously applied adhesive. The wafer is then singulated to create individual semiconductor packages with superior heat transfer properties.

    摘要翻译: 公开了一种具有整体散热器的倒装芯片半导体封装以及通过在分割之前将包含集成电路的晶片的背面施加导电层来产生单个散热片的技术。 根据本发明的一个方面,将粘合剂层施加到半导体晶片的背面。 然后使用先前施加的粘合剂将诸如铜的导电材料层附着到晶片的背面。 然后将晶片分离以产生具有优异传热特性的单独的半导体封装。

    Method of packaging fuses
    5.
    发明授权
    Method of packaging fuses 有权
    包装保险丝的方法

    公开(公告)号:US06255141B1

    公开(公告)日:2001-07-03

    申请号:US09391137

    申请日:1999-09-07

    IPC分类号: H01L2182

    CPC分类号: H01L23/62 H01L2224/13

    摘要: Improved methods of packaging external fuses together with integrated circuit devices are described. A pair of frame strips are provided that each have an associated set of contact pads. A resistor paste is applied to one of the contact pad sets and the frame strips are laminated together by curing the resistor paste which is positioned between the contact pad sets. Dice are mounted to the opposite sides of the second contact pads to form integrated circuit devices having integrally packaged external fuses. The packaged devices are eventually singulated for use. In some embodiments, the contact pads each have downturned tabs that form wings on opposite sides of each die. When the dice are flip chips, a device may be attached to a substrate board by soldering both the bumps on the die and the tab wing tips to the substrate board. In a preferred embodiment, the resistor paste is a positive temperature coefficient resistor paste.

    摘要翻译: 描述了与集成电路器件一起封装外部保险丝的改进方法。 提供了一对框带,每个框带具有一组相关的接触垫。 将电阻浆料施加到接触垫组中的一个,并且通过固化位于接触垫组之间的电阻浆料将框带层压在一起。 骰子安装到第二接触焊盘的相对侧,以形成具有整体封装的外部熔断器的集成电路器件。 封装的装置最终被单独使用。 在一些实施例中,接触垫每个都具有在每个管芯的相对侧上形成翅膀的下降的突片。 当芯片是倒装芯片时,可以通过将裸片上的凸起和凸片翼尖焊接到基板来将装置附接到基板。 在优选实施例中,电阻膏是正温度系数电阻膏。

    Methods for manufacturing a radio frequency identification tag without aligning the chip and antenna
    7.
    发明授权
    Methods for manufacturing a radio frequency identification tag without aligning the chip and antenna 有权
    制造射频识别标签而不对准芯片和天线的方法

    公开(公告)号:US08635762B1

    公开(公告)日:2014-01-28

    申请号:US11533741

    申请日:2006-09-20

    IPC分类号: H01Q17/00

    摘要: A method for attaching antennae to RFID tags is disclosed. Included is the use of RFID tags having asymmetrical interconnect system for one or more antennae, such that virtually any rotational orientation of the RFID tag will result in a successful antennae attachment. Two oversized and “L” shaped gold-bumped holes can be arranged on the same side of the ship in an opposing action, such that at least one axis of symmetry is formed. Accordingly, virtually all rotational orientations of the chip are then acceptable when attaching a pair of opposing pole antenna leads. Alternatively, a pair of poles can be located on opposing chips surfaces, such that antenna substrates can be attached to both the top and bottom of the chip to form a product “sandwich”, whereby the rotational orientation of the chip is irrelevant at an antenna attachment step.

    摘要翻译: 公开了一种将天线连接到RFID标签的方法。 包括使用具有用于一个或多个天线的不对称互连系统的RFID标签,使得RFID标签的实际上任何旋转取向将导致成功的天线附接。 两个大尺寸和“L”形的金凸起的孔可以以相对的作用布置在船的同一侧上,使得形成至少一个对称轴。 因此,当连接一对相对的极天线引线时,芯片的几乎所有的旋转取向都是可接受的。 或者,一对极可以位于相对的芯片表面上,使得天线基板可以附接到芯片的顶部和底部,以形成产品“夹心”,由此芯片的旋转取向在天线处是不相关的 附件步骤。

    Design of a two interconnect IC chip for a radio frequency identification tag and method for manufacturing same
    8.
    发明授权
    Design of a two interconnect IC chip for a radio frequency identification tag and method for manufacturing same 有权
    用于射频识别标签的两个互连IC芯片的设计及其制造方法

    公开(公告)号:US07230580B1

    公开(公告)日:2007-06-12

    申请号:US10651683

    申请日:2003-08-29

    IPC分类号: H01Q7/00

    摘要: An apparatus and method for attaching antennae to RFID tags is disclosed. Included is the use of RFID tags having a symmetrical interconnect system for attaching one or more antennae, such that virtually any rotational orientation of the RFID tag will result in a successful antennae attachment. Two oversized and “L” shaped gold-bumped poles can be arranged on the same side of a chip in an opposing fashion, such that at least one axis of symmetry is formed. Accordingly, virtually all rotational orientations of the chip are then acceptable when attaching a pair of opposing pole antenna leads. Alternatively, a pair of poles can be located on opposing chip surfaces, such that antenna substrates can attach to both the top and bottom of the chip to form a product “sandwich,” whereby the rotational orientation of the chip is irrelevant at an antenna attachment step.

    摘要翻译: 公开了一种用于将天线附接到RFID标签的装置和方法。 包括使用具有用于附接一个或多个天线的对称互连系统的RFID标签,使得RFID标签的实际上任何旋转取向将导致成功的天线附接。 两个大尺寸和“L”形的金凸极可以以相对的方式布置在芯片的同一侧上,使得形成至少一个对称轴。 因此,当连接一对相对的极天线引线时,芯片的几乎所有的旋转取向都是可接受的。 或者,一对极可以位于相对的芯片表面上,使得天线基板可以附接到芯片的顶部和底部两者以形成产品“夹心”,由此芯片的旋转取向在天线附件上是不相关的 步。

    Apparatus and method for scribing semiconductor wafers using vision recognition
    9.
    发明授权
    Apparatus and method for scribing semiconductor wafers using vision recognition 有权
    使用视觉识别刻划半导体晶片的装置和方法

    公开(公告)号:US06822315B2

    公开(公告)日:2004-11-23

    申请号:US10076818

    申请日:2002-02-14

    IPC分类号: H01L23544

    摘要: An apparatus and method for scribing a semiconductor wafer coated with a substantially opaque material using vision recognition is disclosed. The apparatus includes a stage configured to hold a wafer, an imaging unit configured to generate an image of the wafer, and a computer configured to identify the coordinates of the scribe lines on the wafer from the image. During operation, the wafer is imaged using the imaging unit. The computer then identifies the coordinates of the scribe lines on the wafer from the image. Thereafter the coordinates are provided to a dicing machine which performs the dicing of the wafer. Accuracy is therefore improved since the dicing machine relies on the coordinates of the scribe lines as opposed to attempting to recognize the scribe lines through the opaque material. According to various embodiments of the invention, the imaging unit may use infrared, X-ray or ultrasound waves to generate the image of the wafer.

    摘要翻译: 公开了一种用于使用视觉识别来划刻涂有基本不透明材料的半导体晶片的装置和方法。 该装置包括配置成保持晶片的台,被配置为产生晶片的图像的成像单元和被配置为从图像识别晶片上的划线的坐标的计算机。 在操作期间,使用成像单元对晶片进行成像。 然后,计算机从图像中识别晶片上划线的坐标。 此后,将坐标提供给执行晶片切割的切割机。 因此,由于切割机依赖于划痕线的坐标,而是试图通过不透明材料识别划线,因此精度得到改善。 根据本发明的各种实施例,成像单元可以使用红外,X射线或超声波来产生晶片的图像。

    Method of packaging fuses
    10.
    发明授权
    Method of packaging fuses 失效
    包装保险丝的方法

    公开(公告)号:US06459143B2

    公开(公告)日:2002-10-01

    申请号:US09844062

    申请日:2001-04-26

    IPC分类号: H01L2358

    CPC分类号: H01L23/62 H01L2224/13

    摘要: Improved methods of packaging external fuses together with integrated circuit devices are described. A pair of frame strips are provided that each have an associated set of contact pads. A resistor paste is applied to one of the contact pad sets and the frame strips are laminated together by curing the resistor paste which is positioned between the contact pad sets. Dice are mounted to the opposite sides of the second contact pads to form integrated circuit devices having integrally packaged external fuses. The packaged devices are eventually singulated for use. In some embodiments, the contact pads each have downturned tabs that form wings on opposite sides of each die. When the dice are flip chips, a device may be attached to a substrate board by soldering both the bumps on the die and the tab wing tips to the substrate board. In a preferred embodiment, the resistor paste is a positive temperature coefficient resistor paste.

    摘要翻译: 描述了与集成电路器件一起封装外部保险丝的改进方法。 提供了一对框带,每个框带具有一组相关的接触垫。 将电阻浆料施加到接触垫组中的一个,并且通过固化位于接触垫组之间的电阻浆料将框带层压在一起。 骰子安装到第二接触焊盘的相对侧,以形成具有整体封装的外部熔断器的集成电路器件。 封装的装置最终被单独使用。 在一些实施例中,接触垫每个都具有在每个管芯的相对侧上形成翅膀的下降的突片。 当芯片是倒装芯片时,可以通过将裸片上的凸起和凸片翼尖焊接到基板来将装置附接到基板。 在优选实施例中,电阻膏是正温度系数电阻膏。