公开(公告)号：US5759426A

公开(公告)日：1998-06-02

申请号：US558540

申请日：1995-11-16

申请人： Norihiro Kobayashi ,  Kazuo Mamada ,  Yuichi Matsumoto ,  Satoshi Oka ,  Masatake Katayama

发明人： Norihiro Kobayashi ,  Kazuo Mamada ,  Yuichi Matsumoto ,  Satoshi Oka ,  Masatake Katayama

IPC分类号： H01L21/22 ,  H01L21/31 ,  H01L21/673 ,  H01L21/302

CPC分类号： C04B41/87 ,  C04B41/5066 ,  C04B41/52 ,  C04B41/89 ,  C30B35/00

摘要： A silicon nitride layer 12b is thermally grown on the topmost surface of the heat treatment jig 12 composed of silicon or silicon carbide in a nitrogen ambience. The silicon nitride layer 12b is thermally grown in a nitrogen ambience in the temperature range of 1,100.degree. C.-1,300.degree. C. It is desirable to remove slightly the surface of the jig by, for example, hydrogen etching before thermally growing the silicon nitride layer 12b. After the etching, a silicon oxide layer can be thermally grown on the jig surface in an oxygen ambience before thermally growing the silicon nitride layer 12b.

摘要翻译： 氮化硅层12b在氮气氛中由硅或碳化硅构成的热处理夹具12的最上表面热生长。 氮化硅层12b在1100℃-1300℃的温度范围内在氮气气氛中热生长。期望通过例如在将氮化硅热生长之前的氢蚀刻稍微去除夹具的表面 层12b。 在蚀刻之后，在氧化氮化物层12b热生长之前，可以在氧气氛中在夹具表面上热生长氧化硅层。

公开(公告)号：US5696034A

公开(公告)日：1997-12-09

申请号：US520189

申请日：1995-08-28

申请人： Masatake Katayama ,  Isao Moroga ,  Isao Shirai ,  Youichi Kumaki ,  Akio Kasahara

发明人： Masatake Katayama ,  Isao Moroga ,  Isao Shirai ,  Youichi Kumaki ,  Akio Kasahara

IPC分类号： H01L29/78 ,  H01L21/18 ,  H01L21/20 ,  H01L21/205 ,  H01L21/304 ,  H01L21/331 ,  H01L21/336 ,  H01L29/739 ,  H01L21/465

CPC分类号： H01L29/66333 ,  H01L21/187 ,  Y10S148/135

摘要： A method for producing a semiconductor substrate in which no autodoping occurs and slip dislocations in the substrate are reduced. The method involves forming a silicon nitride film on the backside of an n.sup.- -silicon substrate, epitaxially growing an n.sup.+ -buffer layer and a p.sup.+ -layer on the front side of the n.sup.- -silicon substrate, and decreasing the thickness of the n.sup.- -silicon substrate from the backside.

摘要翻译： 不产生自动掺杂的半导体衬底的制造方法和衬底中的滑移位错减小。 该方法包括在n - 硅衬底的背面上形成氮化硅膜，在n-硅衬底的正面外延生长n +缓冲层和p +层，并减小n 硅衬底从背面。

公开(公告)号：US5183783A

公开(公告)日：1993-02-02

申请号：US811958

申请日：1991-12-23

申请人： Yutaka Ohta ,  Konomu Ohki ,  Masatake Katayama

发明人： Yutaka Ohta ,  Konomu Ohki ,  Masatake Katayama

IPC分类号： H01L21/762

CPC分类号： H01L21/76297 ,  Y10S438/928 ,  Y10S438/977

摘要： Single crystal silicon islands in a dielectric-separation substrate are separated completely and finished in a uniform thickness by preparatorily denuding a single crystal silicon substrate of a warpage suffered to occur therein.This dielectric-separation substrate is produced by a method which comprises forming a thermal oxide film on a single crystal silicon substrate having grooves incised in advance therein, then forming an irreversibly thermally shrinkable film on the rear surface of said single crystal silicon substrate prior to depositing a polycrystalline silicon thereon, then depositing a polycrystalline silicon on said single crystal silicon substrate, and thereafter grinding said single crystal silicon substrate in conjunction with said irreversibly thermally shrinkable film.

公开(公告)号：US6048793A

公开(公告)日：2000-04-11

申请号：US546868

申请日：1995-10-23

申请人： Hitoshi Habuka ,  Masanori Mayuzumi ,  Naoto Tate ,  Masatake Katayama

发明人： Hitoshi Habuka ,  Masanori Mayuzumi ,  Naoto Tate ,  Masatake Katayama

IPC分类号： C23C16/24 ,  C23C16/02 ,  C23C16/44 ,  C23C16/455 ,  C23C16/48 ,  C30B25/10 ,  H01L21/205 ,  C23C16/01

CPC分类号： C23C16/481 ,  C23C16/0209 ,  C23C16/0236 ,  C23C16/4401 ,  C30B25/10

摘要： In a method and an appratus for a thin film growth on a semiconductor crystal substrate, impurities and contaminants absorbed on the inside wall of the reaction vessel are very harmful because these impurities and contaminants will deteriorate the quality of the thin film. A method and an apparatus by which the quantity of these impurities and contaminants absorbed on the inside wall of the reaction vessel can be restrained and removed easily are disclosed in this invention, wherein a semiconductor crystal substrate is mounted in the reaction vessel, and the wall of the reation vessel is cooled forcibly by a coolant while the substrate is under heating procedure to grow a thin film on the substrate by supplying the raw material gas into the reaction vessel. And the temperature of the wall of the reaction vessel during the procedure except the thin film growth is kept higher temperature than the temprature of the wall of the reaction vessel during the thin film growth procedure.

摘要翻译： 在半导体晶体基板上的薄膜生长的方法和设备中，吸收在反应容器的内壁上的杂质和污染物是非常有害的，因为这些杂质和污染物将使薄膜的质量劣化。 在本发明中公开了容易地抑制和去除反应容器的内壁上吸收的这些杂质和污染物的量的方法和装置，其中半导体晶体基板安装在反应容器中，壁 的反应容器被冷却剂强制冷却，同时衬底处于加热过程中，以通过将原料气体供应到反应容器中而在衬底上生长薄膜。 并且在薄膜生长过程中除了薄膜生长之外，反应容器的壁温度保持比反应容器壁温度高的温度。

公开(公告)号：US5376215A

公开(公告)日：1994-12-27

申请号：US151209

申请日：1993-11-12

申请人： Yutaka Ohta ,  Masatake Nakano ,  Masatake Katayama ,  Takao Abe

发明人： Yutaka Ohta ,  Masatake Nakano ,  Masatake Katayama ,  Takao Abe

IPC分类号： H01L21/302 ,  G01B11/06 ,  H01L21/3065 ,  H01L21/66 ,  H01L21/762 ,  H01L27/12 ,  B44C1/22 ,  C03C15/00 ,  H01L21/306

CPC分类号： H01L21/76251 ,  G01B11/0683 ,  H01L21/3065 ,  H01L22/12 ,  H01L22/20

摘要： A method and apparatus for uniformizing a bonded SOI (silicon on insulator) thin film layer by the reaction of chemical vapor-phase corrosion excited by the ultraviolet light, which effect the measurement of film thickness efficiently and conveniently and consequently attaining highly accurate control of the dispersion of thickness of the thin film layer without requiring the substrate to be removed from the reaction vessel for chemical vapor-phase corrosion on each occasion of the measurement or necessitating installation of a mechanism for alteration of the position of measurement inside or outside the reaction vessel are disclosed. The measurement of film thickness is carried out by keeping observation of interference fringes due to distribution of thickness of the film layer.

摘要翻译： 通过由紫外光激发的化学气相腐蚀的反应使接合的SOI（绝缘体上硅）层均匀化的方法和装置，其有效和方便地实现膜厚度的测量，从而实现对 在每次测量时，不需要从用于化学气相腐蚀的反应容器中除去衬底的薄膜层的厚度分散，或者需要安装用于改变反应容器内部或外部的测量位置的机构 被披露。 通过保持观察由于膜层的厚度分布引起的干涉条纹来进行膜厚度的测量。

公开(公告)号：US5240883A

公开(公告)日：1993-08-31

申请号：US841166

申请日：1992-02-25

申请人： Takao Abe ,  Masatake Katayama ,  Akio Kanai ,  Konomu Ohki ,  Masatake Nakano

发明人： Takao Abe ,  Masatake Katayama ,  Akio Kanai ,  Konomu Ohki ,  Masatake Nakano

IPC分类号： H01L21/02 ,  H01L21/20 ,  H01L21/304 ,  H01L21/3063 ,  H01L21/762 ,  H01L27/12

CPC分类号： H01L21/2007 ,  H01L21/3063 ,  H01L21/76251 ,  Y10S148/127 ,  Y10S148/135 ,  Y10S438/924

摘要： A thin Silicon film On Insulator (SOI) material fabricating method which is capable of providing a very high thickness uniformity of the silicon film, a process simplification and a considerable reduction of processing cost is disclosed, in which a silicon oxide film is formed on one or both of a p-type silicon bond wafer and a silicon base wafer, then the two wafers are bonded together through the silicon oxide film, subsequently a fixed positive charge is induced in the silicon oxide film to form a n-type inversion layer in the p-type silicon bond wafer adjacent to an interface between the p-type silicon bond wafer and the silicon oxide film layer, and thereafter a chemical etching is effected while applying a positive voltage to the p-type silicon bond wafer so that an etch-stop is made at an interface between a depletion layer including the n-type inversion layer and the p-type layer.

公开(公告)号：US5124274A

公开(公告)日：1992-06-23

申请号：US791518

申请日：1991-11-14

申请人： Konomu Ohki ,  Yutaka Ohta ,  Masatake Katayama

发明人： Konomu Ohki ,  Yutaka Ohta ,  Masatake Katayama

IPC分类号： H01L21/3213 ,  H01L21/76 ,  H01L21/762 ,  H01L21/763

CPC分类号： H01L21/32136 ,  H01L21/76264 ,  H01L21/76297 ,  H01L21/763 ,  H01L21/76275 ,  H01L21/76286

摘要： After the separating grooves has been formed, the polycrystalline silicon deposited as bonded to the single crystal substrate as a supporting base, and the polycrystalline silicon layer ground and polished until the oxide film in the area other than the separating grooves is exposed, the present invention etches the polycrystalline silicon layer on the separating grooves with mixed acid composed of hydrofluoric acid and nitric acid until its thickness equals that of the separating oxide film and subsequently removes the oxide film in the area other than the separating grooves with hydrofluoric acid, As a result, the otherwise inevitable occurrence of projections of polycrystalline silicon can be precluded. When the dielectric-separation substrate obtained by the present invention is used in manufacturing a semiconductor device, therefore, the occurrence of particles due to the chipping of the projections of polycrystalline silicon and the breakage of distributed wires in the produced device can be prevented.

公开(公告)号：US06254933B1

公开(公告)日：2001-07-03

申请号：US09395848

申请日：1999-09-14

申请人： Hitoshi Habuka ,  Masanori Mayuzumi ,  Naoto Tate ,  Masatake Katayama

发明人： Hitoshi Habuka ,  Masanori Mayuzumi ,  Naoto Tate ,  Masatake Katayama

IPC分类号： C23C1600

CPC分类号： C30B25/08 ,  C23C16/455 ,  C30B25/14

摘要： A method of performing chemical vapor deposition which produces semiconductor crystalline thin films having small transition widths. The method involves the use of a cold-wall type reaction chamber that is equipped with a gas inlet at one end and a gas outlet at the other end and a semiconductor substrate support which supports a semiconductor substrate so that a main surface thereof is horizontal. A reactant gas is caused to flow horizontally through the reaction chamber to effect the growing of a crystalline thin film on the main surface of the semiconductor substrate. The semiconductor substrate is arranged within the reactor chamber within a distance W which is measured from a leading edge of the semiconductor substrate at a most upstream position along a direction toward the gas outlet where W indicates an internal width of the reaction chamber. The semiconductor substrate is also in a location having a W/G ratio of 15 or greater, where G represents a distance between the main surface of the semiconductor substrate and a ceiling of the reaction chamber.

摘要翻译： 一种进行化学气相沉积的方法，其产生具有小转变宽度的半导体晶体薄膜。 该方法包括使用在一端配备气体入口和另一端的气体出口的冷壁式反应室，以及支撑半导体衬底以使其主表面为水平的半导体衬底支撑件。 使反应气体水平地流过反应室，以在半导体衬底的主表面上生长晶体薄膜。 将半导体衬底布置在反应器室内的距离W内，该距离W是沿着朝向气体出口的方向的最上游位置从半导体衬底的前缘测量的，其中W表示反应室的内部宽度。 半导体衬底也处于W / G比为15或更大的位置，其中G表示半导体衬底的主表面和反应室的顶部之间的距离。

公开(公告)号：US5718762A

公开(公告)日：1998-02-17

申请号：US607566

申请日：1996-02-27

申请人： Hitoshi Habuka ,  Naoto Tate ,  Masanori Mayuzumi ,  Hitoshi Tsunoda ,  Masatake Katayama

发明人： Hitoshi Habuka ,  Naoto Tate ,  Masanori Mayuzumi ,  Hitoshi Tsunoda ,  Masatake Katayama

IPC分类号： C30B29/06 ,  C23C16/02 ,  C30B25/02 ,  C30B33/12 ,  H01L21/205 ,  H01L21/302 ,  H01L21/3065 ,  C30B25/20

CPC分类号： C30B29/06 ,  C30B25/02

摘要： A method for vapor-phase growth which allows an epiwafer of a smooth surface free from microroughness to be produced is provided. This method comprises a step of heating up a silicon single crystal substrate in an ambience of an inert gas started at a temperature of less than 800.degree. C. and a step of removing a native oxide film formed on the surface of the silicon single crystal substrate by etching with hydrogen gas in an ambience of hydrogen gas at a temperature of not less than 950.degree. C. and not more than 1190.degree. C. prior to the vapor-phase growth.

摘要翻译： 提供了一种气相生长方法，其允许产生没有微粗糙度的光滑表面的外延膜。 该方法包括在低于800℃的温度下开始的惰性气体的氛围中加热硅单晶衬底的步骤，以及去除在硅单晶衬底的表面上形成的自然氧化膜的步骤 在气相生长前，在不低于950℃，不高于1190℃的氢气气氛中用氢气蚀刻。

公开(公告)号：US5650353A

公开(公告)日：1997-07-22

申请号：US561166

申请日：1995-11-21

申请人： Katsuo Yoshizawa ,  Tsutomu Sato ,  Kiyoshi Mitani ,  Masatake Katayama

发明人： Katsuo Yoshizawa ,  Tsutomu Sato ,  Kiyoshi Mitani ,  Masatake Katayama

IPC分类号： H01L21/02 ,  H01L21/20 ,  H01L21/304 ,  H01L21/762 ,  H01L27/12

CPC分类号： H01L21/2007 ,  H01L21/76251 ,  Y02P80/30 ,  Y10S148/012 ,  Y10S148/135

摘要： SOI (silicon-on-insulator) substrates are efficiently produced by a method which comprises superposing and bonding at least three single crystal silicon wafers through the medium of a SiO.sub.2 film formed on the surface of each of the wafers and cutting the bonded wafers along planes perpendicular to the direction of superposition thereof. The cutting can be infallibly attained with high dimensional accuracy without entailing such adverse phenomena as the vibration of the blade of a cutting tool by providing at the portions destined to be cut the grooves for guiding the blade of the cutting tool in advance of the cutting work.

摘要翻译： 通过一种方法有效地制造SOI（绝缘体上硅）衬底，该方法包括通过形成在每个晶片的表面上的SiO 2膜的介质将至少三个单晶硅晶片叠加并结合，并沿着平面切割结合的晶片 垂直于其叠加方向。 可以以高尺寸精度实现切割，而不会产生诸如切割工具的刀片的振动的不利现象，因为在切割工具的前面提供用于引导切割工具的刀刃的凹槽的部分 。