Single shot correction of resonant optical components
    2.
    发明授权
    Single shot correction of resonant optical components 有权
    谐振光学元件的单次校正

    公开(公告)号:US09465169B2

    公开(公告)日:2016-10-11

    申请号:US14625023

    申请日:2015-02-18

    摘要: An optical device is described. This optical device includes optical components having resonance wavelengths that match target values with a predefined accuracy (such as 0.1 nm) and with a predefined time stability (such as permanent or an infinite time stability) without thermal tuning and/or electronic tuning. The stable, accurate resonance wavelengths may be achieved using a wafer-scale, single (sub-second) shot trimming technique that permanently corrects the phase errors induced by material variations and fabrication inaccuracies in the optical components (and, more generally, resonant silicon-photonic optical components). In particular, the trimming technique may use photolithographic exposure of the optical components on the wafer in parallel, with time-modulation for each individual optical component based on active-element control. Note that the physical mechanism in the trimming technique may involve superficial room-temperature oxidation of the silicon surface, which is induced by deep-ultraviolet radiation in the presence of oxygen.

    摘要翻译: 描述光学装置。 该光学装置包括具有与预定精度(例如0.1nm)匹配的目标值的谐振波长的光学部件,并且具有预定的时间稳定性(例如永久或无限时间稳定性),而不需要热调谐和/或电子调谐。 稳定,准确的共振波长可以使用晶片级单次(亚秒级)拍摄微调技术来实现,该技术永久地校正由光学部件中的材料变化和制造不精确性引起的相位误差(以及更一般地,谐振硅 - 光子学组件)。 特别地,修剪技术可以使用基于有源元件控制的每个单独光学部件的时间调制来并行地对晶片上的光学部件进行光刻曝光。 注意,修整技术中的物理机制可能涉及在氧存在下由深紫外线辐射诱导的硅表面的室温室温氧化。

    Hybrid optical source with semiconductor reflector
    8.
    发明授权
    Hybrid optical source with semiconductor reflector 有权
    具有半导体反射器的混合光源

    公开(公告)号:US08988770B2

    公开(公告)日:2015-03-24

    申请号:US13831541

    申请日:2013-03-14

    IPC分类号: H01S5/10 H01S5/14

    摘要: A hybrid optical source that provides an optical signal having a wavelength is described. This hybrid optical source includes an edge-coupled optical amplifier (such as a III-V semiconductor optical amplifier) aligned to a semiconductor reflector (such as an etched silicon mirror). The semiconductor reflector efficiently couples (i.e., with low optical loss) light out of the optical amplifier in a direction approximately perpendicular to a plane of the optical amplifier. A corresponding optical coupler (such as a diffraction grating or a mirror) fabricated on a silicon-on-insulator chip efficiently couples the light into a sub-micron silicon-on-insulator optical waveguide. The silicon-on-insulator optical waveguide couples the light to additional photonic elements (including a reflector) to complete the hybrid optical source.

    摘要翻译: 描述了提供具有波长的光信号的混合光源。 该混合光源包括与半导体反射器(例如蚀刻硅镜)对准的边缘耦合光放大器(例如III-V半导体光放大器)。 半导体反射器在大致垂直于光放大器的平面的方向上有效地耦合(即,具有低光损耗)的光从光放大器中出射。 制造在绝缘体上硅芯片上的对应的光耦合器(例如衍射光栅或反射镜)有效地将光耦合到亚微米上绝缘体上的光波导中。 绝缘体上的光波导将光耦合到附加的光子元件(包括反射器)以完成混合光源。

    CHIP PACKAGE FOR HIGH-COUNT CHIP STACKS
    10.
    发明申请
    CHIP PACKAGE FOR HIGH-COUNT CHIP STACKS 有权
    大批芯片堆栈的芯片包装

    公开(公告)号:US20140225273A1

    公开(公告)日:2014-08-14

    申请号:US13764331

    申请日:2013-02-11

    IPC分类号: H01L23/538 H01L21/02

    摘要: A chip package is described. This chip package includes a substrate having a side at an angle relative to the top and bottom surfaces of the substrate that is between that of a direction parallel to the top and bottom surfaces and that of a direction perpendicular to the top and bottom surfaces (i.e., between 0° and 90°). This side may be configured to couple to a stack of semiconductor dies in which the semiconductor dies are offset from each other in a direction parallel to the top and bottom surfaces so that one side of the stack defines a stepped terrace. For example, the side may include electrical pads. These electrical pads may be coupled to electrical pads on the top surface by through-substrate vias (TSVs) in the substrate. Moreover, the electrical pads on the top surface may be configured to couple to an integrated circuit.

    摘要翻译: 描述了芯片封装。 该芯片封装包括具有相对于基板的顶表面和底表面成一定角度的侧面的基板,该基板位于平行于顶部和底部表面的方向与垂直于顶部和底部表面的方向(即 在0°和90°之间)。 这一侧可以被配置成耦合到半导体管芯的堆叠,其中半导体管芯在平行于顶部和底部表面的方向上彼此偏移,使得堆叠的一侧限定阶梯式台阶。 例如,侧面可以包括电垫。 这些电焊盘可以通过衬底中的通孔衬底(TSV)耦合到顶表面上的电焊盘。 此外,顶表面上的电焊盘可以被配置成耦合到集成电路。