SYSTEMS AND METHODS FOR REDUCING TRANSMISSION INTERFERENCE
    3.
    发明申请
    SYSTEMS AND METHODS FOR REDUCING TRANSMISSION INTERFERENCE 有权
    减少传输干扰的系统和方法

    公开(公告)号:US20160164617A1

    公开(公告)日:2016-06-09

    申请号:US14562255

    申请日:2014-12-05

    CPC classification number: H04B15/02 H04B5/0031 H04B5/0075 H04W88/06

    Abstract: A method for inductively coupled communication is described. The method includes generating a first signal. The first signal frequency is a first integer multiple of a carrier frequency for inductively coupled communication. The method also includes selecting between a standalone mode and a coexistence mode. The method further includes dividing the first signal to obtain a second signal when in standalone mode. The second signal frequency is a second integer multiple of the carrier frequency. The method additionally includes dividing the first signal to obtain a third signal when in coexistence mode. The third signal frequency is a third integer multiple of the carrier frequency. The method also includes generating an inductively coupled communication signal using at least one of the second signal and the third signal.

    Abstract translation: 描述了一种用于电感耦合通信的方法。 该方法包括产生第一信号。 第一信号频率是用于电感耦合通信的载波频率的第一整数倍。 该方法还包括在独立模式和共存模式之间进行选择。 该方法还包括在独立模式下划分第一信号以获得第二信号。 第二信号频率是载波频率的第二整数倍。 该方法还包括在共存模式下划分第一信号以获得第三信号。 第三信号频率是载波频率的第三整数倍。 该方法还包括使用第二信号和第三信号中的至少一个产生电感耦合的通信信号。

    LOW-POWER BALANCED CRYSTAL OSCILLATOR
    5.
    发明申请
    LOW-POWER BALANCED CRYSTAL OSCILLATOR 有权
    低功耗平衡振荡器

    公开(公告)号:US20160380590A1

    公开(公告)日:2016-12-29

    申请号:US14748946

    申请日:2015-06-24

    Abstract: A circuit includes: first and second output terminals; a reference resonator coupled between the first and second output terminals; a cross-coupled oscillation unit coupled to the first and second output terminals; a first MOSFET diode coupled to the cross-coupled oscillation unit, the first MOSFET diode including a first transistor, a first resistor coupled between gate and drain terminals of the first transistor, and a first capacitor; a second MOSFET diode coupled to the cross-coupled oscillation unit, the second MOSFET diode including a second transistor, a second resistor coupled between gate and drain terminals of the second transistor, and a second capacitor cross coupled between the drain terminal of the second transistor and the gate terminal of the first transistor, wherein the first capacitor is cross coupled between the drain terminal of the first transistor and the gate terminal of the second transistor.

    Abstract translation: 电路包括:第一和第二输出端子; 耦合在所述第一和第二输出端子之间的参考谐振器; 耦合到所述第一和第二输出端子的交叉耦合振荡单元; 耦合到所述交叉耦合振荡单元的第一MOSFET二极管,所述第一MOSFET二极管包括第一晶体管,耦合在所述第一晶体管的栅极和漏极端子之间的第一电阻器和第一电容器; 耦合到交叉耦合振荡单元的第二MOSFET二极管,所述第二MOSFET二极管包括第二晶体管,耦合在所述第二晶体管的栅极和漏极端子之间的第二电阻器以及耦合在所述第二晶体管的漏极端子之间的第二电容器 和第一晶体管的栅极端子,其中第一电容器交叉耦合在第一晶体管的漏极端子和第二晶体管的栅极端子之间。

    Increased synthesizer performance in carrier aggregation/multiple-input, multiple-output systems
    6.
    发明授权
    Increased synthesizer performance in carrier aggregation/multiple-input, multiple-output systems 有权
    在载波聚合/多输入多输出系统中增加合成器性能

    公开(公告)号:US09444473B2

    公开(公告)日:2016-09-13

    申请号:US14548705

    申请日:2014-11-20

    CPC classification number: H03L7/099 H03B5/1212 H04B1/005 H04B1/0064

    Abstract: Certain aspects of the present disclosure provide methods and apparatus for using multiple voltage-controlled oscillators (VCOs) to increase frequency synthesizer performance, such as in stringent multiple-input, multiple-output (MIMO) modes. One example apparatus capable of generating oscillating signals generally includes a first VCO, a second VCO, and connection circuitry configured to connect the second VCO in parallel with the first VCO if a phase-locked loop (PLL) associated with the second VCO is idle.

    Abstract translation: 本公开的某些方面提供了使用多个压控振荡器(VCO)来增加频率合成器性能的方法和装置,例如在严格的多输入多输出(MIMO)模式中。 能够产生振荡信号的一个示例性装置通常包括第一VCO,第二VCO和连接电路,其被配置为如果与第二VCO相关联的锁相环(PLL)空闲,则将第二VCO与第一VCO并联连接。

    WIRELESS DEVICE WITH BUILT-IN SELF TEST (BIST) CAPABILITY FOR TRANSMIT AND RECEIVE CIRCUITS
    7.
    发明申请
    WIRELESS DEVICE WITH BUILT-IN SELF TEST (BIST) CAPABILITY FOR TRANSMIT AND RECEIVE CIRCUITS 审中-公开
    具有内置自检(BIST)功能的无线设备发送和接收电路

    公开(公告)号:US20140256376A1

    公开(公告)日:2014-09-11

    申请号:US13875083

    申请日:2013-05-01

    CPC classification number: H04B17/14 H04B17/19

    Abstract: A wireless device with built-in self test (BIST) capability for testing/calibrating transmit and receive circuits is disclosed. In an exemplary design, an apparatus (e.g., a wireless device or an integrated circuit) includes a first circuit and a second circuit. The first circuit (e.g., a transmitter or a mixer) provides a test signal to at least one transmit path. The test signal is electro-magnetically coupled from the output of the at least one transmit path to a test signal line. For example, the test signal may be provided from the at least one transmit path via at least one antenna feed line to at least one antenna element and may be electro-magnetically coupled from the at least one antenna feed line to the test signal line. The second circuit (e.g., a buffer, a receiver, or a mixer) processes a received test signal from the test signal line.

    Abstract translation: 公开了一种具有内置自检(BIST)功能的无线设备,用于测试/校准发射和接收电路。 在示例性设计中,装置(例如,无线装置或集成电路)包括第一电路和第二电路。 第一电路(例如,发射机或混频器)向至少一个发射路径提供测试信号。 测试信号从至少一个发射路径的输出到测试信号线电磁耦合。 例如,测试信号可以经由至少一个天线馈送线路从至少一个发射路径提供给至少一个天线元件,并且可以从至少一个天线馈线到电测磁耦合到测试信号线。 第二电路(例如,缓冲器,接收器或混频器)处理来自测试信号线的接收到的测试信号。

    DC OFFSET FILTER FOR WIDE BAND BEAMFORMING RECEIVERS
    8.
    发明申请
    DC OFFSET FILTER FOR WIDE BAND BEAMFORMING RECEIVERS 有权
    直流偏移滤波器,用于宽带波束接收器

    公开(公告)号:US20140120851A1

    公开(公告)日:2014-05-01

    申请号:US13664678

    申请日:2012-10-31

    Abstract: A DC offset filter for wide band beamforming receivers is disclosed. In an exemplary embodiment, an apparatus includes a first mixer configured to down-convert an RF wideband beamformed signal to generate a first baseband wideband beamformed signal, the RF wideband beamformed signal having a beam pattern selected from a plurality of beam patterns, and a notch filter configured to remove DC offset from the first baseband wideband beamformed signal independent of the beam pattern.

    Abstract translation: 公开了一种用于宽带波束成形接收机的DC偏移滤波器。 在示例性实施例中,一种装置包括:第一混频器,被配置为下变频RF宽带波束形成信号以产生第一基带宽带波束形成信号,所述RF宽带波束形成信号具有从多个波束图案中选择的波束图案, 滤波器被配置为从波束图案中独立于第一基带宽带波束形成信号去除DC偏移。

    TRANSCEIVER WITH SUPER-HETERODYNE AND ZERO INTERMEDIATE FREQUENCY (ZIF) TOPOLOGIES
    9.
    发明申请
    TRANSCEIVER WITH SUPER-HETERODYNE AND ZERO INTERMEDIATE FREQUENCY (ZIF) TOPOLOGIES 有权
    超高频和零中频(ZIF)拓扑的收发器

    公开(公告)号:US20140065985A1

    公开(公告)日:2014-03-06

    申请号:US13962945

    申请日:2013-08-08

    CPC classification number: H04B1/40 H04B1/28 H04B1/30 H04B1/406

    Abstract: Transceivers implemented with a combination of super-heterodyne and zero intermediate frequency (ZIF) topologies are disclosed. In an exemplary design, an apparatus includes a frequency conversion circuit and a local oscillator (LO) generator. The LO generator generates a first LO signal and a second LO signal. The frequency conversion circuit performs frequency conversion (i) between intermediate frequency (IF) and baseband, based on the first LO signal, for an IF signal and (ii) between radio frequency (RF) and baseband, based on the second LO signal, for an RF signal. The frequency conversion circuit may perform frequency downconversion (i) from IF to baseband for a super-heterodyne receiver and (ii) from RF to baseband for a ZIF receiver. Alternatively or additionally, the frequency conversion circuit may perform frequency upconversion (i) from baseband to IF for a super-heterodyne transmitter and (ii) from baseband to RF for a ZIF transmitter.

    Abstract translation: 公开了采用超外差和零中频(ZIF)拓扑结合实现的收发器。 在示例性设计中,装置包括频率转换电路和本地振荡器(LO)发生器。 LO发生器产生第一LO信号和第二LO信号。 频率转换电路基于第一LO信号,基于第二LO信号,对IF信号和(ii)射频(RF)与基带之间的中频(IF)和基带之间执行频率转换(i) 用于RF信号。 频率转换电路可以对于超外差接收器执行从IF到基带的下变频(i),以及(ii)从Z到RF接收机的RF到基带。 或者或另外,频率转换电路可以执行从超级外差发射机的基带到IF的频率上变频(i)和用于ZIF发射机的从基带到RF的频率上变频(i)。

    ADAPTIVE ANALOG INTERFERENCE CANCELLING SYSTEM AND METHOD FOR RF RECEIVERS

    公开(公告)号:US20180131397A1

    公开(公告)日:2018-05-10

    申请号:US15343791

    申请日:2016-11-04

    CPC classification number: H04B1/1081 H04B1/1036 H04B1/525 H04L27/14

    Abstract: A method of and system for processing a received signal is disclosed. The method includes generating a corrected radio frequency (RF) signal based on an RF feedback signal and an incoming RF signal, the incoming RF signal includes a wanted signal and an interfering signal. The method also includes down-converting the corrected RF signal to a corrected in-phase baseband signal and a corrected quadrature-phase baseband signal; extracting, based on a baseband signal of an aggressor signal, an in-phase baseband signal of the interfering signal from the corrected in-phase baseband signal; extracting, based on the baseband signal of the aggressor, a quadrature-phase baseband signal of the interfering signal from the corrected quadrature-phase baseband signal; up-converting the extracted interfering signals to produce the RF feedback signal; and generating a second corrected RF signal based on the second RF feedback signal and the incoming RF signal.

Patent Agency Ranking