ADDRESS TRANSLATION AND DATA PRE-FETCH IN A CACHE MEMORY SYSTEM
    3.
    发明申请
    ADDRESS TRANSLATION AND DATA PRE-FETCH IN A CACHE MEMORY SYSTEM 审中-公开
    地址转换和数据缓存在缓存存储器系统中

    公开(公告)号:US20170024145A1

    公开(公告)日:2017-01-26

    申请号:US14807754

    申请日:2015-07-23

    Abstract: Systems, methods, and computer program products are disclosed for reducing latency in a system that includes one or more processing devices, a system memory, and a cache memory. A pre-fetch command that identifies requested data is received from a requestor device. The requested data is pre-fetched from the system memory into the cache memory in response to the pre-fetch command. The data pre-fetch may be preceded by a pre-fetch of an address translation. A data access request corresponding to the pre-fetch command is then received, and in response to the data access request the data is provided from the cache memory to the requestor device.

    Abstract translation: 公开了系统,方法和计算机程序产品,用于减少包括一个或多个处理设备,系统存储器和高速缓冲存储器的系统中的延迟。 从请求器设备接收到识别所请求数据的预取命令。 响应于预取命令,将所请求的数据从系统存储器预取入高速缓冲存储器。 之前的数据预取可以预先获取地址转换。 然后接收与预取命令相对应的数据访问请求,并且响应于数据访问请求,将数据从高速缓冲存储器提供给请求器设备。

    PROVIDING MEMORY MANAGEMENT UNIT (MMU) PARTITIONED TRANSLATION CACHES, AND RELATED APPARATUSES, METHODS, AND COMPUTER-READABLE MEDIA
    4.
    发明申请
    PROVIDING MEMORY MANAGEMENT UNIT (MMU) PARTITIONED TRANSLATION CACHES, AND RELATED APPARATUSES, METHODS, AND COMPUTER-READABLE MEDIA 有权
    提供内存管理单元(MMU)分类翻译卡及其相关设备,方法和计算机可读介质

    公开(公告)号:US20160350222A1

    公开(公告)日:2016-12-01

    申请号:US14725882

    申请日:2015-05-29

    Abstract: Providing memory management unit (MMU) partitioned translation caches, and related apparatuses, methods, and computer-readable media. In this regard, in one aspect, an apparatus comprising an MMU is provided. The MMU comprises a translation cache providing a plurality of translation cache entries defining address translation mappings. The MMU further comprises a partition descriptor table providing a plurality of partition descriptors defining a corresponding plurality of partitions each comprising one or more translation cache entries of the plurality of translation cache entries. The MMU also comprises a partition translation circuit configured to receive a memory access request from a requestor. The partition translation circuit is further configured to determine a translation cache partition identifier (TCPID) of the memory access request, identify one or more partitions of the plurality of partitions based on the TCPID, and perform the memory access request on a translation cache entry of the one or more partitions.

    Abstract translation: 提供存储器管理单元(MMU)分区转换高速缓存以及相关设备,方法和计算机可读介质。 在这方面,在一方面,提供了包括MMU的装置。 MMU包括提供定义地址转换映射的多个转换高速缓存条目的翻译高速缓存。 所述MMU还包括分区描述符表,其提供多个分区描述符,所述分区描述符定义相应的多个分区,每个分区包括所述多个转换高速缓存条目中的一个或多个转换高速缓存条目。 MMU还包括被配置为从请求者接收存储器访问请求的分区转换电路。 分区翻译电路还被配置为确定存储器访问请求的翻译高速缓存分区标识符(TCPID),基于TCPID识别多个分区中的一个或多个分区,并且在翻译高速缓存条目上执行存储器访问请求 一个或多个分区。

    System and method for dynamic control of shared memory management resources

    公开(公告)号:US10067691B1

    公开(公告)日:2018-09-04

    申请号:US15448095

    申请日:2017-03-02

    Abstract: A method and system for dynamic control of shared memory resources within a portable computing device (“PCD”) are disclosed. A limit request of an unacceptable deadline miss (“UDM”) engine of the portable computing device may be determined with a limit request sensor within the UDM element. Next, a memory management unit modifies a shared memory resource arbitration policy in view of the limit request. By modifying the shared memory resource arbitration policy, the memory management unit may smartly allocate resources to service translation requests separately queued based on having emanated from either a flooding engine or a non-flooding engine.

    On-Demand Shareability Conversion In A Heterogeneous Shared Virtual Memory
    9.
    发明申请
    On-Demand Shareability Conversion In A Heterogeneous Shared Virtual Memory 审中-公开
    异构共享虚拟内存中的按需共享性转换

    公开(公告)号:US20160019168A1

    公开(公告)日:2016-01-21

    申请号:US14510804

    申请日:2014-10-09

    Abstract: The aspects include systems and methods of managing virtual memory page shareability. A processor or memory management unit may set in a page table an indication that a virtual memory page is not shareable with an outer domain processor. The processor or memory management unit may monitor for when the outer domain processor attempts or has attempted to access the virtual memory page. In response to the outer domain processor attempting to access the virtual memory page, the processor may perform a virtual memory page operation on the virtual memory page.

    Abstract translation: 这些方面包括管理虚拟内存页面共享性的系统和方法。 处理器或存储器管理单元可以在页表中设置虚拟存储器页不能与外域处理器共享的指示。 处理器或存储器管理单元可以监视外部域处理器何时尝试或尝试访问虚拟存储器页面。 响应于外部域处理器尝试访问虚拟存储器页面,处理器可以在虚拟存储器页面上执行虚拟存储器页面操作。

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