公开(公告)号：US20190053368A1

公开(公告)日：2019-02-14

申请号：US16030171

申请日：2018-07-09

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Norikazu MOTOHASHI ,  Shinji NISHIZONO

IPC: H05K1/02 ,  H05K5/00 ,  H05K5/04 ,  H05K7/20 ,  H02K11/33 ,  H02K11/40

Abstract: The reliability of an electronic device is improved. An electronic device has a wiring substrate and a housing made of a metal for supporting the wiring substrate. A semiconductor device having a switching power transistor is mounted at the wiring substrate. A ground pattern of a conductive film and a heat radiation pattern of a conductive film are formed at the wiring substrate. The heat radiation pattern is not electrically coupled with any electronic component mounted at the wiring substrate, and is also not electrically coupled with the ground pattern. The ground pattern overlaps the semiconductor device in the thickness direction of the wiring substrate. The heat radiation pattern overlaps the ground pattern in the thickness direction of the wiring substrate, and overlaps a region where the housing and the wiring substrate are in contact with each other.

公开(公告)号：US20180367012A1

公开(公告)日：2018-12-20

申请号：US15563011

申请日：2015-09-14

Applicant: Renesas Electronics Corporation

Inventor： Shinji NISHIZONO ,  Tadashi SHIMIZU ,  Tomohiro NISHIYAMA ,  Norikazu MOTOHASHI

IPC: H02K11/33 ,  H02M7/537 ,  H02P27/06 ,  H01L23/00 ,  H01L23/528

Abstract: A first semiconductor device having a power transistor for switching is mounted on a power wiring substrate PB1; a semiconductor device PKG6 having a driving circuit for driving the first semiconductor device and a semiconductor device PKG5 having a control circuit for controlling the semiconductor device PKG6 are mounted on a first principal surface of a control wiring substrate PB2; and a semiconductor device PKG4 having a regulator circuit is mounted on a second principal surface of the control wiring substrate PB2. On the first principal surface of the control wiring substrate PB2, the semiconductor device PKG5 and the semiconductor device PKG6 are mounted in a second area out of the second area and a third area adjacent to each other via a first area in which a plurality of holes HC3 are arranged. On the second principal surface of the control wiring substrate PB2, the semiconductor device PKG4 is mounted in a fifth area out of a fourth area positioned opposite the second area and the fifth area positioned opposite the third area.

公开(公告)号：US20180368262A1

公开(公告)日：2018-12-20

申请号：US15562992

申请日：2015-08-21

Applicant: Renesas Electronics Corporation

Inventor： Norikazu MOTOHASHI ,  Tomohiro NISHIYAMA ,  Tadashi SHIMIZU ,  Shinji NISHIZONO

IPC: H05K1/18 ,  H05K1/11 ,  H05K1/14 ,  H02M7/00 ,  H02P27/06 ,  H01L23/31 ,  H01L23/495 ,  H02K11/33 ,  F02M37/08

CPC classification number: H05K1/181 ,  F02M37/08 ,  F02M2037/085 ,  H01L23/3107 ,  H01L23/49513 ,  H01L23/4952 ,  H01L23/49562 ,  H01L23/49575 ,  H02K11/33 ,  H02K2211/03 ,  H02M7/003 ,  H02M7/48 ,  H02P27/06 ,  H05K1/115 ,  H05K1/14 ,  H05K2201/042 ,  H05K2201/09027 ,  H05K2201/09063 ,  H05K2201/10166

Abstract: A plurality of semiconductor devices each including a semiconductor chip having a high-side MOSFET and a semiconductor chip having a low-side MOSFET are mounted on a wiring board (PB1). The wiring board (PB1) includes a power supply wiring WV1 to which a power supply potential is supplied and output wirings WD1, WD2, and WD3 electrically connecting a low-side drain terminal of each of the plurality of semiconductor devices to a plurality of output terminals. A minimum value and a maximum value of a current path width in the power supply wiring WV1 are referred to as a first minimum width and a first maximum width, respectively, and a minimum value and a maximum value of a current path width in the output wirings WD1, WD2, and WD3 are referred to as a second minimum width and a second maximum width, respectively. When the first minimum width is smaller than the second minimum width, the first minimum width is larger than half of the second maximum width, and when the second minimum width is smaller than the first minimum width, the second minimum width is larger than half of the first maximum width.

公开(公告)号：US20170373567A1

公开(公告)日：2017-12-28

申请号：US15629261

申请日：2017-06-21

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Shinji NISHIZONO ,  Tadashi SHIMIZU ,  Norikazu MOTOHASHI ,  Tomohiro Nishiyama

IPC: H02K11/33 ,  H02H9/02 ,  H05K1/18 ,  H05K7/14 ,  H05K1/02 ,  H05K1/11

CPC classification number: H02K11/33 ,  H02H7/08 ,  H02H9/02 ,  H02K7/145 ,  H02M7/003 ,  H02P6/085 ,  H05K1/0206 ,  H05K1/0263 ,  H05K1/115 ,  H05K1/181 ,  H05K3/3447 ,  H05K3/429 ,  H05K7/1432 ,  H05K2201/10015 ,  H05K2201/10166 ,  H05K2201/10356 ,  H05K2201/10522 ,  H05K2201/10545 ,  H05K2201/10628 ,  H05K2201/10636

Abstract: An electronic device is downsized while suppressing performance degradation of the electronic device. In the electronic device, a power module including a power transistor is arranged in a first region on a back surface of a through hole board having a plurality of through hole vias having different sizes while a pre-driver including a control circuit is arranged in a second region on a front surface of the board. In this case, in a plan view, the first region and the second region have an overlapping region. The power module and the pre-driver are electrically connected to each other via a through hole via. The plurality of through hole vias include a through hole via having a first size, a through hole via which is larger than the first size and in which a cable can be inserted, and a through hole via in which a conductive member is embedded.

公开(公告)号：US20170303389A1

公开(公告)日：2017-10-19

申请号：US15480920

申请日：2017-04-06

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Norikazu MOTOHASHI ,  Tomohiro NISHIYAMA ,  Tadashi SHIMIZU ,  Shinji NISHIZONO

IPC: H05K1/02 ,  H05K1/11 ,  H01F27/42 ,  H05K7/14

CPC classification number: H05K1/0215 ,  H05K1/0218 ,  H05K1/115 ,  H05K1/116 ,  H05K5/0065 ,  H05K9/0039 ,  H05K2201/0723 ,  H05K2201/09354 ,  H05K2201/09618 ,  H05K2201/09972 ,  H05K2201/10166 ,  H05K2201/10409

Abstract: An electronic device has a control board having a plurality of wiring layers, a metal-made housing supporting the control board, and a fixing screw for fixing the control board to the housing through a washer. The control board includes a through hole penetrating from a third surface to a fourth surface, a through electrode formed inside the through hole, and a power system GND pattern formed on any wiring layer of the wiring layers. The power system GND pattern and the housing are electrically coupled through the through electrode, the washer, and the fixing screw.