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    Assembly including vertical and horizontal joined circuit panels
    1.
    发明授权
    Assembly including vertical and horizontal joined circuit panels 有权
    组装包括垂直和水平连接电路板

    公开(公告)号：US07489524B2

    公开(公告)日：2009-02-10

    申请号：US11143201

    申请日：2005-06-02

    申请人： Ronald Green ,  Sridhar Krishnan ,  Stuart E. Wilson ,  James Gill Shook ,  Ming Tsai ,  Andy Stavros

    发明人： Ronald Green ,  Sridhar Krishnan ,  Stuart E. Wilson ,  James Gill Shook ,  Ming Tsai ,  Andy Stavros

    IPC分类号： H05K1/11

    CPC分类号： H05K3/368 ,  H05K1/145 ,  H05K3/0052 ,  H05K3/3442 ,  H05K3/366 ,  H05K3/403 ,  H05K3/4092 ,  H05K2201/0397 ,  H05K2201/048 ,  H05K2201/0715 ,  H05K2201/09036 ,  H05K2201/09181 ,  H05K2201/09845 ,  H05K2201/0999 ,  H05K2201/10484

    摘要： An assembly is provided which includes a first circuit panel having a top surface, a first dielectric element and first conductive traces disposed on the first dielectric element. In addition, a second circuit panel has a bottom surface, a second dielectric element and second conductive traces disposed on the second dielectric element, where at least a portion of the second circuit panel overlies at least a portion of the first circuit panel. The assembly further includes an interconnect circuit panel having a third dielectric element which has a front surface, a rear surface opposite the front surface, a top end extending between the front and rear surfaces, a bottom end extending between the front and rear surfaces, and a plurality of interconnect traces disposed on the dielectric element. The bottom end of the interconnect element abuts the top surface of the first circuit panel and the top end abuts the bottom surface of the second circuit panel, where at least some of the first conductive traces are in conductive communication with the second conductive traces through the interconnect traces.

    摘要翻译： 提供了一种组件，其包括具有顶表面的第一电路板，设置在第一介电元件上的第一介电元件和第一导电迹线。 此外，第二电路板具有底表面，第二介电元件和设置在第二电介质元件上的第二导电迹线，其中第二电路板的至少一部分覆盖在第一电路板的至少一部分上。 该组件还包括具有第三电介质元件的互连电路板，第三电介质元件具有前表面，与前表面相对的后表面，在前表面和后表面之间延伸的顶端，在前表面和后表面之间延伸的底端，以及 布置在电介质元件上的多个互连迹线。 互连元件的底端邻接第一电路板的顶表面，并且顶端邻接第二电路板的底表面，其中至少一些第一导电迹线通过第二导电迹线与第二导电迹线导通连通 互连线。

    Assembly including vertical and horizontal joined circuit panels
    2.
    发明申请
    Assembly including vertical and horizontal joined circuit panels 有权
    组装包括垂直和水平连接电路板

    公开(公告)号：US20050269693A1

    公开(公告)日：2005-12-08

    申请号：US11143201

    申请日：2005-06-02

    申请人： Ronald Green ,  Sridhar Krishnan ,  Stuart Wilson ,  James Shook ,  Ming Tsai ,  Andy Stavros

    发明人： Ronald Green ,  Sridhar Krishnan ,  Stuart Wilson ,  James Shook ,  Ming Tsai ,  Andy Stavros

    IPC分类号： H01L23/34 ,  H05K1/14 ,  H05K3/00 ,  H05K3/34 ,  H05K3/36 ,  H05K3/40

    CPC分类号： H05K3/368 ,  H05K1/145 ,  H05K3/0052 ,  H05K3/3442 ,  H05K3/366 ,  H05K3/403 ,  H05K3/4092 ,  H05K2201/0397 ,  H05K2201/048 ,  H05K2201/0715 ,  H05K2201/09036 ,  H05K2201/09181 ,  H05K2201/09845 ,  H05K2201/0999 ,  H05K2201/10484

    摘要： An assembly is provided which includes a first circuit panel having a top surface, a first dielectric element and first conductive traces disposed on the first dielectric element. In addition, a second circuit panel has a bottom surface, a second dielectric element and second conductive traces disposed on the second dielectric element, where at least a portion of the second circuit panel overlies at least a portion of the first circuit panel. The assembly further includes an interconnect circuit panel having a third dielectric element which has a front surface, a rear surface opposite the front surface, a top end extending between the front and rear surfaces, a bottom end extending between the front and rear surfaces, and a plurality of interconnect traces disposed on the dielectric element. The bottom end of the interconnect element abuts the top surface of the first circuit panel and the top end abuts the bottom surface of the second circuit panel, where at least some of the first conductive traces are in conductive communication with the second conductive traces through the interconnect traces.

    摘要翻译： 提供了一种组件，其包括具有顶表面的第一电路板，设置在第一介电元件上的第一介电元件和第一导电迹线。 此外，第二电路板具有底表面，第二介电元件和设置在第二电介质元件上的第二导电迹线，其中第二电路板的至少一部分覆盖在第一电路板的至少一部分上。 该组件还包括具有第三电介质元件的互连电路板，第三电介质元件具有前表面，与前表面相对的后表面，在前表面和后表面之间延伸的顶端，在前表面和后表面之间延伸的底端，以及 布置在电介质元件上的多个互连迹线。 互连元件的底端邻接第一电路板的顶表面，并且顶端邻接第二电路板的底表面，其中至少一些第一导电迹线通过第二导电迹线与第二导电迹线导通连通 互连线。

    Phased antenna array module
    3.
    发明授权
    Phased antenna array module 有权
    相控天线阵列模块

    公开(公告)号：US07151502B2

    公开(公告)日：2006-12-19

    申请号：US11025397

    申请日：2004-12-29

    申请人： Andy Stavros ,  Ming Tsai ,  Stuart E. Wilson

    发明人： Andy Stavros ,  Ming Tsai ,  Stuart E. Wilson

    IPC分类号： H01Q21/00

    CPC分类号： H01Q9/285 ,  H01Q21/0025

    摘要： A phased antenna array is disclosed. The phased antenna array is composed of one or more modules and has a plurality of antenna. The array has a plurality of antenna configured to operate as an array and each module has at least one antenna. The modules have a substrate that supports the antenna, a microelectronic device for sending signals to or receiving signals from said antenna and conductive traces that connect that antenna to the microelectronic device. In those embodiments where the phased antenna array has more than one module, a common substrate supports the one or more modules. A combination of circuitry and interconnects achieves the desired electrical interconnection between the modules.

    摘要翻译： 公开了一种相控天线阵列。 相控天线阵列由一个或多个模块组成并具有多个天线。 阵列具有被配置为作为阵列操作的多个天线，并且每个模块具有至少一个天线。 模块具有支撑天线的基板，用于向所述天线发送信号或从所述天线接收信号的微电子装置和将该天线连接到微电子装置的导电迹线。 在相控天线阵列具有多于一个模块的那些实施例中，公共基板支撑一个或多个模块。 电路和互连的组合实现了模块之间期望的电互连。

    Phased antenna array module
    4.
    发明申请
    Phased antenna array module 有权

    公开(公告)号：US20060139210A1

    公开(公告)日：2006-06-29

    申请号：US11025397

    申请日：2004-12-29

    申请人： Andy Stavros ,  Ming Tsai ,  Stuart Wilson

    发明人： Andy Stavros ,  Ming Tsai ,  Stuart Wilson

    IPC分类号： H01Q1/38

    CPC分类号： H01Q9/285 ,  H01Q21/0025

    摘要： A phased antenna array is disclosed. The phased antenna array is composed of one or more modules and has a plurality of antenna. The array has a plurality of antenna configured to operate as an array and each module has at least one antenna. The modules have a substrate that supports the antenna, a microelectronic device for sending signals to or receiving signals from said antenna and conductive traces that connect that antenna to the microelectronic device. In those embodiments where the phased antenna array has more than one module, a common substrate supports the one or more modules. A combination of circuitry and interconnects achieves the desired electrical interconnection between the modules.

    Stacked packages and systems incorporating the same
    5.
    发明授权
    Stacked packages and systems incorporating the same 有权
    堆叠的包装和系统结合在一起

    公开(公告)号：US07183643B2

    公开(公告)日：2007-02-27

    申请号：US10981067

    申请日：2004-11-04

    申请人： David Gibson ,  Andy Stavros

    发明人： David Gibson ,  Andy Stavros

    IPC分类号： H01L23/34

    CPC分类号： H01L25/10 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/4985 ,  H01L24/14 ,  H01L24/17 ,  H01L25/0655 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2225/0652 ,  H01L2225/06527 ,  H01L2225/06548 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/107 ,  H01L2924/1437 ,  H01L2924/15311 ,  H05K1/112 ,  H05K1/141 ,  H05K3/3436 ,  H05K2201/10378 ,  H05K2201/10515 ,  H01L2224/48091 ,  H01L2924/00014

    摘要： A microelectronic assembly incorporates units stacked one above the other and may include a plurality of similar stacks mounted to a circuit board. Some of the stacks may be inverted, rotated or both relative to other stacks so that corresponding edges of the stacks face one another to facilitate communication between the stacks. Communication between the stacks may be carried along traces on one or more interposers intercepting the stacks remote from the circuit board. Within each stack, conducting paths may extend in vertical columns or in other arrangements such as a stair step arrangement wherein each conductive path traverses a series of column positions, or in a crossing arrangement such two conductive paths cross back and forth between column positions along the vertical extend of the stack. A stack may include portions disposed above and below the circuit board.

    摘要翻译： 微电子组件包括彼此层叠的单元，并且可以包括安装到电路板的多个相似的堆叠。 堆叠中的一些可以相对于其他堆叠反转，旋转或两者，使得堆叠的相应边缘彼此面对以便于堆叠之间的连通。 堆叠之间的通信可以沿着拦截远离电路板的堆叠的一个或多个插入器上的迹线进行。 在每个堆叠内，导电路径可以在垂直列中或在其他布置中延伸，例如阶梯式布置，其中每个导电路径穿过一系列列位置，或者在交叉布置中，这样的两个导电路径沿着沿着该列位置的列位置之间来回交替 堆叠的垂直延伸。 堆叠可以包括设置在电路板上方和下方的部分。

    Stacked packages and systems incorporating the same
    8.
    发明申请
    Stacked packages and systems incorporating the same 有权
    堆叠的包装和系统结合在一起

    公开(公告)号：US20070290316A1

    公开(公告)日：2007-12-20

    申请号：US11710752

    申请日：2007-02-26

    申请人： David Gibson ,  Andy Stavros

    发明人： David Gibson ,  Andy Stavros

    IPC分类号： H01L23/02

    CPC分类号： H01L25/10 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/4985 ,  H01L24/14 ,  H01L24/17 ,  H01L25/0655 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2225/0652 ,  H01L2225/06527 ,  H01L2225/06548 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/107 ,  H01L2924/1437 ,  H01L2924/15311 ,  H05K1/112 ,  H05K1/141 ,  H05K3/3436 ,  H05K2201/10378 ,  H05K2201/10515 ,  H01L2224/48091 ,  H01L2924/00014

    摘要： A microelectronic assembly includes units superposed on one another to form at least one stack having a vertical direction. Each unit includes one or more microelectronic devices and has top and bottom surfaces. Top unit terminals are exposed at the top surfaces and bottom unit terminals are exposed at the bottom surfaces. The top and bottom unit terminals are provided at a set of ordered column positions. Each top unit terminal of the set, except the top unit terminals at the highest ordered column position, is connected to a respective bottom unit terminal of the same unit at a next higher ordered column position. Each bottom unit terminal of the set, except the bottom unit terminals of the lowest unit in the stack, is connected to a respective upper unit terminal of the next lower unit in the stack at the same column position.

    摘要翻译： 微电子组件包括彼此叠置以形成具有垂直方向的至少一个堆叠的单元。 每个单元包括一个或多个微电子器件，并且具有顶表面和底表面。 顶部单元端子在顶部表面露出，底部单元端子暴露在底部表面。 顶部和底部单元端子设置在一组有序列位置。 除了在最高有序列位置的顶部单元端子之外，组件的每个顶部单元端子在下一个更高排序的列位置处连接到同一单元的相应底部单元端子。 除了堆叠中最低单元的底部单元端子之外，组合的每个底部单元端子连接到堆叠中的下一个下部单元的相应的上部单元端子处于相同的列位置。

    Stacked microelectronic assemblies
    9.
    发明授权
    Stacked microelectronic assemblies 有权
    堆叠的微电子组件

    公开(公告)号：US08704351B2

    公开(公告)日：2014-04-22

    申请号：US12551807

    申请日：2009-09-01

    申请人： David Gibson ,  Andy Stavros

    发明人： David Gibson ,  Andy Stavros

    IPC分类号： H01L23/02 ,  H05K1/14 ,  H01L21/00

    CPC分类号： H01L25/10 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/4985 ,  H01L24/14 ,  H01L24/17 ,  H01L25/0655 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2225/0652 ,  H01L2225/06527 ,  H01L2225/06548 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/107 ,  H01L2924/1437 ,  H01L2924/15311 ,  H05K1/112 ,  H05K1/141 ,  H05K3/3436 ,  H05K2201/10378 ,  H05K2201/10515 ,  H01L2224/48091 ,  H01L2924/00014

    摘要： A microelectronic assembly includes units superposed on one another to form at least one stack having a vertical direction. Each unit includes one or more microelectronic devices and has top and bottom surfaces. Top unit terminals are exposed at the top surfaces and bottom unit terminals are exposed at the bottom surfaces. The top and bottom unit terminals are provided at a set of ordered column positions. Each top unit terminal of the set, except the top unit terminals at the highest ordered column position, is connected to a respective bottom unit terminal of the same unit at a next higher ordered column position. Each bottom unit terminal of the set, except the bottom unit terminals of the lowest unit in the stack, is connected to a respective upper unit terminal of the next lower unit in the stack at the same column position.

    摘要翻译： 微电子组件包括彼此叠置以形成具有垂直方向的至少一个堆叠的单元。 每个单元包括一个或多个微电子器件，并且具有顶表面和底表面。 顶部单元端子在顶部表面露出，底部单元端子暴露在底部表面。 顶部和底部单元端子设置在一组有序列位置。 除了在最高有序列位置的顶部单元端子之外，组件的每个顶部单元端子在下一个更高排序的列位置处连接到同一单元的相应底部单元端子。 除了堆叠中最低单元的底部单元端子之外，组件的每个底部单元端子连接到堆叠中的下一个下部单元的相应上部单元端子处于相同的列位置。

    Multi-frequency noise suppression capacitor set
    10.
    发明申请
    Multi-frequency noise suppression capacitor set 审中-公开
    多频抑噪电容组

    公开(公告)号：US20050280134A1

    公开(公告)日：2005-12-22

    申请号：US11154395

    申请日：2005-06-16

    申请人： David Gibson ,  Andy Stavros ,  Michael Warner

    发明人： David Gibson ,  Andy Stavros ,  Michael Warner

    IPC分类号： H01L23/02 ,  H01L23/50 ,  H01L23/64

    CPC分类号： H01L23/66 ,  H01L23/50 ,  H01L23/642 ,  H01L25/105 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/3011 ,  H01L2924/00

    摘要： A decoupling device (10) includes a plurality of capacitors having different capacitances (14,16,18) physically mounted in a package (12, 212), and terminals including at least one first terminal (24, 224) and at least one second terminal (26, 226) adapted for mounting the package to a circuit panel. The plural capacitors are connected in parallel between the first and second terminals so as to form plural circuits with different self-resonant frequencies. The device can be mounted as a unit on a circuit board with the first terminals connected to a power conductor and the second terminals connected to a ground conductor, and provides low impedance shunting of noise over a wide frequency spectrum.

    摘要翻译： 解耦装置（10）包括具有物理地安装在封装（12,212）中的不同电容（14,16,18）的多个电容器，以及包括至少一个第一端子（24,224）和至少一个第二端子 端子（26,226），适于将封装安装到电路板。 多个电容器并联连接在第一和第二端子之间，以形成具有不同自谐振频率的多个电路。 该装置可以作为单元安装在电路板上，其中第一端子连接到电源导体，并且第二端子连接到接地导体，并且在宽频谱上提供低阻抗的噪声分流。