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公开(公告)号：US20230109672A1
公开(公告)日：2023-04-13
申请号：US17850257
申请日：2022-06-27
发明人： Changsoon Lim , Youngdo Kim , Daewon Kang , Chansoo Kang , Kyunghyun Kim , Sangki Nam , Kyunjin Lee , Sungho Jang , Jonghun Pi
IPC分类号： H01J37/32
摘要： An apparatus includes first and second VI sensors, an optical sensor, and an arcing detector. The first VI sensor is disposed in a power filter or on a power supply line connected to a heater disposed in a lower electrode of a process chamber in which a plasma process is performed. The first VI sensor senses a harmonic generated from a first power supply supplying power to the lower electrode and outputs a first signal. The optical sensor senses an intensity of light generated from the process chamber and outputs a second signal. The second VI sensor is disposed on a power supply line connected to an upper electrode and senses a harmonic generated from a second power supply supplying power to the upper electrode and outputs a third signal. The arcing detector determines whether arcing occurs based on one or more of the first, second, and third signals.
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2.发明授权公开(公告)号：US09595315B2
公开(公告)日：2017-03-14
申请号：US14734315
申请日：2015-06-09
发明人： Joon Han , Won-Kyung Park , Junhee Lim , Sungho Jang
IPC分类号： G11C11/4091 , G11C5/02 , G11C11/4094
CPC分类号： G11C11/4091 , G11C5/02 , G11C11/4094 , G11C2207/002
摘要： A semiconductor memory device includes a bit line sense amplifier, a first column select gate, and a second column select gate. The bit line sense amplifier senses an electric potential difference between a bit line and a complementary bit line during a sensing operation for memory cells. The first column select gate transfers an electric potential on the bit line to a local sense amplifier based on a column select signal. The second column select gate transfers an electric potential on the complementary bit line to the local sense amplifier based on the column select signal. The first and second column select gates have different current drive abilities to compensate a difference in bit line interconnection resistance.
摘要翻译： 半导体存储器件包括位线读出放大器，第一列选择栅极和第二列选择栅极。 在存储器单元的感测操作期间，位线读出放大器感测位线和互补位线之间的电位差。 第一列选择栅极基于列选择信号将位线上的电位传送到本地读出放大器。 第二列选择栅极基于列选择信号将互补位线上的电位传送到本地读出放大器。 第一和第二列选择栅极具有不同的电流驱动能力，以补偿位线互连电阻的差异。
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公开(公告)号：US11898912B2
公开(公告)日：2024-02-13
申请号：US17365592
申请日：2021-07-01
发明人： Sungho Jang , Jungchul Lee , Jinseob Kim , Gwangsik Park , Minhwan Seo , Janghwi Lee , Wondon Joo , Jiyoung Chu , Daehoon Han
CPC分类号： G01J3/2823 , G01J3/021 , G01J3/04 , G01J3/24 , G01J2003/2826
摘要： Provided is a hyperspectral imaging (HSI) apparatus. The HSI apparatus includes: a first slit plate configured to introduce an output beam; a first aspherical mirror configured to reflect the introduced output beam; a first grating having a planar reflective surface, the first grating configured to generate a plurality of first split beams by splitting the output beam after being reflected by the first aspherical mirror; and a first camera configured to detect the plurality of first split beams.
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公开(公告)号：US20230422479A1
公开(公告)日：2023-12-28
申请号：US18133964
申请日：2023-04-12
发明人： Jeesun Lee , Junsoo Kim , Daehyun Moon , Namhyun Lee , Seonhaeng Lee , Sungho Jang , Joohyun Jeon , Joon Han
IPC分类号： H10B12/00
CPC分类号： H10B12/315 , H10B12/34 , H10B12/482
摘要： A semiconductor device includes a first active pattern included in an upper portion of a substrate in a memory cell region, and having an isolated shape extending so that a direction oblique to a first direction is a major axis direction of the first active pattern. A first device isolation pattern provided inside a first trench included in the substrate, and covering a side wall of the first active pattern is provided. A first gate structure is provided inside a gate trench extending in the first direction on upper portions of the first active pattern and the first device isolation pattern. A barrier impurity region is selectively formed only on surfaces of both side walls of a major axis of the first active pattern. First and second impurity regions are provided on the upper portion of the first active pattern adjacent to both sides of the first gate structure.
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公开(公告)号：US11490499B2
公开(公告)日：2022-11-01
申请号：US17242022
申请日：2021-04-27
发明人： Sungho Jang , Yoonjae Kim , Hyuck Shin , Donghyub Lee , Kul Inn
摘要： A method of manufacturing a semiconductor includes generating plasma in an amplifying tube using gas as a gain medium; detecting a state of the plasma generated in the amplifying tube; determining a virtual laser gain based on the detected state of the plasma; controlling the state of the plasma such that the virtual laser gain is within a target range; and manufacturing the semiconductor device including performing an exposure process on a substrate using a laser beam output from the amplifying tube adjusted to have the virtual laser gain within the target range.
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公开(公告)号：US20220309643A1
公开(公告)日：2022-09-29
申请号：US17529403
申请日：2021-11-18
发明人： Dong-Hyub Lee , Kyungsik Kang , Jeong-Gil Kim , Jinyong Kim , Hochul Kim , Yozo Matsuda , Youngduk Suh , Seungkoo Lee , Sungho Jang , Yoojin Jeong
摘要： An extreme ultraviolet (EUV) collector inspection apparatus and method capable of precisely inspecting a contamination state of an EUV collector and EUV reflectance in accordance with the contamination state are provided. The EUV collector inspection apparatus includes a light source arranged in front of an EUV collector to be inspected and configured to output light in a visible light (VIS) band from UV rays, an optical device configured to output narrowband light from the light, and a camera configured to perform imaging from an UV band to a VIS band. An image by wavelength of the EUV collector is obtained by using the optical device and the camera and a contamination state of the EUV collector is inspected.
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公开(公告)号：US11437089B2
公开(公告)日：2022-09-06
申请号：US17245334
申请日：2021-04-30
发明人： Taesung Kang , Youngkyu Lee , Kyoungmin Kim , Ilgweon Kim , Bokyeon Won , Seokjae Lee , Sungho Jang , Joon Han
IPC分类号： G11C11/4091 , H01L27/108
摘要： An integrated circuit device includes a sense amplifier configured to sense a voltage change of a bit line, wherein the sense amplifier includes: a sense amplifier unit connected to the bit line and a complementary bit line, configured to sense the voltage change of the bit line in response to a control signal, configured to adjust voltages of a sensing bit line and a complementary sensing bit line based on the sensed voltage change, and including a first PMOS transistor and a first NMOS transistor; and a first offset canceling unit connecting the bit line to the complementary sensing bit line in response to an offset canceling signal, and including a first offset canceling transistor arranged between the first NMOS transistor and the first PMOS transistor, wherein the first offset canceling transistor shares a common impurity region with the first NMOS transistor.
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公开(公告)号：US11016400B1
公开(公告)日：2021-05-25
申请号：US16880090
申请日：2020-05-21
发明人： Sungho Jang , Sungyeol Kim , Hyuck Shin , Keunhee Bai , Injae Lee
IPC分类号： G03F7/20
摘要： An extreme ultraviolet exposure system includes an exposure chamber having an internal space, upper and lower electrostatic chucks, a power supply, a light source, and a mask. The upper electrostatic chuck includes first and second electrodes that are adjacent to one another and that generate an electric field of different polarities, respectively, to provide an electrostatic force. The mask is attachable to the lower surface of the upper electrostatic chuck by the electrostatic force. The mask has a metal thin film pattern including a first region in which a metal thin film that shields the electric field, and a second region in which the metal thin film is not disposed and through which the electric field is transmitted. When the mask is attached, the electric field transmitted through the second region applies an attractive force or a repulsive force to charged particles in the exposure chamber.
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公开(公告)号：US10732129B2
公开(公告)日：2020-08-04
申请号：US16250378
申请日：2019-01-17
发明人： Kwang Soo Kim , Youngkyu Park , Sungho Jang , Byeonghwan Jeon
IPC分类号： G01N21/956 , G03F7/20
摘要： Disclosed are an apparatus for and a method of performing an inspection and metrology process. The apparatus may include a stage configured to load a substrate thereon, a sensor on the stage, an object lens between the sensor and the stage, a light source generating an illumination light to be transmitted to the substrate through the object lens, a first band filtering part between the light source and the object lens to control a wavelength of the illumination light within a first bandwidth, and a second band filtering part between the light source and the object lens to control a wavelength of the illumination light within a second bandwidth, which is smaller than the first bandwidth.
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公开(公告)号：US10332890B2
公开(公告)日：2019-06-25
申请号：US15653198
申请日：2017-07-18
发明人： Kiseok Lee , Chan-Sic Yoon , Augustin Hong , Keunnam Kim , Dongoh Kim , Bong-Soo Kim , Jemin Park , Hoin Lee , Sungho Jang , Kiwook Jung , Yoosang Hwang
IPC分类号： H01L27/108 , H01L27/24 , H01L27/22
摘要： A method of manufacturing a semiconductor memory device and a semiconductor memory device, the method including providing a substrate that includes a cell array region and a peripheral circuit region; forming a mask pattern that covers the cell array region and exposes the peripheral circuit region; growing a semiconductor layer on the peripheral circuit region exposed by the mask pattern such that the semiconductor layer has a different lattice constant from the substrate; forming a buffer layer that covers the cell array region and exposes the semiconductor layer; forming a conductive layer that covers the buffer layer and the semiconductor layer; and patterning the conductive layer to form conductive lines on the cell array region and to form a gate electrode on the peripheral circuit region.
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