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    MEMORY DEVICE USING DATA STROBE SIGNAL AND METHOD FOR COMPENSATING SKEW OF DATA STROBE SIGNAL THEREOF
    1.
    发明申请
    MEMORY DEVICE USING DATA STROBE SIGNAL AND METHOD FOR COMPENSATING SKEW OF DATA STROBE SIGNAL THEREOF 有权

    公开(公告)号：US20250104751A1

    公开(公告)日：2025-03-27

    申请号：US18647853

    申请日：2024-04-26

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Byongmo MOON ,  Jeonghyeok YOU ,  Seong-Ook JUNG ,  Ji Young KIM ,  Hohyun CHAE

    IPC: G11C7/22 ,  G11C7/10 ,  G11C29/50

    Abstract: A memory device includes core dies including memory cell arrays, and a buffer die electrically connected to the core dies through one or more through silicon vias. The buffer die includes a DQS generation circuit that receives an external clock signal from an external device and generates data strobe signals based on the external clock signal for communicating data with the core dies, a DQS calibration circuit that detects a latency of each of plural rank signal that are received from the core dies based on the data strobe signals, respectively, and a coefficient decision circuit that detects a threshold voltage code of the buffer die, applies a weight to the latency of each rank signal based on the threshold voltage code to generate a weighted calibration code for each rank signal, and transmits the weighted calibration codes to respective ones of the core dies.

    SEMICONDUCTOR MEMORY DEVICE
    6.
    发明公开
    SEMICONDUCTOR MEMORY DEVICE 审中-公开

    公开(公告)号：US20240215245A1

    公开(公告)日：2024-06-27

    申请号：US18595737

    申请日：2024-03-05

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Ji Young KIM ,  Woo Sung YANG ,  Sung-Min HWANG ,  Suk Kang SUNG ,  Joon-Sung LIM

    IPC: H10B43/27 ,  H10B41/10 ,  H10B41/27 ,  H10B43/10

    CPC classification number: H10B43/27 ,  H10B41/10 ,  H10B41/27 ,  H10B43/10

    Abstract: A semiconductor memory device includes a first stacked structure, a first supporter layer, a second stacked structure, a block cut structure, and a second supporter layer on the second stacked structure and separated by a second cut pattern. The first stacked structure includes a first and second stack, the second stacked structure includes a third stack separated by the block cut structure and a fourth stack, the first supporter layer is on the first stack and the second stack, the second supporter layer is on the third stack and the fourth stack, the first cut pattern includes a first connection on the block cut structure and connecting the first supporter layer and the second stack, and the second cut pattern of the second supporter layer includes a second connection on the block cut structure and connecting the second supporter layer placed on the third stack and the fourth stack.

    SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME
    7.
    发明申请
    SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME 有权

    公开(公告)号：US20220336586A1

    公开(公告)日：2022-10-20

    申请号：US17504312

    申请日：2021-10-18

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Ji Young KIM ,  Dong-Sik LEE ,  Joon-Sung LIM ,  Bum Kyu KANG ,  Ho Jun SEONG

    IPC: H01L29/10 ,  H01L27/11582

    Abstract: A semiconductor device includes a substrate, a first stack structure on the substrate and includes a plurality of first gate electrodes, a second stack structure on the first stack structure and includes a plurality of second gate electrodes, a channel hole including a first lower channel hole that extends through a lower portion of the first stack structure, a first upper channel hole connected to the first lower channel hole, and a second channel hole connected to the first upper channel hole, and a channel structure in the channel hole. A side wall of the first lower channel hole has a first inclination relative to the first direction, a side wall of the first upper channel hole has a second inclination relative to the first direction, and a side wall of the second channel hole has a third inclination relative to the first direction.

    ROBOT CONTROL METHODS
    8.
    发明申请
    ROBOT CONTROL METHODS 有权
    机器人控制方法

    公开(公告)号：US20140343730A1

    公开(公告)日：2014-11-20

    申请号：US14153302

    申请日：2014-01-13

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Ji Young KIM ,  Kwang Kyu LEE ,  Woong KWON ,  Kyung Shik ROH ,  Ju Suk LEE ,  Seung Yong HYUNG

    IPC: G05B19/41

    CPC classification number: B25J9/1625 ,  G05B2219/40299 ,  Y10S901/16

    Abstract: A robot control method of controlling a robot that has a flexible module including ‘n’ first nodes participating in pan motion and ‘n’ second nodes participating in tilt motion may include: measuring a translational motion distance, a pan motion angle, and a tilt motion angle of the flexible module; calculating state vectors of the ‘n’ first nodes and the ‘n’ second nodes using the measured translational motion distance; calculating operating angle distribution rates of the ‘n’ first nodes and operating angle distribution rates of the ‘n’ second nodes using the calculated state vectors of the ‘n’ first nodes and the calculated state vectors of the ‘n’ second nodes; and/or calculating operating angles of the ‘n’ first nodes and operating angles of the ‘n’ second nodes using the calculated operating angle distribution rates and the measured pan motion angle and tilt motion angle.

    Abstract translation: 控制机器人的机器人控制方法包括：测量平移运动距离，平移运动角度和俯仰角度的柔性模块，该柔性模块包括参与平移运动的第一节点和第n节点参与倾斜运动 柔性模块的运动角度; 使用测量的平移运动距离计算'n'个第一节点和'n'个第二节点的状态向量; 使用“n”个第一节点的计算状态矢量和“n”个第二节点的计算状态向量来计算'n'个第一节点的运行角分布率和'n'个第二节点的操作角分布率; 和/或使用所计算的操作角分布速率和测量的平移运动角度和倾斜运动角度来计算'n'个第一节点的运动角度和'n'个第二节点的操作角度。

    SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME
    10.
    发明公开
    SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME 审中-公开

    公开(公告)号：US20240055486A1

    公开(公告)日：2024-02-15

    申请号：US18492445

    申请日：2023-10-23

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Ji Young KIM ,  Dong-Sik LEE ,  Joon-Sung LIM ,  Bum Kyu KANG ,  Ho Jun SEONG

    IPC: H01L29/10 ,  H10B43/27

    CPC classification number: H01L29/1037 ,  H10B43/27

    Abstract: A semiconductor device includes a substrate, a first stack structure on the substrate and includes a plurality of first gate electrodes, a second stack structure on the first stack structure and includes a plurality of second gate electrodes, a channel hole including a first lower channel hole that extends through a lower portion of the first stack structure, a first upper channel hole connected to the first lower channel hole, and a second channel hole connected to the first upper channel hole, and a channel structure in the channel hole. A side wall of the first lower channel hole has a first inclination relative to the first direction, a side wall of the first upper channel hole has a second inclination relative to the first direction, and a side wall of the second channel hole has a third inclination relative to the first direction.

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