摘要:
A nonvolatile memory device including a nano dot and a method of fabricating the same are provided. The nonvolatile memory device may include a lower electrode, an oxide layer on the lower electrode, a nano dot in the oxide layer and an upper electrode on the oxide layer. In example embodiments, the current paths inside the oxide layer may be unified, thereby stabilizing the reset current.
摘要:
A nonvolatile memory device including a nano dot and a method of fabricating the same are provided. The nonvolatile memory device may include a lower electrode, an oxide layer on the lower electrode, a nano dot in the oxide layer and an upper electrode on the oxide layer. In example embodiments, the current paths inside the oxide layer may be unified, thereby stabilizing the reset current.
摘要:
A nonvolatile memory device including a nano dot and a method of fabricating the same are provided. The nonvolatile memory device may include a lower electrode, an oxide layer on the lower electrode, a nano dot in the oxide layer and an upper electrode on the oxide layer. In example embodiments, the current paths inside the oxide layer may be unified, thereby stabilizing the reset current.
摘要:
A gate structure using nanodots as a trap site, a semiconductor device having the gate structure and methods of fabricating the same are provided. The gate structure may include a tunneling layer, a plurality of nanodots on the tunneling layer, and a control insulating layer including a high-k dielectric layer on the tunneling layer and the nanodots. A semiconductor memory device may further include a semiconductor substrate, the gate structure according to example embodiments on the semiconductor substrate and a first impurity region and a second impurity region in the semiconductor substrate, wherein the gate structure is in contact with the first and second impurity regions.
摘要:
A gate structure using nanodots as a trap site, a semiconductor device having the gate structure and methods of fabricating the same are provided. The gate structure may include a tunneling layer, a plurality of nanodots on the tunneling layer, and a control insulating layer including a high-k dielectric layer on the tunneling layer and the nanodots. A semiconductor memory device may further include a semiconductor substrate, the gate structure according to example embodiments on the semiconductor substrate and a first impurity region and a second impurity region in the semiconductor substrate, wherein the gate structure is in contact with the first and second impurity regions.
摘要:
Provided is a gate structure including a multi-tunneling layer and method of fabricating the same. Also provided is a nanodot semiconductor memory device including such gate structure and method of fabricating the same. The gate structure may include a first insulation layer, a second insulation layer, a charge storage layer including nanodots and formed on the second insulation layer, a third insulation layer formed on the charge storage layer, and a gate electrode layer formed on the third insulation layer. There may also be a nanodot semiconductor memory device including a semiconductor substrate, in which a first impurity region and a second impurity region may be formed, and including the gate structure formed on the semiconductor substrate which contacts the first and second impurity regions. The second insulation layer may be formed on the first insulation layer and may include a material whose energy level may be lower than an energy level of the conduction band of the first insulation layer and higher an energy level of the valence band of the first insulation layer.
摘要:
A semiconductor device, comprising: a plurality of memory cell strings; a bitline; and an interconnection coupling at least two of the memory cell strings to the bitline. Memory cell strings can be coupled to corresponding bitlines through corresponding interconnections. Alternate memory cell strings can be coupled to different bitlines through corresponding different interconnections.
摘要:
Disclosed is a nonvolatile memory device which includes a plurality of cell array layers stacked on a semiconductor substrate. Each of the plurality of cell array layers includes a plurality of strings. Each of the plurality of strings has string and ground select transistors and a plurality of memory cells connected in series between the string and ground select transistors. A common source line is on each of the plurality of cell array layers. Each common source line is connected with first sides of the plurality of strings on a corresponding cell array layer. A plurality of bit lines is connected with second sides of the plurality of strings disposed on the cell array layers and arranged in the vertical direction to the semiconductor substrate. A plurality of word lines is connected with the plurality of memory cells.
摘要:
Disclosed is a nonvolatile memory device which includes a plurality of cell array layers stacked on a semiconductor substrate. Each of the plurality of cell array layers includes a plurality of strings. Each of the plurality of strings has string and ground select transistors and a plurality of memory cells connected in series between the string and ground select transistors. A common source line is on each of the plurality of cell array layers. Each common source line is connected with first sides of the plurality of strings on a corresponding cell array layer. A plurality of bit lines is connected with second sides of the plurality of strings disposed on the cell array layers and arranged in the vertical direction to the semiconductor substrate. A plurality of word lines is connected with the plurality of memory cells.
摘要:
A solar cell module includes a solar cell provided at a center area of a support to expose an edge area of the support. An optical waveguide layer is provided on the edge area of the support to concentrate light to the solar cell.