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    Charge trap memory device
    1.
    发明申请
    Charge trap memory device 审中-公开
    电荷陷阱记忆装置

    公开(公告)号：US20080087944A1

    公开(公告)日：2008-04-17

    申请号：US11905769

    申请日：2007-10-04

    申请人： Sang-min Shin ,  Kwang-soo Seol ,  Sang-Jin Park ,  Jung-hun Sung ,  Sang-moo Choi

    发明人： Sang-min Shin ,  Kwang-soo Seol ,  Sang-Jin Park ,  Jung-hun Sung ,  Sang-moo Choi

    IPC分类号： H01L29/792

    CPC分类号： H01L29/42332 ,  H01L29/40114

    摘要： A charge trap memory device may include a tunnel insulating layer formed on a substrate. A charge trap layer may be formed on the tunnel insulating layer, wherein the charge trap layer is a higher-k dielectric insulating layer doped with one or more transition metals. The tunneling insulating layer may be relatively non-reactive with respect to metals in the charge trap layer. The tunneling insulating layer may also reduce or prevent metals in the charge trap layer from diffusing into the substrate.

    摘要翻译： 电荷陷阱存储器件可以包括形成在衬底上的隧道绝缘层。 电荷陷阱层可以形成在隧道绝缘层上，其中电荷陷阱层是掺杂有一种或多种过渡金属的较高k介电绝缘层。 隧穿绝缘层相对于电荷陷阱层中的金属可能是相对不反应的。 隧道绝缘层还可以减少或防止电荷陷阱层中的金属扩散到衬底中。

    Method of programming nonvolatile memory device
    3.
    发明授权
    Method of programming nonvolatile memory device 有权
    非易失性存储器件编程方法

    公开(公告)号：US07760551B2

    公开(公告)日：2010-07-20

    申请号：US12232082

    申请日：2008-09-10

    申请人： Sang-jin Park ,  Kwang-soo Seol ,  Ki-hwan Choi ,  Jung-hun Sung ,  Sang-moo Choi

    发明人： Sang-jin Park ,  Kwang-soo Seol ,  Ki-hwan Choi ,  Jung-hun Sung ,  Sang-moo Choi

    IPC分类号： G11C16/04

    CPC分类号： G11C16/0483 ,  G11C16/10 ,  G11C16/3413 ,  G11C16/3454 ,  G11C16/3486

    摘要： A method of programming a nonvolatile memory device may include applying a program voltage to a memory cell. A supplementary pulse may be applied to the memory cell to facilitate thermalization of charges after the application of the program voltage. A recovery voltage may be applied to the memory cell after the application of the supplementary pulse. A program state of the memory cell may be verified using a verification voltage after the application of the recovery voltage.

    摘要翻译： 非易失性存储器件的编程方法可以包括将程序电压施加到存储单元。 补充脉冲可以施加到存储器单元，以便在施加编程电压之后促进电荷的热化。 在施加补充脉冲之后，可以将复原电压施加到存储单元。 可以在施加恢复电压之后使用验证电压来验证存储器单元的编程状态。

    Method of programming nonvolatile memory device
    5.
    发明申请
    Method of programming nonvolatile memory device 有权
    非易失性存储器件编程方法

    公开(公告)号：US20090067247A1

    公开(公告)日：2009-03-12

    申请号：US12232082

    申请日：2008-09-10

    申请人： Sang-jin Park ,  Kwang-soo Seol ,  Ki-hwan Choi ,  Jung-hun Sung ,  Sang-moo Choi

    发明人： Sang-jin Park ,  Kwang-soo Seol ,  Ki-hwan Choi ,  Jung-hun Sung ,  Sang-moo Choi

    IPC分类号： G11C16/04 ,  G11C16/06

    CPC分类号： G11C16/0483 ,  G11C16/10 ,  G11C16/3413 ,  G11C16/3454 ,  G11C16/3486

    摘要： A method of programming a nonvolatile memory device may include applying a program voltage to a memory cell. A supplementary pulse may be applied to the memory cell to facilitate thermalization of charges after the application of the program voltage. A recovery voltage may be applied to the memory cell after the application of the supplementary pulse. A program state of the memory cell may be verified using a verification voltage after the application of the recovery voltage.

    摘要翻译： 非易失性存储器件的编程方法可以包括将程序电压施加到存储单元。 补充脉冲可以施加到存储器单元，以便在施加编程电压之后促进电荷的热化。 在施加补充脉冲之后，可以将复原电压施加到存储单元。 可以在施加恢复电压之后使用验证电压来验证存储器单元的编程状态。

    Gate stack, capacitorless dynamic random access memory including the gate stack and methods of manufacturing and operating the same
    6.
    发明申请
    Gate stack, capacitorless dynamic random access memory including the gate stack and methods of manufacturing and operating the same 审中-公开
    门堆叠，无电容动态随机存取存储器，包括栅极堆栈及其制造和操作方法

    公开(公告)号：US20090021979A1

    公开(公告)日：2009-01-22

    申请号：US12007012

    申请日：2008-01-04

    申请人： Jung-hun Sung ,  Kwang-soo Seol ,  Woong-chul Shin ,  Sang-jin Park ,  Sang-moo Choi

    发明人： Jung-hun Sung ,  Kwang-soo Seol ,  Woong-chul Shin ,  Sang-jin Park ,  Sang-moo Choi

    IPC分类号： G11C11/40 ,  H01L27/108 ,  H01L21/8242

    CPC分类号： H01L27/108 ,  G11C11/404 ,  H01L29/4234 ,  H01L29/792

    摘要： Provided are a gate stack, a capacitorless dynamic random access memory (DRAM) including the gate stack and methods of manufacturing and operating the same. The gate stack for a capacitorless DRAM may include a tunnel insulating layer on a substrate, a first charge trapping layer on the tunnel insulating layer, an interlayer insulating layer on the first charge trapping layer, a second charge trapping layer on the interlayer insulating layer, a blocking insulating layer on the second charge trapping layer, and a gate electrode on the blocking insulating layer. The capacitorless DRAM may include the gate stack on the substrate, and a source and a drain in the substrate on both sides of the gate stack.

    摘要翻译： 提供了一种栅极堆叠，包括栅极堆叠的无电容动态随机存取存储器（DRAM）及其制造和操作的方法。 用于无电容器DRAM的栅极堆叠可以包括衬底上的隧道绝缘层，隧道绝缘层上的第一电荷俘获层，第一电荷俘获层上的层间绝缘层，层间绝缘层上的第二电荷俘获层， 第二电荷俘获层上的阻挡绝缘层，以及阻挡绝缘层上的栅电极。 无电容器DRAM可以包括衬底上的栅极堆叠，以及栅极叠层两侧的衬底中的源极和漏极。

    Nonvolatile memory device and method of fabricating the same
    10.
    发明申请
    Nonvolatile memory device and method of fabricating the same 审中-公开
    非易失性存储器件及其制造方法

    公开(公告)号：US20090045455A1

    公开(公告)日：2009-02-19

    申请号：US12219465

    申请日：2008-07-23

    申请人： Kwang-soo Seol ,  Sang-jin Park ,  Sang-moo Choi ,  Hyo-sug Lee ,  Jung-hun Sung

    发明人： Kwang-soo Seol ,  Sang-jin Park ,  Sang-moo Choi ,  Hyo-sug Lee ,  Jung-hun Sung

    IPC分类号： H01L29/792 ,  H01L21/28

    CPC分类号： H01L29/4234 ,  H01L29/40117 ,  H01L29/513 ,  H01L29/66833

    摘要： Example embodiments relate to nonvolatile semiconductor memory devices using an electric charge storing layer as a storage node and fabrication methods thereof. An electric charge trap type nonvolatile memory device may include a tunneling film, an electric charge storing layer, a blocking insulation film, and a gate electrode. The blocking insulation film may be an aluminum oxide having an energy band gap larger than that of a γ-phase aluminum oxide film. An α-phase crystalline aluminum oxide film as a blocking insulation film may have an energy band gap of about 7.0 eV or more along with fewer defects. The crystalline aluminum oxide film may be formed by providing a source film (e.g., AlF3 film) on or within a preliminary blocking insulation film (e.g., amorphous aluminum oxide film) and performing a heat treatment. Alternatively, an aluminum compound (e.g., AlF3) may be introduced into the preliminary blocking insulation film by other diffusion methods or ion implantation. Accordingly, the ability of the memory device to maintain electric charges may be improved, the operating voltage for programming and erasing may be lowered, and the operating speed may be increased.

    摘要翻译： 示例性实施例涉及使用电荷存储层作为存储节点的非易失性半导体存储器件及其制造方法。 电荷阱型非易失性存储器件可以包括隧穿膜，电荷存储层，阻挡绝缘膜和栅电极。 阻挡绝缘膜可以是具有比γ相氧化铝膜的能带隙大的能带隙的氧化铝。 作为阻挡绝缘膜的α相结晶氧化铝膜可以具有约7.0eV以上的能带隙和更少的缺陷。 结晶氧化铝膜可以通过在预先隔离绝缘膜（例如无定形氧化铝膜）上或内部提供源膜（例如，AlF 3膜）并进行热处理而形成。 或者，可以通过其它扩散方法或离子注入将铝化合物（例如，AlF 3）引入到初步阻挡绝缘膜中。 因此，可以提高存储器件保持电荷的能力，可以降低用于编程和擦除的操作电压，并且可以提高操作速度。